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3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
417412c8 21#include <math.h>
3b533202
BV
22#include <stdio.h>
23#include <stdint.h>
24#include <stdlib.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <fcntl.h>
28#include <unistd.h>
29#include <string.h>
30#include <sys/time.h>
31#include <inttypes.h>
3b533202
BV
32#include <glib.h>
33#include <libusb.h>
c1aae900 34#include <libsigrok/libsigrok.h>
45c59c8b 35#include "libsigrok-internal.h"
caeb8d7a 36#include "protocol.h"
3b533202 37
fc8fe3e3
BV
38/* Max time in ms before we want to check on USB events */
39/* TODO tune this properly */
e98b7f1b 40#define TICK 1
3b533202 41
d9251a2c
UH
42#define NUM_TIMEBASE 10
43#define NUM_VDIV 8
79917848 44
07ffa5b3
UH
45#define NUM_BUFFER_SIZES 2
46
584560f1 47static const uint32_t scanopts[] = {
624f5b4c
BV
48 SR_CONF_CONN,
49};
50
5ecd9049 51static const uint32_t drvopts[] = {
1953564a 52 SR_CONF_OSCILLOSCOPE,
933defaa
BV
53};
54
5ecd9049 55static const uint32_t devopts[] = {
e91bb0a6 56 SR_CONF_CONTINUOUS,
933defaa 57 SR_CONF_CONN | SR_CONF_GET,
50bc52f3 58 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
933defaa 59 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
95983cc3 61 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
933defaa
BV
62 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
86621306 64 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3b2b7031 65 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 66 SR_CONF_NUM_VDIV | SR_CONF_GET,
12f62ce6 67 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
3b533202
BV
68};
69
933defaa 70static const uint32_t devopts_cg[] = {
933defaa
BV
71 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
72 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 73 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
933defaa
BV
74};
75
ba7dd8bb 76static const char *channel_names[] = {
78693401 77 "CH1", "CH2",
3b533202
BV
78};
79
034accb5 80static const uint64_t buffersizes_32k[] = {
1a46cc62 81 (10 * 1024), (32 * 1024),
034accb5
BV
82};
83static const uint64_t buffersizes_512k[] = {
1a46cc62 84 (10 * 1024), (512 * 1024),
034accb5
BV
85};
86static const uint64_t buffersizes_14k[] = {
1a46cc62 87 (10 * 1024), (14 * 1024),
034accb5
BV
88};
89
62bb8840 90static const struct dso_profile dev_profiles[] = {
88a13f30 91 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 92 "Hantek", "DSO-2090",
034accb5 93 buffersizes_32k,
8e2d6c9d 94 "hantek-dso-2090.fw" },
88a13f30
BV
95 { 0x04b4, 0x2150, 0x04b5, 0x2150,
96 "Hantek", "DSO-2150",
034accb5 97 buffersizes_32k,
8e2d6c9d 98 "hantek-dso-2150.fw" },
88a13f30
BV
99 { 0x04b4, 0x2250, 0x04b5, 0x2250,
100 "Hantek", "DSO-2250",
034accb5 101 buffersizes_512k,
8e2d6c9d 102 "hantek-dso-2250.fw" },
88a13f30
BV
103 { 0x04b4, 0x5200, 0x04b5, 0x5200,
104 "Hantek", "DSO-5200",
034accb5 105 buffersizes_14k,
8e2d6c9d 106 "hantek-dso-5200.fw" },
88a13f30
BV
107 { 0x04b4, 0x520a, 0x04b5, 0x520a,
108 "Hantek", "DSO-5200A",
034accb5 109 buffersizes_512k,
8e2d6c9d 110 "hantek-dso-5200A.fw" },
1b4aedc0 111 ALL_ZERO
a370ef19
BV
112};
113
86bb3f4a 114static const uint64_t timebases[][2] = {
a370ef19
BV
115 /* microseconds */
116 { 10, 1000000 },
117 { 20, 1000000 },
118 { 40, 1000000 },
119 { 100, 1000000 },
120 { 200, 1000000 },
121 { 400, 1000000 },
122 /* milliseconds */
123 { 1, 1000 },
124 { 2, 1000 },
125 { 4, 1000 },
126 { 10, 1000 },
127 { 20, 1000 },
128 { 40, 1000 },
129 { 100, 1000 },
130 { 200, 1000 },
131 { 400, 1000 },
a370ef19
BV
132};
133
11e33196
PM
134static const uint64_t samplerates[] = {
135 SR_KHZ(20),
136 SR_KHZ(25),
137 SR_KHZ(50),
138 SR_KHZ(100),
139 SR_KHZ(200),
140 SR_KHZ(250),
141 SR_KHZ(500),
142 SR_MHZ(1),
143 SR_MHZ(2),
144 SR_MHZ(5),
145 SR_MHZ(10),
146 SR_MHZ(20),
147 SR_MHZ(25),
148 SR_MHZ(50),
149 SR_MHZ(100),
150 SR_MHZ(125),
ab8df2b1 151 /* Fast mode not supported yet.
11e33196
PM
152 SR_MHZ(200),
153 SR_MHZ(250), */
154};
155
86bb3f4a 156static const uint64_t vdivs[][2] = {
313deed2
BV
157 /* millivolts */
158 { 10, 1000 },
159 { 20, 1000 },
160 { 50, 1000 },
161 { 100, 1000 },
162 { 200, 1000 },
163 { 500, 1000 },
164 /* volts */
165 { 1, 1 },
166 { 2, 1 },
167 { 5, 1 },
313deed2
BV
168};
169
62bb8840 170static const char *trigger_sources[] = {
c93f1138 171 "CH1", "CH2", "EXT", "forced"
a370ef19 172};
3b533202 173
933defaa 174static const char *trigger_slopes[] = {
f8195cb2 175 "r", "f",
ebb781a6
BV
176};
177
62bb8840 178static const char *coupling[] = {
f8195cb2 179 "AC", "DC", "GND",
b58fbd99
BV
180};
181
15a5bfe4 182static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
183{
184 struct sr_dev_inst *sdi;
ba7dd8bb 185 struct sr_channel *ch;
933defaa 186 struct sr_channel_group *cg;
269971dd 187 struct dev_context *devc;
dcd438ee 188 unsigned int i;
3b533202 189
aac29cc1 190 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
191 sdi->status = SR_ST_INITIALIZING;
192 sdi->vendor = g_strdup(prof->vendor);
193 sdi->model = g_strdup(prof->model);
3b533202 194
e98b7f1b 195 /*
ba7dd8bb 196 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
197 * a trigger source internal to the device.
198 */
0f34cb47 199 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 200 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
d810901a 201 cg = sr_channel_group_new(sdi, channel_names[i], NULL);
933defaa 202 cg->channels = g_slist_append(cg->channels, ch);
87ca93c5
BV
203 }
204
933defaa 205 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
206 devc->profile = prof;
207 devc->dev_state = IDLE;
208 devc->timebase = DEFAULT_TIMEBASE;
11e33196 209 devc->samplerate = DEFAULT_SAMPLERATE;
417412c8
AJ
210 devc->ch_enabled[0] = TRUE;
211 devc->ch_enabled[1] = TRUE;
933defaa
BV
212 devc->voltage[0] = DEFAULT_VOLTAGE;
213 devc->voltage[1] = DEFAULT_VOLTAGE;
214 devc->coupling[0] = DEFAULT_COUPLING;
215 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
216 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
217 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
218 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
219 devc->framesize = DEFAULT_FRAMESIZE;
220 devc->triggerslope = SLOPE_POSITIVE;
221 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
95983cc3 222 devc->capture_ratio = DEFAULT_CAPTURE_RATIO;
269971dd 223 sdi->priv = devc;
3b533202
BV
224
225 return sdi;
226}
227
ba7dd8bb 228static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 229{
014359e3 230 struct dev_context *devc;
ba7dd8bb 231 struct sr_channel *ch;
62bb8840 232 const GSList *l;
69e19dd7 233 int p;
3b533202 234
014359e3
BV
235 devc = sdi->priv;
236
ba7dd8bb 237 g_slist_free(devc->enabled_channels);
be10b96d 238 devc->enabled_channels = NULL;
417412c8 239 devc->ch_enabled[0] = devc->ch_enabled[1] = FALSE;
ba7dd8bb
UH
240 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
241 ch = l->data;
69e19dd7 242 if (p == 0)
417412c8 243 devc->ch_enabled[0] = ch->enabled;
69e19dd7 244 else
417412c8 245 devc->ch_enabled[1] = ch->enabled;
ba7dd8bb
UH
246 if (ch->enabled)
247 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
248 }
249
250 return SR_OK;
251}
252
3553451f 253static void clear_helper(struct dev_context *devc)
39cfdd75 254{
949b3dc0 255 g_free(devc->triggersource);
ba7dd8bb 256 g_slist_free(devc->enabled_channels);
949b3dc0 257}
39cfdd75 258
4f840ce9 259static int dev_clear(const struct sr_dev_driver *di)
949b3dc0 260{
3553451f 261 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
39cfdd75
BV
262}
263
4f840ce9 264static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 265{
269971dd
BV
266 struct drv_context *drvc;
267 struct dev_context *devc;
294dbac7 268 struct sr_dev_inst *sdi;
46a743c1
BV
269 struct sr_usb_dev_inst *usb;
270 struct sr_config *src;
294dbac7
BV
271 const struct dso_profile *prof;
272 GSList *l, *devices, *conn_devices;
39cfdd75 273 struct libusb_device_descriptor des;
3b533202 274 libusb_device **devlist;
2a8f2d41 275 int i, j;
46a743c1 276 const char *conn;
395206f4 277 char connection_id[64];
e98b7f1b 278
41812aca 279 drvc = di->context;
39cfdd75 280
4b97c74e
UH
281 devices = 0;
282
294dbac7
BV
283 conn = NULL;
284 for (l = options; l; l = l->next) {
285 src = l->data;
286 if (src->key == SR_CONF_CONN) {
287 conn = g_variant_get_string(src->data, NULL);
288 break;
289 }
290 }
291 if (conn)
292 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
293 else
294 conn_devices = NULL;
295
39cfdd75 296 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 297 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 298 for (i = 0; devlist[i]; i++) {
46a743c1 299 if (conn) {
294dbac7
BV
300 usb = NULL;
301 for (l = conn_devices; l; l = l->next) {
302 usb = l->data;
303 if (usb->bus == libusb_get_bus_number(devlist[i])
304 && usb->address == libusb_get_device_address(devlist[i]))
305 break;
306 }
307 if (!l)
308 /* This device matched none of the ones that
309 * matched the conn specification. */
310 continue;
46a743c1 311 }
294dbac7 312
2a8f2d41 313 libusb_get_device_descriptor(devlist[i], &des);
3b533202 314
6c1a76d1
RT
315 if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
316 continue;
395206f4 317
3b533202
BV
318 prof = NULL;
319 for (j = 0; dev_profiles[j].orig_vid; j++) {
320 if (des.idVendor == dev_profiles[j].orig_vid
321 && des.idProduct == dev_profiles[j].orig_pid) {
322 /* Device matches the pre-firmware profile. */
323 prof = &dev_profiles[j];
e98b7f1b 324 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 325 sdi = dso_dev_new(prof);
395206f4 326 sdi->connection_id = g_strdup(connection_id);
39cfdd75 327 devices = g_slist_append(devices, sdi);
269971dd 328 devc = sdi->priv;
8e2d6c9d 329 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
1372bdcd 330 USB_CONFIGURATION, prof->firmware) == SR_OK) {
3b533202 331 /* Remember when the firmware on this device was updated */
269971dd 332 devc->fw_updated = g_get_monotonic_time();
1372bdcd
GS
333 } else {
334 sr_err("Firmware upload failed, name %s", prof->firmware);
335 }
3b533202 336 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 337 sdi->conn = sr_usb_dev_inst_new(
3b533202 338 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
339 break;
340 } else if (des.idVendor == dev_profiles[j].fw_vid
341 && des.idProduct == dev_profiles[j].fw_pid) {
342 /* Device matches the post-firmware profile. */
343 prof = &dev_profiles[j];
e98b7f1b 344 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 345 sdi = dso_dev_new(prof);
395206f4 346 sdi->connection_id = g_strdup(connection_id);
3b533202 347 sdi->status = SR_ST_INACTIVE;
39cfdd75 348 devices = g_slist_append(devices, sdi);
d0eec1ee 349 sdi->inst_type = SR_INST_USB;
c118080b 350 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
351 libusb_get_bus_number(devlist[i]),
352 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
353 break;
354 }
355 }
356 if (!prof)
357 /* not a supported VID/PID */
358 continue;
359 }
360 libusb_free_device_list(devlist, 1);
361
15a5bfe4 362 return std_scan_complete(di, devices);
3b533202
BV
363}
364
6078d2c9 365static int dev_open(struct sr_dev_inst *sdi)
3b533202 366{
269971dd 367 struct dev_context *devc;
c118080b 368 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
369 int64_t timediff_us, timediff_ms;
370 int err;
3b533202 371
269971dd 372 devc = sdi->priv;
c118080b 373 usb = sdi->conn;
3b533202
BV
374
375 /*
e98b7f1b
UH
376 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
377 * for the FX2 to renumerate.
3b533202 378 */
fc8fe3e3 379 err = SR_ERR;
269971dd 380 if (devc->fw_updated > 0) {
e98b7f1b
UH
381 sr_info("Waiting for device to reset.");
382 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 383 g_usleep(300 * 1000);
fc8fe3e3
BV
384 timediff_ms = 0;
385 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 386 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
387 break;
388 g_usleep(100 * 1000);
269971dd 389 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 390 timediff_ms = timediff_us / 1000;
e98b7f1b 391 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 392 }
6433156c 393 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 394 } else {
25a0f108 395 err = dso_open(sdi);
3b533202
BV
396 }
397
398 if (err != SR_OK) {
e98b7f1b 399 sr_err("Unable to open device.");
3b533202
BV
400 return SR_ERR;
401 }
402
c118080b 403 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 404 if (err != 0) {
d4928d71 405 sr_err("Unable to claim interface: %s.",
d9251a2c 406 libusb_error_name(err));
3b533202
BV
407 return SR_ERR;
408 }
409
410 return SR_OK;
411}
412
6078d2c9 413static int dev_close(struct sr_dev_inst *sdi)
3b533202 414{
3b533202
BV
415 dso_close(sdi);
416
417 return SR_OK;
418}
419
dd7a72ea
UH
420static int config_get(uint32_t key, GVariant **data,
421 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
79917848 422{
933defaa 423 struct dev_context *devc;
624f5b4c 424 struct sr_usb_dev_inst *usb;
2c240774 425 const char *s;
933defaa
BV
426 const uint64_t *vdiv;
427 int ch_idx;
79917848 428
584560f1 429 switch (key) {
bf622e6d 430 case SR_CONF_NUM_HDIV:
79917848
BV
431 *data = g_variant_new_int32(NUM_TIMEBASE);
432 break;
433 case SR_CONF_NUM_VDIV:
434 *data = g_variant_new_int32(NUM_VDIV);
435 break;
933defaa
BV
436 }
437
438 if (!sdi)
439 return SR_ERR_ARG;
440
441 devc = sdi->priv;
442 if (!cg) {
443 switch (key) {
12f62ce6
PM
444 case SR_CONF_TRIGGER_LEVEL:
445 *data = g_variant_new_double(devc->voffset_trigger);
446 break;
933defaa
BV
447 case SR_CONF_CONN:
448 if (!sdi->conn)
449 return SR_ERR_ARG;
450 usb = sdi->conn;
451 if (usb->address == 255)
452 /* Device still needs to re-enumerate after firmware
453 * upload, so we don't know its (future) address. */
454 return SR_ERR;
95c1fe62 455 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
933defaa
BV
456 break;
457 case SR_CONF_TIMEBASE:
458 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
459 timebases[devc->timebase][1]);
460 break;
3b2b7031 461 case SR_CONF_SAMPLERATE:
11e33196 462 *data = g_variant_new_uint64(devc->samplerate);
3b2b7031 463 break;
933defaa
BV
464 case SR_CONF_BUFFERSIZE:
465 *data = g_variant_new_uint64(devc->framesize);
466 break;
467 case SR_CONF_TRIGGER_SOURCE:
468 *data = g_variant_new_string(devc->triggersource);
469 break;
470 case SR_CONF_TRIGGER_SLOPE:
c442ffda 471 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
472 *data = g_variant_new_string(s);
473 break;
95983cc3
PM
474 case SR_CONF_CAPTURE_RATIO:
475 *data = g_variant_new_uint64(devc->capture_ratio);
933defaa 476 break;
50bc52f3
VO
477 case SR_CONF_LIMIT_FRAMES:
478 *data = g_variant_new_uint64(devc->limit_frames);
479 break;
933defaa
BV
480 default:
481 return SR_ERR_NA;
482 }
483 } else {
484 if (sdi->channel_groups->data == cg)
485 ch_idx = 0;
486 else if (sdi->channel_groups->next->data == cg)
487 ch_idx = 1;
488 else
489 return SR_ERR_ARG;
0c5f2abc 490 switch (key) {
933defaa
BV
491 case SR_CONF_FILTER:
492 *data = g_variant_new_boolean(devc->filter[ch_idx]);
493 break;
494 case SR_CONF_VDIV:
495 vdiv = vdivs[devc->voltage[ch_idx]];
496 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
497 break;
498 case SR_CONF_COUPLING:
499 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
500 break;
501 }
79917848
BV
502 }
503
504 return SR_OK;
505}
506
dd7a72ea
UH
507static int config_set(uint32_t key, GVariant *data,
508 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
3b533202 509{
269971dd 510 struct dev_context *devc;
697fb6dd 511 int ch_idx, idx;
12f62ce6 512 float flt;
8f996b89 513
269971dd 514 devc = sdi->priv;
933defaa
BV
515 if (!cg) {
516 switch (key) {
517 case SR_CONF_LIMIT_FRAMES:
518 devc->limit_frames = g_variant_get_uint64(data);
519 break;
12f62ce6
PM
520 case SR_CONF_TRIGGER_LEVEL:
521 flt = g_variant_get_double(data);
522 if (flt < 0.0 || flt > 1.0) {
523 sr_err("Trigger level must be in [0.0,1.0].");
524 return SR_ERR_ARG;
525 }
12f62ce6 526 devc->voffset_trigger = flt;
ab8df2b1
UH
527 if (dso_set_voffsets(sdi) != SR_OK)
528 return SR_ERR;
12f62ce6 529 break;
933defaa 530 case SR_CONF_TRIGGER_SLOPE:
697fb6dd 531 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
933defaa 532 return SR_ERR_ARG;
db85496e 533 devc->triggerslope = idx;
933defaa 534 break;
95983cc3 535 case SR_CONF_CAPTURE_RATIO:
04069272 536 devc->capture_ratio = g_variant_get_uint64(data);
933defaa
BV
537 break;
538 case SR_CONF_BUFFERSIZE:
697fb6dd 539 if ((idx = std_u64_idx(data, devc->profile->buffersizes, NUM_BUFFER_SIZES)) < 0)
a9010323 540 return SR_ERR_ARG;
697fb6dd 541 devc->framesize = devc->profile->buffersizes[idx];
933defaa
BV
542 break;
543 case SR_CONF_TIMEBASE:
697fb6dd 544 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(timebases))) < 0)
a9010323 545 return SR_ERR_ARG;
697fb6dd 546 devc->timebase = idx;
933defaa 547 break;
11e33196
PM
548 case SR_CONF_SAMPLERATE:
549 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(samplerates))) < 0)
550 return SR_ERR_ARG;
551 devc->samplerate = samplerates[idx];
552 if (dso_set_trigger_samplerate(sdi) != SR_OK)
553 return SR_ERR;
554 break;
933defaa 555 case SR_CONF_TRIGGER_SOURCE:
697fb6dd 556 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_sources))) < 0)
a9010323 557 return SR_ERR_ARG;
697fb6dd 558 devc->triggersource = g_strdup(trigger_sources[idx]);
933defaa
BV
559 break;
560 default:
a9010323 561 return SR_ERR_NA;
ebb781a6 562 }
933defaa
BV
563 } else {
564 if (sdi->channel_groups->data == cg)
565 ch_idx = 0;
566 else if (sdi->channel_groups->next->data == cg)
567 ch_idx = 1;
568 else
569 return SR_ERR_ARG;
570 switch (key) {
571 case SR_CONF_FILTER:
572 devc->filter[ch_idx] = g_variant_get_boolean(data);
573 break;
574 case SR_CONF_VDIV:
697fb6dd 575 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
a9010323 576 return SR_ERR_ARG;
697fb6dd 577 devc->voltage[ch_idx] = idx;
933defaa
BV
578 break;
579 case SR_CONF_COUPLING:
697fb6dd 580 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
a9010323 581 return SR_ERR_ARG;
697fb6dd 582 devc->coupling[ch_idx] = idx;
933defaa
BV
583 break;
584 default:
a9010323 585 return SR_ERR_NA;
b58fbd99 586 }
3b533202
BV
587 }
588
a9010323 589 return SR_OK;
3b533202
BV
590}
591
dd7a72ea
UH
592static int config_list(uint32_t key, GVariant **data,
593 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 594{
034accb5 595 struct dev_context *devc;
a1c743fc 596
933defaa 597 if (!cg) {
93b118da 598 switch (key) {
e66d1892 599 case SR_CONF_SCAN_OPTIONS:
933defaa 600 case SR_CONF_DEVICE_OPTIONS:
e66d1892 601 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
933defaa
BV
602 case SR_CONF_BUFFERSIZE:
603 if (!sdi)
604 return SR_ERR_ARG;
605 devc = sdi->priv;
105df674 606 *data = std_gvar_array_u64(devc->profile->buffersizes, NUM_BUFFER_SIZES);
933defaa 607 break;
11e33196
PM
608 case SR_CONF_SAMPLERATE:
609 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
610 break;
933defaa 611 case SR_CONF_TIMEBASE:
58ffcf97 612 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(timebases));
933defaa
BV
613 break;
614 case SR_CONF_TRIGGER_SOURCE:
53012da6 615 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_sources));
933defaa
BV
616 break;
617 case SR_CONF_TRIGGER_SLOPE:
53012da6 618 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
933defaa
BV
619 break;
620 default:
621 return SR_ERR_NA;
3973ee26 622 }
933defaa 623 } else {
93b118da 624 switch (key) {
933defaa 625 case SR_CONF_DEVICE_OPTIONS:
53012da6 626 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
933defaa
BV
627 break;
628 case SR_CONF_COUPLING:
53012da6 629 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
933defaa
BV
630 break;
631 case SR_CONF_VDIV:
58ffcf97 632 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(vdivs));
933defaa
BV
633 break;
634 default:
635 return SR_ERR_NA;
3973ee26 636 }
a1c743fc
BV
637 }
638
639 return SR_OK;
640}
641
69e19dd7 642static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 643 int num_samples)
3b533202
BV
644{
645 struct sr_datafeed_packet packet;
ae7d8a58
UH
646 struct sr_datafeed_analog analog;
647 struct sr_analog_encoding encoding;
648 struct sr_analog_meaning meaning;
649 struct sr_analog_spec spec;
417412c8
AJ
650 struct dev_context *devc = sdi->priv;
651 GSList *channels = devc->enabled_channels;
3b533202 652
ae7d8a58 653 packet.type = SR_DF_ANALOG;
3b533202 654 packet.payload = &analog;
6e71ef3b 655 /* TODO: support for 5xxx series 9-bit samples */
ae7d8a58 656 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
e749a8cb 657 analog.num_samples = num_samples;
ae7d8a58
UH
658 analog.meaning->mq = SR_MQ_VOLTAGE;
659 analog.meaning->unit = SR_UNIT_VOLT;
660 analog.meaning->mqflags = 0;
886a52b6 661 /* TODO: Check malloc return value. */
417412c8
AJ
662 analog.data = g_try_malloc(num_samples * sizeof(float));
663
b3fd0993 664 for (int ch = 0; ch < NUM_CHANNELS; ch++) {
417412c8
AJ
665 if (!devc->ch_enabled[ch])
666 continue;
667
668 float range = ((float)vdivs[devc->voltage[ch]][0] / vdivs[devc->voltage[ch]][1]) * 8;
669 float vdivlog = log10f(range / 255);
670 int digits = -(int)vdivlog + (vdivlog < 0.0);
671 analog.encoding->digits = digits;
672 analog.spec->spec_digits = digits;
673 analog.meaning->channels = g_slist_append(NULL, channels->data);
674
675 for (int i = 0; i < num_samples; i++) {
676 /*
677 * The device always sends data for both channels. If a channel
678 * is disabled, it contains a copy of the enabled channel's
679 * data. However, we only send the requested channels to
680 * the bus.
681 *
682 * Voltage values are encoded as a value 0-255 (0-512 on the
683 * DSO-5200*), where the value is a point in the range
684 * represented by the vdiv setting. There are 8 vertical divs,
685 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
686 * and 255 = +2V.
687 */
688 /* TODO: Support for DSO-5xxx series 9-bit samples. */
689 ((float *)analog.data)[i] = range / 255 * *(buf + i * 2 + 1 - ch) - range / 2;
6e71ef3b 690 }
417412c8
AJ
691 sr_session_send(sdi, &packet);
692 g_slist_free(analog.meaning->channels);
693
694 channels = channels->next;
3b533202 695 }
1e6b5b93 696 g_free(analog.data);
e749a8cb
BV
697}
698
e98b7f1b
UH
699/*
700 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 701 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 702 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
703 * the libsigrok session bus.
704 */
55462b8b 705static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb 706{
69e19dd7 707 struct sr_dev_inst *sdi;
269971dd 708 struct dev_context *devc;
e749a8cb
BV
709 int num_samples, pre;
710
69e19dd7
BV
711 sdi = transfer->user_data;
712 devc = sdi->priv;
eb8e6cd2
UH
713 sr_spew("receive_transfer(): status %s received %d bytes.",
714 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
715
716 if (transfer->actual_length == 0)
717 /* Nothing to send to the bus. */
718 return;
719
720 num_samples = transfer->actual_length / 2;
721
d4007311 722 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
d9251a2c 723 devc->samp_received + num_samples, devc->framesize);
e749a8cb 724
e98b7f1b
UH
725 /*
726 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
727 * doesn't represent the trigger point. The offset at which the trigger
728 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
729 * from there up the session bus. The samples in the frame buffer
730 * before that trigger point came after the end of the device's frame
731 * buffer was reached, and it wrapped around to overwrite up until the
732 * trigger point.
e749a8cb 733 */
269971dd 734 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 735 /* Trigger point not yet reached. */
269971dd 736 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 737 /* The entire chunk is before the trigger point. */
269971dd 738 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 739 transfer->buffer, num_samples * 2);
269971dd 740 devc->samp_buffered += num_samples;
e749a8cb 741 } else {
e98b7f1b
UH
742 /*
743 * This chunk hits or overruns the trigger point.
e749a8cb 744 * Store the part before the trigger fired, and
e98b7f1b
UH
745 * send the rest up to the session bus.
746 */
269971dd
BV
747 pre = devc->trigger_offset - devc->samp_received;
748 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 749 transfer->buffer, pre * 2);
269971dd 750 devc->samp_buffered += pre;
e749a8cb
BV
751
752 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 753 sr_dbg("Reached trigger point, %d samples buffered.",
d9251a2c 754 devc->samp_buffered);
e749a8cb
BV
755
756 /* Avoid the corner case where the chunk ended at
757 * exactly the trigger point. */
758 if (num_samples > pre)
69e19dd7 759 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
760 num_samples - pre);
761 }
762 } else {
763 /* Already past the trigger point, just send it all out. */
a95f142e 764 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
765 }
766
269971dd 767 devc->samp_received += num_samples;
e749a8cb
BV
768
769 /* Everything in this transfer was either copied to the buffer or
770 * sent to the session bus. */
3b533202
BV
771 g_free(transfer->buffer);
772 libusb_free_transfer(transfer);
3b533202 773
269971dd 774 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
775 /* That was the last chunk in this frame. Send the buffered
776 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 777 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
d9251a2c 778 devc->samp_buffered);
69e19dd7 779 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
16a1dca4
PM
780 g_free(devc->framebuf);
781 devc->framebuf = NULL;
e749a8cb
BV
782
783 /* Mark the end of this frame. */
4c5f7006 784 std_session_send_df_frame_end(sdi);
ae88b97b 785
8f484ca7 786 if (devc->limit_frames && ++devc->num_frames >= devc->limit_frames) {
ae88b97b 787 /* Terminate session */
a3508e33 788 devc->dev_state = STOPPING;
ae88b97b 789 } else {
269971dd 790 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
791 }
792 }
3b533202
BV
793}
794
795static int handle_event(int fd, int revents, void *cb_data)
796{
a3508e33 797 const struct sr_dev_inst *sdi;
3b533202 798 struct timeval tv;
4f840ce9 799 struct sr_dev_driver *di;
269971dd 800 struct dev_context *devc;
4f840ce9 801 struct drv_context *drvc;
ba7dd8bb 802 int num_channels;
6e6eeff4
BV
803 uint32_t trigger_offset;
804 uint8_t capturestate;
3b533202 805
3b533202
BV
806 (void)fd;
807 (void)revents;
808
269971dd 809 sdi = cb_data;
4f840ce9 810 di = sdi->driver;
41812aca 811 drvc = di->context;
269971dd 812 devc = sdi->priv;
a3508e33
BV
813 if (devc->dev_state == STOPPING) {
814 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
815 sr_dbg("Stopping acquisition.");
816 /*
817 * TODO: Doesn't really cancel pending transfers so they might
818 * come in after SR_DF_END is sent.
819 */
102f1239 820 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 821
bee2b016 822 std_session_send_df_end(sdi);
a3508e33
BV
823
824 devc->dev_state = IDLE;
825
826 return TRUE;
827 }
828
3b533202
BV
829 /* Always handle pending libusb events. */
830 tv.tv_sec = tv.tv_usec = 0;
d4abb463 831 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 832
3b533202 833 /* TODO: ugh */
269971dd 834 if (devc->dev_state == NEW_CAPTURE) {
c118080b 835 if (dso_capture_start(sdi) != SR_OK)
3b533202 836 return TRUE;
c118080b 837 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 838 return TRUE;
c118080b 839// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 840// return TRUE;
e98b7f1b 841 sr_dbg("Successfully requested next chunk.");
269971dd 842 devc->dev_state = CAPTURE;
3b533202
BV
843 return TRUE;
844 }
269971dd 845 if (devc->dev_state != CAPTURE)
3b533202
BV
846 return TRUE;
847
c118080b 848 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 849 return TRUE;
3b533202 850
e98b7f1b
UH
851 sr_dbg("Capturestate %d.", capturestate);
852 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
853 switch (capturestate) {
854 case CAPTURE_EMPTY:
269971dd
BV
855 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
856 devc->capture_empty_count = 0;
c118080b 857 if (dso_capture_start(sdi) != SR_OK)
3b533202 858 break;
c118080b 859 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 860 break;
c93f1138
MS
861 if (!strcmp("forced", devc->triggersource)) {
862 if (dso_force_trigger(sdi) != SR_OK)
863 break;
864 }
e98b7f1b 865 sr_dbg("Successfully requested next chunk.");
3b533202
BV
866 }
867 break;
868 case CAPTURE_FILLING:
e98b7f1b 869 /* No data yet. */
3b533202
BV
870 break;
871 case CAPTURE_READY_8BIT:
ab8df2b1 872 case CAPTURE_READY_2250:
e749a8cb 873 /* Remember where in the captured frame the trigger is. */
269971dd 874 devc->trigger_offset = trigger_offset;
e749a8cb 875
417412c8 876 num_channels = (devc->ch_enabled[0] && devc->ch_enabled[1]) ? 2 : 1;
a95f142e 877 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 878 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 879
3b533202 880 /* Tell the scope to send us the first frame. */
69e19dd7 881 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 882 break;
ae88b97b 883
e98b7f1b
UH
884 /*
885 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
886 * the data we just told the scope to send.
887 */
269971dd 888 devc->dev_state = FETCH_DATA;
ae88b97b
BV
889
890 /* Tell the frontend a new frame is on the way. */
4c5f7006 891 std_session_send_df_frame_begin(sdi);
3b533202
BV
892 break;
893 case CAPTURE_READY_9BIT:
894 /* TODO */
e98b7f1b 895 sr_err("Not yet supported.");
3b533202
BV
896 break;
897 case CAPTURE_TIMEOUT:
898 /* Doesn't matter, we'll try again next time. */
899 break;
900 default:
e98b7f1b
UH
901 sr_dbg("Unknown capture state: %d.", capturestate);
902 break;
3b533202
BV
903 }
904
905 return TRUE;
906}
907
695dc859 908static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 909{
269971dd 910 struct dev_context *devc;
4f840ce9 911 struct sr_dev_driver *di = sdi->driver;
41812aca 912 struct drv_context *drvc = di->context;
3b533202 913
269971dd 914 devc = sdi->priv;
3b533202 915
ba7dd8bb
UH
916 if (configure_channels(sdi) != SR_OK) {
917 sr_err("Failed to configure channels.");
014359e3
BV
918 return SR_ERR;
919 }
920
c118080b 921 if (dso_init(sdi) != SR_OK)
3b533202
BV
922 return SR_ERR;
923
c118080b 924 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
925 return SR_ERR;
926
269971dd 927 devc->dev_state = CAPTURE;
102f1239 928 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 929
bee2b016 930 std_session_send_df_header(sdi);
3b533202 931
3b533202
BV
932 return SR_OK;
933}
934
695dc859 935static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 936{
269971dd
BV
937 struct dev_context *devc;
938
a3508e33
BV
939 devc = sdi->priv;
940 devc->dev_state = STOPPING;
8f484ca7 941 devc->num_frames = 0;
3b533202
BV
942
943 return SR_OK;
944}
945
dd5c48a6 946static struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
947 .name = "hantek-dso",
948 .longname = "Hantek DSO",
949 .api_version = 1,
c2fdcc25 950 .init = std_init,
700d6b64 951 .cleanup = std_cleanup,
6078d2c9 952 .scan = scan,
c01bf34c 953 .dev_list = std_dev_list,
3b412e3a 954 .dev_clear = dev_clear,
79917848 955 .config_get = config_get,
035a1078 956 .config_set = config_set,
a1c743fc 957 .config_list = config_list,
6078d2c9
UH
958 .dev_open = dev_open,
959 .dev_close = dev_close,
960 .dev_acquisition_start = dev_acquisition_start,
961 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 962 .context = NULL,
3b533202 963};
dd5c48a6 964SR_REGISTER_DEV_DRIVER(hantek_dso_driver_info);