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Construct driver array at runtime, from an array of per-file arrays.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
584560f1 43static const uint32_t scanopts[] = {
624f5b4c
BV
44 SR_CONF_CONN,
45};
46
5ecd9049 47static const uint32_t drvopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
933defaa
BV
49};
50
5ecd9049
BV
51static const uint32_t devopts[] = {
52 SR_CONF_CONTINUOUS | SR_CONF_SET,
53 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
54 SR_CONF_CONN | SR_CONF_GET,
55 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
57 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
58 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 61 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
62};
63
933defaa
BV
64static const uint32_t devopts_cg[] = {
65 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
66 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
67 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
68};
69
ba7dd8bb 70static const char *channel_names[] = {
78693401 71 "CH1", "CH2",
3b533202
BV
72 NULL,
73};
74
034accb5
BV
75static const uint64_t buffersizes_32k[] = {
76 10240, 32768,
77};
78static const uint64_t buffersizes_512k[] = {
79 10240, 524288,
80};
81static const uint64_t buffersizes_14k[] = {
82 10240, 14336,
83};
84
62bb8840 85static const struct dso_profile dev_profiles[] = {
88a13f30 86 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 87 "Hantek", "DSO-2090",
034accb5 88 buffersizes_32k,
7b78b2f7 89 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
90 { 0x04b4, 0x2150, 0x04b5, 0x2150,
91 "Hantek", "DSO-2150",
034accb5 92 buffersizes_32k,
7b78b2f7 93 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
94 { 0x04b4, 0x2250, 0x04b5, 0x2250,
95 "Hantek", "DSO-2250",
034accb5 96 buffersizes_512k,
7b78b2f7 97 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
98 { 0x04b4, 0x5200, 0x04b5, 0x5200,
99 "Hantek", "DSO-5200",
034accb5 100 buffersizes_14k,
7b78b2f7 101 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
102 { 0x04b4, 0x520a, 0x04b5, 0x520a,
103 "Hantek", "DSO-5200A",
034accb5 104 buffersizes_512k,
7b78b2f7 105 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 106 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
107};
108
86bb3f4a 109static const uint64_t timebases[][2] = {
a370ef19
BV
110 /* microseconds */
111 { 10, 1000000 },
112 { 20, 1000000 },
113 { 40, 1000000 },
114 { 100, 1000000 },
115 { 200, 1000000 },
116 { 400, 1000000 },
117 /* milliseconds */
118 { 1, 1000 },
119 { 2, 1000 },
120 { 4, 1000 },
121 { 10, 1000 },
122 { 20, 1000 },
123 { 40, 1000 },
124 { 100, 1000 },
125 { 200, 1000 },
126 { 400, 1000 },
a370ef19
BV
127};
128
86bb3f4a 129static const uint64_t vdivs[][2] = {
313deed2
BV
130 /* millivolts */
131 { 10, 1000 },
132 { 20, 1000 },
133 { 50, 1000 },
134 { 100, 1000 },
135 { 200, 1000 },
136 { 500, 1000 },
137 /* volts */
138 { 1, 1 },
139 { 2, 1 },
140 { 5, 1 },
313deed2
BV
141};
142
62bb8840 143static const char *trigger_sources[] = {
a370ef19
BV
144 "CH1",
145 "CH2",
146 "EXT",
88a13f30 147 /* TODO: forced */
a370ef19 148};
3b533202 149
933defaa
BV
150static const char *trigger_slopes[] = {
151 "r",
152 "f",
ebb781a6
BV
153};
154
62bb8840 155static const char *coupling[] = {
b58fbd99
BV
156 "AC",
157 "DC",
158 "GND",
b58fbd99
BV
159};
160
982947f7 161SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 162static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 163
6078d2c9 164static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 165
395206f4 166static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
167{
168 struct sr_dev_inst *sdi;
ba7dd8bb 169 struct sr_channel *ch;
933defaa 170 struct sr_channel_group *cg;
269971dd
BV
171 struct drv_context *drvc;
172 struct dev_context *devc;
87ca93c5 173 int i;
3b533202 174
aac29cc1 175 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
176 sdi->status = SR_ST_INITIALIZING;
177 sdi->vendor = g_strdup(prof->vendor);
178 sdi->model = g_strdup(prof->model);
a873c594 179 sdi->driver = di;
3b533202 180
e98b7f1b 181 /*
ba7dd8bb 182 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
183 * a trigger source internal to the device.
184 */
ba7dd8bb 185 for (i = 0; channel_names[i]; i++) {
5e23fcab 186 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
187 cg = g_malloc0(sizeof(struct sr_channel_group));
188 cg->name = g_strdup(channel_names[i]);
189 cg->channels = g_slist_append(cg->channels, ch);
190 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
191 }
192
933defaa 193 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
194 devc->profile = prof;
195 devc->dev_state = IDLE;
196 devc->timebase = DEFAULT_TIMEBASE;
197 devc->ch1_enabled = TRUE;
198 devc->ch2_enabled = TRUE;
933defaa
BV
199 devc->voltage[0] = DEFAULT_VOLTAGE;
200 devc->voltage[1] = DEFAULT_VOLTAGE;
201 devc->coupling[0] = DEFAULT_COUPLING;
202 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
203 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
204 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
205 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
206 devc->framesize = DEFAULT_FRAMESIZE;
207 devc->triggerslope = SLOPE_POSITIVE;
208 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
209 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
210 sdi->priv = devc;
a873c594 211 drvc = di->priv;
269971dd 212 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
213
214 return sdi;
215}
216
ba7dd8bb 217static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 218{
014359e3 219 struct dev_context *devc;
ba7dd8bb 220 struct sr_channel *ch;
62bb8840 221 const GSList *l;
69e19dd7 222 int p;
3b533202 223
014359e3
BV
224 devc = sdi->priv;
225
ba7dd8bb 226 g_slist_free(devc->enabled_channels);
269971dd 227 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
228 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
229 ch = l->data;
69e19dd7 230 if (p == 0)
ba7dd8bb 231 devc->ch1_enabled = ch->enabled;
69e19dd7 232 else
ba7dd8bb
UH
233 devc->ch2_enabled = ch->enabled;
234 if (ch->enabled)
235 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
236 }
237
238 return SR_OK;
239}
240
949b3dc0 241static void clear_dev_context(void *priv)
39cfdd75 242{
269971dd 243 struct dev_context *devc;
39cfdd75 244
949b3dc0
BV
245 devc = priv;
246 g_free(devc->triggersource);
ba7dd8bb 247 g_slist_free(devc->enabled_channels);
39cfdd75 248
949b3dc0 249}
39cfdd75 250
3b412e3a 251static int dev_clear(void)
949b3dc0
BV
252{
253 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
254}
255
6078d2c9 256static int init(struct sr_context *sr_ctx)
61136ea6 257{
f6beaac5 258 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
259}
260
6078d2c9 261static GSList *scan(GSList *options)
3b533202 262{
269971dd
BV
263 struct drv_context *drvc;
264 struct dev_context *devc;
294dbac7 265 struct sr_dev_inst *sdi;
46a743c1
BV
266 struct sr_usb_dev_inst *usb;
267 struct sr_config *src;
294dbac7
BV
268 const struct dso_profile *prof;
269 GSList *l, *devices, *conn_devices;
39cfdd75 270 struct libusb_device_descriptor des;
3b533202 271 libusb_device **devlist;
395206f4 272 int ret, i, j;
46a743c1 273 const char *conn;
395206f4 274 char connection_id[64];
e98b7f1b 275
a873c594 276 drvc = di->priv;
39cfdd75 277
4b97c74e
UH
278 devices = 0;
279
294dbac7
BV
280 conn = NULL;
281 for (l = options; l; l = l->next) {
282 src = l->data;
283 if (src->key == SR_CONF_CONN) {
284 conn = g_variant_get_string(src->data, NULL);
285 break;
286 }
287 }
288 if (conn)
289 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
290 else
291 conn_devices = NULL;
292
39cfdd75 293 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 294 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 295 for (i = 0; devlist[i]; i++) {
46a743c1 296 if (conn) {
294dbac7
BV
297 usb = NULL;
298 for (l = conn_devices; l; l = l->next) {
299 usb = l->data;
300 if (usb->bus == libusb_get_bus_number(devlist[i])
301 && usb->address == libusb_get_device_address(devlist[i]))
302 break;
303 }
304 if (!l)
305 /* This device matched none of the ones that
306 * matched the conn specification. */
307 continue;
46a743c1 308 }
294dbac7 309
61136ea6 310 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71 311 sr_err("Failed to get device descriptor: %s.",
46a743c1 312 libusb_error_name(ret));
3b533202
BV
313 continue;
314 }
315
395206f4
SA
316 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
317
3b533202
BV
318 prof = NULL;
319 for (j = 0; dev_profiles[j].orig_vid; j++) {
320 if (des.idVendor == dev_profiles[j].orig_vid
321 && des.idProduct == dev_profiles[j].orig_pid) {
322 /* Device matches the pre-firmware profile. */
323 prof = &dev_profiles[j];
e98b7f1b 324 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
325 sdi = dso_dev_new(prof);
326 sdi->connection_id = g_strdup(connection_id);
39cfdd75 327 devices = g_slist_append(devices, sdi);
269971dd 328 devc = sdi->priv;
3b533202
BV
329 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
330 prof->firmware) == SR_OK)
331 /* Remember when the firmware on this device was updated */
269971dd 332 devc->fw_updated = g_get_monotonic_time();
3b533202 333 else
395206f4 334 sr_err("Firmware upload failed");
3b533202 335 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 336 sdi->conn = sr_usb_dev_inst_new(
3b533202 337 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
338 break;
339 } else if (des.idVendor == dev_profiles[j].fw_vid
340 && des.idProduct == dev_profiles[j].fw_pid) {
341 /* Device matches the post-firmware profile. */
342 prof = &dev_profiles[j];
e98b7f1b 343 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
344 sdi = dso_dev_new(prof);
345 sdi->connection_id = g_strdup(connection_id);
3b533202 346 sdi->status = SR_ST_INACTIVE;
39cfdd75 347 devices = g_slist_append(devices, sdi);
d0eec1ee 348 sdi->inst_type = SR_INST_USB;
c118080b 349 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
350 libusb_get_bus_number(devlist[i]),
351 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
352 break;
353 }
354 }
355 if (!prof)
356 /* not a supported VID/PID */
357 continue;
358 }
359 libusb_free_device_list(devlist, 1);
360
39cfdd75 361 return devices;
3b533202
BV
362}
363
6078d2c9 364static GSList *dev_list(void)
811deee4 365{
0e94d524 366 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
367}
368
6078d2c9 369static int dev_open(struct sr_dev_inst *sdi)
3b533202 370{
269971dd 371 struct dev_context *devc;
c118080b 372 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
373 int64_t timediff_us, timediff_ms;
374 int err;
3b533202 375
269971dd 376 devc = sdi->priv;
c118080b 377 usb = sdi->conn;
3b533202
BV
378
379 /*
e98b7f1b
UH
380 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
381 * for the FX2 to renumerate.
3b533202 382 */
fc8fe3e3 383 err = SR_ERR;
269971dd 384 if (devc->fw_updated > 0) {
e98b7f1b
UH
385 sr_info("Waiting for device to reset.");
386 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 387 g_usleep(300 * 1000);
fc8fe3e3
BV
388 timediff_ms = 0;
389 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 390 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
391 break;
392 g_usleep(100 * 1000);
269971dd 393 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 394 timediff_ms = timediff_us / 1000;
e98b7f1b 395 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 396 }
e98b7f1b 397 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 398 } else {
25a0f108 399 err = dso_open(sdi);
3b533202
BV
400 }
401
402 if (err != SR_OK) {
e98b7f1b 403 sr_err("Unable to open device.");
3b533202
BV
404 return SR_ERR;
405 }
406
c118080b 407 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 408 if (err != 0) {
d4928d71 409 sr_err("Unable to claim interface: %s.",
46a743c1 410 libusb_error_name(err));
3b533202
BV
411 return SR_ERR;
412 }
413
414 return SR_OK;
415}
416
6078d2c9 417static int dev_close(struct sr_dev_inst *sdi)
3b533202 418{
3b533202
BV
419 dso_close(sdi);
420
421 return SR_OK;
422}
423
6078d2c9 424static int cleanup(void)
3b533202 425{
3b412e3a 426 return dev_clear();
3b533202
BV
427}
428
584560f1 429static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 430 const struct sr_channel_group *cg)
79917848 431{
933defaa 432 struct dev_context *devc;
624f5b4c 433 struct sr_usb_dev_inst *usb;
933defaa
BV
434 char str[128], *s;
435 const uint64_t *vdiv;
436 int ch_idx;
79917848 437
53b4680f 438 (void)cg;
8f996b89 439
584560f1 440 switch (key) {
bf622e6d 441 case SR_CONF_NUM_HDIV:
79917848
BV
442 *data = g_variant_new_int32(NUM_TIMEBASE);
443 break;
444 case SR_CONF_NUM_VDIV:
445 *data = g_variant_new_int32(NUM_VDIV);
446 break;
933defaa
BV
447 }
448
449 if (!sdi)
450 return SR_ERR_ARG;
451
452 devc = sdi->priv;
453 if (!cg) {
454 switch (key) {
455 case SR_CONF_CONN:
456 if (!sdi->conn)
457 return SR_ERR_ARG;
458 usb = sdi->conn;
459 if (usb->address == 255)
460 /* Device still needs to re-enumerate after firmware
461 * upload, so we don't know its (future) address. */
462 return SR_ERR;
463 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
464 *data = g_variant_new_string(str);
465 break;
466 case SR_CONF_TIMEBASE:
467 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
468 timebases[devc->timebase][1]);
469 break;
470 case SR_CONF_BUFFERSIZE:
471 *data = g_variant_new_uint64(devc->framesize);
472 break;
473 case SR_CONF_TRIGGER_SOURCE:
474 *data = g_variant_new_string(devc->triggersource);
475 break;
476 case SR_CONF_TRIGGER_SLOPE:
477 if (devc->triggerslope == SLOPE_POSITIVE)
478 s = "r";
479 else
480 s = "f";
481 *data = g_variant_new_string(s);
482 break;
483 case SR_CONF_HORIZ_TRIGGERPOS:
484 *data = g_variant_new_double(devc->triggerposition);
485 break;
486 default:
487 return SR_ERR_NA;
488 }
489 } else {
490 if (sdi->channel_groups->data == cg)
491 ch_idx = 0;
492 else if (sdi->channel_groups->next->data == cg)
493 ch_idx = 1;
494 else
495 return SR_ERR_ARG;
496 switch(key) {
497 case SR_CONF_FILTER:
498 *data = g_variant_new_boolean(devc->filter[ch_idx]);
499 break;
500 case SR_CONF_VDIV:
501 vdiv = vdivs[devc->voltage[ch_idx]];
502 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
503 break;
504 case SR_CONF_COUPLING:
505 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
506 break;
507 }
79917848
BV
508 }
509
510 return SR_OK;
511}
512
584560f1 513static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 514 const struct sr_channel_group *cg)
3b533202 515{
269971dd 516 struct dev_context *devc;
f627afd6 517 double tmp_double;
86bb3f4a 518 uint64_t tmp_u64, p, q;
933defaa 519 int tmp_int, ch_idx, ret;
f627afd6
BV
520 unsigned int i;
521 const char *tmp_str;
8f996b89 522
3b533202 523 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 524 return SR_ERR_DEV_CLOSED;
3b533202 525
a370ef19 526 ret = SR_OK;
269971dd 527 devc = sdi->priv;
933defaa
BV
528 if (!cg) {
529 switch (key) {
530 case SR_CONF_LIMIT_FRAMES:
531 devc->limit_frames = g_variant_get_uint64(data);
532 break;
533 case SR_CONF_TRIGGER_SLOPE:
534 tmp_str = g_variant_get_string(data, NULL);
535 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
536 return SR_ERR_ARG;
537 devc->triggerslope = (tmp_str[0] == 'r')
538 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
539 break;
540 case SR_CONF_HORIZ_TRIGGERPOS:
541 tmp_double = g_variant_get_double(data);
542 if (tmp_double < 0.0 || tmp_double > 1.0) {
543 sr_err("Trigger position should be between 0.0 and 1.0.");
544 ret = SR_ERR_ARG;
545 } else
546 devc->triggerposition = tmp_double;
547 break;
548 case SR_CONF_BUFFERSIZE:
549 tmp_u64 = g_variant_get_uint64(data);
550 for (i = 0; i < 2; i++) {
551 if (devc->profile->buffersizes[i] == tmp_u64) {
552 devc->framesize = tmp_u64;
553 break;
554 }
a370ef19 555 }
933defaa
BV
556 if (i == 2)
557 ret = SR_ERR_ARG;
558 break;
559 case SR_CONF_TIMEBASE:
560 g_variant_get(data, "(tt)", &p, &q);
561 tmp_int = -1;
562 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
563 if (timebases[i][0] == p && timebases[i][1] == q) {
564 tmp_int = i;
565 break;
566 }
a370ef19 567 }
933defaa
BV
568 if (tmp_int >= 0)
569 devc->timebase = tmp_int;
570 else
ebb781a6 571 ret = SR_ERR_ARG;
933defaa
BV
572 break;
573 case SR_CONF_TRIGGER_SOURCE:
574 tmp_str = g_variant_get_string(data, NULL);
575 for (i = 0; trigger_sources[i]; i++) {
576 if (!strcmp(tmp_str, trigger_sources[i])) {
577 devc->triggersource = g_strdup(tmp_str);
578 break;
579 }
ebb781a6 580 }
933defaa
BV
581 if (trigger_sources[i] == 0)
582 ret = SR_ERR_ARG;
583 break;
584 default:
585 ret = SR_ERR_NA;
586 break;
ebb781a6 587 }
933defaa
BV
588 } else {
589 if (sdi->channel_groups->data == cg)
590 ch_idx = 0;
591 else if (sdi->channel_groups->next->data == cg)
592 ch_idx = 1;
593 else
594 return SR_ERR_ARG;
595 switch (key) {
596 case SR_CONF_FILTER:
597 devc->filter[ch_idx] = g_variant_get_boolean(data);
598 break;
599 case SR_CONF_VDIV:
600 g_variant_get(data, "(tt)", &p, &q);
601 tmp_int = -1;
602 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
603 if (vdivs[i][0] == p && vdivs[i][1] == q) {
604 tmp_int = i;
605 break;
606 }
313deed2 607 }
933defaa
BV
608 if (tmp_int >= 0) {
609 devc->voltage[ch_idx] = tmp_int;
610 } else
611 ret = SR_ERR_ARG;
612 break;
613 case SR_CONF_COUPLING:
614 tmp_str = g_variant_get_string(data, NULL);
615 for (i = 0; coupling[i]; i++) {
616 if (!strcmp(tmp_str, coupling[i])) {
617 devc->coupling[ch_idx] = i;
618 break;
619 }
b58fbd99 620 }
933defaa
BV
621 if (coupling[i] == 0)
622 ret = SR_ERR_ARG;
623 break;
624 default:
625 ret = SR_ERR_NA;
626 break;
b58fbd99 627 }
3b533202
BV
628 }
629
630 return ret;
631}
632
584560f1 633static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 634 const struct sr_channel_group *cg)
a1c743fc 635{
034accb5 636 struct dev_context *devc;
3973ee26
BV
637 GVariant *tuple, *rational[2];
638 GVariantBuilder gvb;
639 unsigned int i;
a1c743fc 640
933defaa 641 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
642 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
643 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
644 return SR_OK;
645 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 646 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 647 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
648 return SR_OK;
649 }
650
651 if (!sdi)
652 return SR_ERR_ARG;
653
654 if (!cg) {
655 switch (key) {
656 case SR_CONF_DEVICE_OPTIONS:
657 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 658 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
659 break;
660 case SR_CONF_BUFFERSIZE:
661 if (!sdi)
662 return SR_ERR_ARG;
663 devc = sdi->priv;
664 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
665 devc->profile->buffersizes, 2, sizeof(uint64_t));
666 break;
667 case SR_CONF_TIMEBASE:
668 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
669 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
670 rational[0] = g_variant_new_uint64(timebases[i][0]);
671 rational[1] = g_variant_new_uint64(timebases[i][1]);
672 tuple = g_variant_new_tuple(rational, 2);
673 g_variant_builder_add_value(&gvb, tuple);
674 }
675 *data = g_variant_builder_end(&gvb);
676 break;
677 case SR_CONF_TRIGGER_SOURCE:
678 *data = g_variant_new_strv(trigger_sources,
679 ARRAY_SIZE(trigger_sources));
680 break;
681 case SR_CONF_TRIGGER_SLOPE:
682 *data = g_variant_new_strv(trigger_slopes,
683 ARRAY_SIZE(trigger_slopes));
684 break;
685 default:
686 return SR_ERR_NA;
3973ee26 687 }
933defaa
BV
688 } else {
689 switch (key) {
690 case SR_CONF_DEVICE_OPTIONS:
691 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
692 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
693 break;
694 case SR_CONF_COUPLING:
695 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
696 break;
697 case SR_CONF_VDIV:
698 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
699 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
700 rational[0] = g_variant_new_uint64(vdivs[i][0]);
701 rational[1] = g_variant_new_uint64(vdivs[i][1]);
702 tuple = g_variant_new_tuple(rational, 2);
703 g_variant_builder_add_value(&gvb, tuple);
704 }
705 *data = g_variant_builder_end(&gvb);
706 break;
707 default:
708 return SR_ERR_NA;
3973ee26 709 }
a1c743fc
BV
710 }
711
712 return SR_OK;
713}
714
69e19dd7 715static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 716 int num_samples)
3b533202
BV
717{
718 struct sr_datafeed_packet packet;
719 struct sr_datafeed_analog analog;
69e19dd7 720 struct dev_context *devc;
c5841b28 721 float ch1, ch2, range;
ba7dd8bb 722 int num_channels, data_offset, i;
3b533202 723
69e19dd7 724 devc = sdi->priv;
ba7dd8bb 725 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
726 packet.type = SR_DF_ANALOG;
727 packet.payload = &analog;
6e71ef3b 728 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 729 analog.channels = devc->enabled_channels;
e749a8cb 730 analog.num_samples = num_samples;
9956f285
UH
731 analog.mq = SR_MQ_VOLTAGE;
732 analog.unit = SR_UNIT_VOLT;
cf49d66b 733 analog.mqflags = 0;
886a52b6 734 /* TODO: Check malloc return value. */
ba7dd8bb 735 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 736 data_offset = 0;
3b533202 737 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
738 /*
739 * The device always sends data for both channels. If a channel
6e71ef3b 740 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
741 * data. However, we only send the requested channels to
742 * the bus.
c5841b28 743 *
e98b7f1b
UH
744 * Voltage values are encoded as a value 0-255 (0-512 on the
745 * DSO-5200*), where the value is a point in the range
746 * represented by the vdiv setting. There are 8 vertical divs,
747 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
748 * and 255 = +2V.
6e71ef3b 749 */
e98b7f1b 750 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 751 if (devc->ch1_enabled) {
933defaa 752 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 753 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
754 /* Value is centered around 0V. */
755 ch1 -= range / 2;
6e71ef3b
BV
756 analog.data[data_offset++] = ch1;
757 }
269971dd 758 if (devc->ch2_enabled) {
933defaa 759 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 760 ch2 = range / 255 * *(buf + i * 2);
c5841b28 761 ch2 -= range / 2;
6e71ef3b
BV
762 analog.data[data_offset++] = ch2;
763 }
3b533202 764 }
269971dd 765 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
766}
767
e98b7f1b
UH
768/*
769 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 770 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 771 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
772 * the libsigrok session bus.
773 */
774static void receive_transfer(struct libusb_transfer *transfer)
775{
776 struct sr_datafeed_packet packet;
69e19dd7 777 struct sr_dev_inst *sdi;
269971dd 778 struct dev_context *devc;
e749a8cb
BV
779 int num_samples, pre;
780
69e19dd7
BV
781 sdi = transfer->user_data;
782 devc = sdi->priv;
d4007311 783 sr_spew("receive_transfer(): status %d received %d bytes.",
46a743c1 784 transfer->status, transfer->actual_length);
e749a8cb
BV
785
786 if (transfer->actual_length == 0)
787 /* Nothing to send to the bus. */
788 return;
789
790 num_samples = transfer->actual_length / 2;
791
d4007311 792 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 793 devc->samp_received + num_samples, devc->framesize);
e749a8cb 794
e98b7f1b
UH
795 /*
796 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
797 * doesn't represent the trigger point. The offset at which the trigger
798 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
799 * from there up the session bus. The samples in the frame buffer
800 * before that trigger point came after the end of the device's frame
801 * buffer was reached, and it wrapped around to overwrite up until the
802 * trigger point.
e749a8cb 803 */
269971dd 804 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 805 /* Trigger point not yet reached. */
269971dd 806 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 807 /* The entire chunk is before the trigger point. */
269971dd 808 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 809 transfer->buffer, num_samples * 2);
269971dd 810 devc->samp_buffered += num_samples;
e749a8cb 811 } else {
e98b7f1b
UH
812 /*
813 * This chunk hits or overruns the trigger point.
e749a8cb 814 * Store the part before the trigger fired, and
e98b7f1b
UH
815 * send the rest up to the session bus.
816 */
269971dd
BV
817 pre = devc->trigger_offset - devc->samp_received;
818 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 819 transfer->buffer, pre * 2);
269971dd 820 devc->samp_buffered += pre;
e749a8cb
BV
821
822 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 823 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 824 devc->samp_buffered);
e749a8cb
BV
825
826 /* Avoid the corner case where the chunk ended at
827 * exactly the trigger point. */
828 if (num_samples > pre)
69e19dd7 829 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
830 num_samples - pre);
831 }
832 } else {
833 /* Already past the trigger point, just send it all out. */
69e19dd7 834 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
835 num_samples);
836 }
837
269971dd 838 devc->samp_received += num_samples;
e749a8cb
BV
839
840 /* Everything in this transfer was either copied to the buffer or
841 * sent to the session bus. */
3b533202
BV
842 g_free(transfer->buffer);
843 libusb_free_transfer(transfer);
3b533202 844
269971dd 845 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
846 /* That was the last chunk in this frame. Send the buffered
847 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 848 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 849 devc->samp_buffered);
69e19dd7 850 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
851
852 /* Mark the end of this frame. */
ae88b97b 853 packet.type = SR_DF_FRAME_END;
269971dd 854 sr_session_send(devc->cb_data, &packet);
ae88b97b 855
269971dd 856 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 857 /* Terminate session */
a3508e33 858 devc->dev_state = STOPPING;
ae88b97b 859 } else {
269971dd 860 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
861 }
862 }
3b533202
BV
863}
864
865static int handle_event(int fd, int revents, void *cb_data)
866{
a3508e33 867 const struct sr_dev_inst *sdi;
ae88b97b 868 struct sr_datafeed_packet packet;
3b533202 869 struct timeval tv;
269971dd 870 struct dev_context *devc;
a873c594 871 struct drv_context *drvc = di->priv;
ba7dd8bb 872 int num_channels;
6e6eeff4
BV
873 uint32_t trigger_offset;
874 uint8_t capturestate;
3b533202 875
3b533202
BV
876 (void)fd;
877 (void)revents;
878
269971dd
BV
879 sdi = cb_data;
880 devc = sdi->priv;
a3508e33
BV
881 if (devc->dev_state == STOPPING) {
882 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
883 sr_dbg("Stopping acquisition.");
884 /*
885 * TODO: Doesn't really cancel pending transfers so they might
886 * come in after SR_DF_END is sent.
887 */
102f1239 888 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33
BV
889
890 packet.type = SR_DF_END;
891 sr_session_send(sdi, &packet);
892
893 devc->dev_state = IDLE;
894
895 return TRUE;
896 }
897
3b533202
BV
898 /* Always handle pending libusb events. */
899 tv.tv_sec = tv.tv_usec = 0;
d4abb463 900 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 901
3b533202 902 /* TODO: ugh */
269971dd 903 if (devc->dev_state == NEW_CAPTURE) {
c118080b 904 if (dso_capture_start(sdi) != SR_OK)
3b533202 905 return TRUE;
c118080b 906 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 907 return TRUE;
c118080b 908// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 909// return TRUE;
e98b7f1b 910 sr_dbg("Successfully requested next chunk.");
269971dd 911 devc->dev_state = CAPTURE;
3b533202
BV
912 return TRUE;
913 }
269971dd 914 if (devc->dev_state != CAPTURE)
3b533202
BV
915 return TRUE;
916
c118080b 917 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 918 return TRUE;
3b533202 919
e98b7f1b
UH
920 sr_dbg("Capturestate %d.", capturestate);
921 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
922 switch (capturestate) {
923 case CAPTURE_EMPTY:
269971dd
BV
924 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
925 devc->capture_empty_count = 0;
c118080b 926 if (dso_capture_start(sdi) != SR_OK)
3b533202 927 break;
c118080b 928 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 929 break;
c118080b 930// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 931// break;
e98b7f1b 932 sr_dbg("Successfully requested next chunk.");
3b533202
BV
933 }
934 break;
935 case CAPTURE_FILLING:
e98b7f1b 936 /* No data yet. */
3b533202
BV
937 break;
938 case CAPTURE_READY_8BIT:
e749a8cb 939 /* Remember where in the captured frame the trigger is. */
269971dd 940 devc->trigger_offset = trigger_offset;
e749a8cb 941
ba7dd8bb 942 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 943 /* TODO: Check malloc return value. */
ba7dd8bb 944 devc->framebuf = g_try_malloc(devc->framesize * num_channels * 2);
269971dd 945 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 946
3b533202 947 /* Tell the scope to send us the first frame. */
69e19dd7 948 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 949 break;
ae88b97b 950
e98b7f1b
UH
951 /*
952 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
953 * the data we just told the scope to send.
954 */
269971dd 955 devc->dev_state = FETCH_DATA;
ae88b97b
BV
956
957 /* Tell the frontend a new frame is on the way. */
958 packet.type = SR_DF_FRAME_BEGIN;
269971dd 959 sr_session_send(sdi, &packet);
3b533202
BV
960 break;
961 case CAPTURE_READY_9BIT:
962 /* TODO */
e98b7f1b 963 sr_err("Not yet supported.");
3b533202
BV
964 break;
965 case CAPTURE_TIMEOUT:
966 /* Doesn't matter, we'll try again next time. */
967 break;
968 default:
e98b7f1b
UH
969 sr_dbg("Unknown capture state: %d.", capturestate);
970 break;
3b533202
BV
971 }
972
973 return TRUE;
974}
975
6078d2c9 976static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 977{
269971dd 978 struct dev_context *devc;
a873c594 979 struct drv_context *drvc = di->priv;
3b533202 980
3b533202 981 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 982 return SR_ERR_DEV_CLOSED;
3b533202 983
269971dd
BV
984 devc = sdi->priv;
985 devc->cb_data = cb_data;
3b533202 986
ba7dd8bb
UH
987 if (configure_channels(sdi) != SR_OK) {
988 sr_err("Failed to configure channels.");
014359e3
BV
989 return SR_ERR;
990 }
991
c118080b 992 if (dso_init(sdi) != SR_OK)
3b533202
BV
993 return SR_ERR;
994
c118080b 995 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
996 return SR_ERR;
997
269971dd 998 devc->dev_state = CAPTURE;
102f1239 999 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202
BV
1000
1001 /* Send header packet to the session bus. */
29a27196 1002 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 1003
3b533202
BV
1004 return SR_OK;
1005}
1006
6078d2c9 1007static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 1008{
269971dd
BV
1009 struct dev_context *devc;
1010
1011 (void)cb_data;
3b533202 1012
3b533202
BV
1013 if (sdi->status != SR_ST_ACTIVE)
1014 return SR_ERR;
1015
a3508e33
BV
1016 devc = sdi->priv;
1017 devc->dev_state = STOPPING;
3b533202
BV
1018
1019 return SR_OK;
1020}
1021
62bb8840 1022SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1023 .name = "hantek-dso",
1024 .longname = "Hantek DSO",
1025 .api_version = 1,
6078d2c9
UH
1026 .init = init,
1027 .cleanup = cleanup,
1028 .scan = scan,
1029 .dev_list = dev_list,
3b412e3a 1030 .dev_clear = dev_clear,
79917848 1031 .config_get = config_get,
035a1078 1032 .config_set = config_set,
a1c743fc 1033 .config_list = config_list,
6078d2c9
UH
1034 .dev_open = dev_open,
1035 .dev_close = dev_close,
1036 .dev_acquisition_start = dev_acquisition_start,
1037 .dev_acquisition_stop = dev_acquisition_stop,
269971dd 1038 .priv = NULL,
3b533202 1039};