]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-dso/api.c
hantek-dso: Add missing SR_PRIV.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
417412c8 21#include <math.h>
3b533202
BV
22#include <stdio.h>
23#include <stdint.h>
24#include <stdlib.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <fcntl.h>
28#include <unistd.h>
29#include <string.h>
30#include <sys/time.h>
31#include <inttypes.h>
3b533202
BV
32#include <glib.h>
33#include <libusb.h>
c1aae900 34#include <libsigrok/libsigrok.h>
45c59c8b 35#include "libsigrok-internal.h"
caeb8d7a 36#include "protocol.h"
3b533202 37
fc8fe3e3
BV
38/* Max time in ms before we want to check on USB events */
39/* TODO tune this properly */
e98b7f1b 40#define TICK 1
3b533202 41
d9251a2c
UH
42#define NUM_TIMEBASE 10
43#define NUM_VDIV 8
79917848 44
07ffa5b3
UH
45#define NUM_BUFFER_SIZES 2
46
584560f1 47static const uint32_t scanopts[] = {
624f5b4c
BV
48 SR_CONF_CONN,
49};
50
5ecd9049 51static const uint32_t drvopts[] = {
1953564a 52 SR_CONF_OSCILLOSCOPE,
933defaa
BV
53};
54
5ecd9049 55static const uint32_t devopts[] = {
e91bb0a6 56 SR_CONF_CONTINUOUS,
933defaa 57 SR_CONF_CONN | SR_CONF_GET,
86621306 58 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa 59 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
95983cc3 61 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
933defaa
BV
62 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
86621306 64 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3b2b7031 65 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 66 SR_CONF_NUM_VDIV | SR_CONF_GET,
12f62ce6 67 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
3b533202
BV
68};
69
933defaa 70static const uint32_t devopts_cg[] = {
933defaa
BV
71 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
72 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 73 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
933defaa
BV
74};
75
ba7dd8bb 76static const char *channel_names[] = {
78693401 77 "CH1", "CH2",
3b533202
BV
78};
79
034accb5 80static const uint64_t buffersizes_32k[] = {
1a46cc62 81 (10 * 1024), (32 * 1024),
034accb5
BV
82};
83static const uint64_t buffersizes_512k[] = {
1a46cc62 84 (10 * 1024), (512 * 1024),
034accb5
BV
85};
86static const uint64_t buffersizes_14k[] = {
1a46cc62 87 (10 * 1024), (14 * 1024),
034accb5
BV
88};
89
62bb8840 90static const struct dso_profile dev_profiles[] = {
88a13f30 91 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 92 "Hantek", "DSO-2090",
034accb5 93 buffersizes_32k,
8e2d6c9d 94 "hantek-dso-2090.fw" },
88a13f30
BV
95 { 0x04b4, 0x2150, 0x04b5, 0x2150,
96 "Hantek", "DSO-2150",
034accb5 97 buffersizes_32k,
8e2d6c9d 98 "hantek-dso-2150.fw" },
88a13f30
BV
99 { 0x04b4, 0x2250, 0x04b5, 0x2250,
100 "Hantek", "DSO-2250",
034accb5 101 buffersizes_512k,
8e2d6c9d 102 "hantek-dso-2250.fw" },
88a13f30
BV
103 { 0x04b4, 0x5200, 0x04b5, 0x5200,
104 "Hantek", "DSO-5200",
034accb5 105 buffersizes_14k,
8e2d6c9d 106 "hantek-dso-5200.fw" },
88a13f30
BV
107 { 0x04b4, 0x520a, 0x04b5, 0x520a,
108 "Hantek", "DSO-5200A",
034accb5 109 buffersizes_512k,
8e2d6c9d 110 "hantek-dso-5200A.fw" },
1b4aedc0 111 ALL_ZERO
a370ef19
BV
112};
113
86bb3f4a 114static const uint64_t timebases[][2] = {
a370ef19
BV
115 /* microseconds */
116 { 10, 1000000 },
117 { 20, 1000000 },
118 { 40, 1000000 },
119 { 100, 1000000 },
120 { 200, 1000000 },
121 { 400, 1000000 },
122 /* milliseconds */
123 { 1, 1000 },
124 { 2, 1000 },
125 { 4, 1000 },
126 { 10, 1000 },
127 { 20, 1000 },
128 { 40, 1000 },
129 { 100, 1000 },
130 { 200, 1000 },
131 { 400, 1000 },
a370ef19
BV
132};
133
11e33196
PM
134static const uint64_t samplerates[] = {
135 SR_KHZ(20),
136 SR_KHZ(25),
137 SR_KHZ(50),
138 SR_KHZ(100),
139 SR_KHZ(200),
140 SR_KHZ(250),
141 SR_KHZ(500),
142 SR_MHZ(1),
143 SR_MHZ(2),
144 SR_MHZ(5),
145 SR_MHZ(10),
146 SR_MHZ(20),
147 SR_MHZ(25),
148 SR_MHZ(50),
149 SR_MHZ(100),
150 SR_MHZ(125),
ab8df2b1 151 /* Fast mode not supported yet.
11e33196
PM
152 SR_MHZ(200),
153 SR_MHZ(250), */
154};
155
86bb3f4a 156static const uint64_t vdivs[][2] = {
313deed2
BV
157 /* millivolts */
158 { 10, 1000 },
159 { 20, 1000 },
160 { 50, 1000 },
161 { 100, 1000 },
162 { 200, 1000 },
163 { 500, 1000 },
164 /* volts */
165 { 1, 1 },
166 { 2, 1 },
167 { 5, 1 },
313deed2
BV
168};
169
62bb8840 170static const char *trigger_sources[] = {
f8195cb2 171 "CH1", "CH2", "EXT",
88a13f30 172 /* TODO: forced */
a370ef19 173};
3b533202 174
933defaa 175static const char *trigger_slopes[] = {
f8195cb2 176 "r", "f",
ebb781a6
BV
177};
178
62bb8840 179static const char *coupling[] = {
f8195cb2 180 "AC", "DC", "GND",
b58fbd99
BV
181};
182
15a5bfe4 183static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
184{
185 struct sr_dev_inst *sdi;
ba7dd8bb 186 struct sr_channel *ch;
933defaa 187 struct sr_channel_group *cg;
269971dd 188 struct dev_context *devc;
dcd438ee 189 unsigned int i;
3b533202 190
aac29cc1 191 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
192 sdi->status = SR_ST_INITIALIZING;
193 sdi->vendor = g_strdup(prof->vendor);
194 sdi->model = g_strdup(prof->model);
3b533202 195
e98b7f1b 196 /*
ba7dd8bb 197 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
198 * a trigger source internal to the device.
199 */
0f34cb47 200 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 201 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
202 cg = g_malloc0(sizeof(struct sr_channel_group));
203 cg->name = g_strdup(channel_names[i]);
204 cg->channels = g_slist_append(cg->channels, ch);
205 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
206 }
207
933defaa 208 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
209 devc->profile = prof;
210 devc->dev_state = IDLE;
211 devc->timebase = DEFAULT_TIMEBASE;
11e33196 212 devc->samplerate = DEFAULT_SAMPLERATE;
417412c8
AJ
213 devc->ch_enabled[0] = TRUE;
214 devc->ch_enabled[1] = TRUE;
933defaa
BV
215 devc->voltage[0] = DEFAULT_VOLTAGE;
216 devc->voltage[1] = DEFAULT_VOLTAGE;
217 devc->coupling[0] = DEFAULT_COUPLING;
218 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
219 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
220 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
221 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
222 devc->framesize = DEFAULT_FRAMESIZE;
223 devc->triggerslope = SLOPE_POSITIVE;
224 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
95983cc3 225 devc->capture_ratio = DEFAULT_CAPTURE_RATIO;
269971dd 226 sdi->priv = devc;
3b533202
BV
227
228 return sdi;
229}
230
ba7dd8bb 231static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 232{
014359e3 233 struct dev_context *devc;
ba7dd8bb 234 struct sr_channel *ch;
62bb8840 235 const GSList *l;
69e19dd7 236 int p;
3b533202 237
014359e3
BV
238 devc = sdi->priv;
239
ba7dd8bb 240 g_slist_free(devc->enabled_channels);
be10b96d 241 devc->enabled_channels = NULL;
417412c8 242 devc->ch_enabled[0] = devc->ch_enabled[1] = FALSE;
ba7dd8bb
UH
243 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
244 ch = l->data;
69e19dd7 245 if (p == 0)
417412c8 246 devc->ch_enabled[0] = ch->enabled;
69e19dd7 247 else
417412c8 248 devc->ch_enabled[1] = ch->enabled;
ba7dd8bb
UH
249 if (ch->enabled)
250 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
251 }
252
253 return SR_OK;
254}
255
3553451f 256static void clear_helper(struct dev_context *devc)
39cfdd75 257{
949b3dc0 258 g_free(devc->triggersource);
ba7dd8bb 259 g_slist_free(devc->enabled_channels);
949b3dc0 260}
39cfdd75 261
4f840ce9 262static int dev_clear(const struct sr_dev_driver *di)
949b3dc0 263{
3553451f 264 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
39cfdd75
BV
265}
266
4f840ce9 267static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 268{
269971dd
BV
269 struct drv_context *drvc;
270 struct dev_context *devc;
294dbac7 271 struct sr_dev_inst *sdi;
46a743c1
BV
272 struct sr_usb_dev_inst *usb;
273 struct sr_config *src;
294dbac7
BV
274 const struct dso_profile *prof;
275 GSList *l, *devices, *conn_devices;
39cfdd75 276 struct libusb_device_descriptor des;
3b533202 277 libusb_device **devlist;
2a8f2d41 278 int i, j;
46a743c1 279 const char *conn;
395206f4 280 char connection_id[64];
e98b7f1b 281
41812aca 282 drvc = di->context;
39cfdd75 283
4b97c74e
UH
284 devices = 0;
285
294dbac7
BV
286 conn = NULL;
287 for (l = options; l; l = l->next) {
288 src = l->data;
289 if (src->key == SR_CONF_CONN) {
290 conn = g_variant_get_string(src->data, NULL);
291 break;
292 }
293 }
294 if (conn)
295 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
296 else
297 conn_devices = NULL;
298
39cfdd75 299 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 300 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 301 for (i = 0; devlist[i]; i++) {
46a743c1 302 if (conn) {
294dbac7
BV
303 usb = NULL;
304 for (l = conn_devices; l; l = l->next) {
305 usb = l->data;
306 if (usb->bus == libusb_get_bus_number(devlist[i])
307 && usb->address == libusb_get_device_address(devlist[i]))
308 break;
309 }
310 if (!l)
311 /* This device matched none of the ones that
312 * matched the conn specification. */
313 continue;
46a743c1 314 }
294dbac7 315
2a8f2d41 316 libusb_get_device_descriptor(devlist[i], &des);
3b533202 317
395206f4
SA
318 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
319
3b533202
BV
320 prof = NULL;
321 for (j = 0; dev_profiles[j].orig_vid; j++) {
322 if (des.idVendor == dev_profiles[j].orig_vid
323 && des.idProduct == dev_profiles[j].orig_pid) {
324 /* Device matches the pre-firmware profile. */
325 prof = &dev_profiles[j];
e98b7f1b 326 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 327 sdi = dso_dev_new(prof);
395206f4 328 sdi->connection_id = g_strdup(connection_id);
39cfdd75 329 devices = g_slist_append(devices, sdi);
269971dd 330 devc = sdi->priv;
8e2d6c9d
DE
331 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
332 USB_CONFIGURATION, prof->firmware) == SR_OK)
3b533202 333 /* Remember when the firmware on this device was updated */
269971dd 334 devc->fw_updated = g_get_monotonic_time();
3b533202 335 else
395206f4 336 sr_err("Firmware upload failed");
3b533202 337 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 338 sdi->conn = sr_usb_dev_inst_new(
3b533202 339 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
340 break;
341 } else if (des.idVendor == dev_profiles[j].fw_vid
342 && des.idProduct == dev_profiles[j].fw_pid) {
343 /* Device matches the post-firmware profile. */
344 prof = &dev_profiles[j];
e98b7f1b 345 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 346 sdi = dso_dev_new(prof);
395206f4 347 sdi->connection_id = g_strdup(connection_id);
3b533202 348 sdi->status = SR_ST_INACTIVE;
39cfdd75 349 devices = g_slist_append(devices, sdi);
d0eec1ee 350 sdi->inst_type = SR_INST_USB;
c118080b 351 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
352 libusb_get_bus_number(devlist[i]),
353 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
354 break;
355 }
356 }
357 if (!prof)
358 /* not a supported VID/PID */
359 continue;
360 }
361 libusb_free_device_list(devlist, 1);
362
15a5bfe4 363 return std_scan_complete(di, devices);
3b533202
BV
364}
365
6078d2c9 366static int dev_open(struct sr_dev_inst *sdi)
3b533202 367{
269971dd 368 struct dev_context *devc;
c118080b 369 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
370 int64_t timediff_us, timediff_ms;
371 int err;
3b533202 372
269971dd 373 devc = sdi->priv;
c118080b 374 usb = sdi->conn;
3b533202
BV
375
376 /*
e98b7f1b
UH
377 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
378 * for the FX2 to renumerate.
3b533202 379 */
fc8fe3e3 380 err = SR_ERR;
269971dd 381 if (devc->fw_updated > 0) {
e98b7f1b
UH
382 sr_info("Waiting for device to reset.");
383 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 384 g_usleep(300 * 1000);
fc8fe3e3
BV
385 timediff_ms = 0;
386 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 387 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
388 break;
389 g_usleep(100 * 1000);
269971dd 390 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 391 timediff_ms = timediff_us / 1000;
e98b7f1b 392 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 393 }
6433156c 394 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 395 } else {
25a0f108 396 err = dso_open(sdi);
3b533202
BV
397 }
398
399 if (err != SR_OK) {
e98b7f1b 400 sr_err("Unable to open device.");
3b533202
BV
401 return SR_ERR;
402 }
403
c118080b 404 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 405 if (err != 0) {
d4928d71 406 sr_err("Unable to claim interface: %s.",
d9251a2c 407 libusb_error_name(err));
3b533202
BV
408 return SR_ERR;
409 }
410
411 return SR_OK;
412}
413
6078d2c9 414static int dev_close(struct sr_dev_inst *sdi)
3b533202 415{
3b533202
BV
416 dso_close(sdi);
417
418 return SR_OK;
419}
420
dd7a72ea
UH
421static int config_get(uint32_t key, GVariant **data,
422 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
79917848 423{
933defaa 424 struct dev_context *devc;
624f5b4c 425 struct sr_usb_dev_inst *usb;
2c240774 426 const char *s;
933defaa
BV
427 const uint64_t *vdiv;
428 int ch_idx;
79917848 429
584560f1 430 switch (key) {
bf622e6d 431 case SR_CONF_NUM_HDIV:
79917848
BV
432 *data = g_variant_new_int32(NUM_TIMEBASE);
433 break;
434 case SR_CONF_NUM_VDIV:
435 *data = g_variant_new_int32(NUM_VDIV);
436 break;
933defaa
BV
437 }
438
439 if (!sdi)
440 return SR_ERR_ARG;
441
442 devc = sdi->priv;
443 if (!cg) {
444 switch (key) {
12f62ce6
PM
445 case SR_CONF_TRIGGER_LEVEL:
446 *data = g_variant_new_double(devc->voffset_trigger);
447 break;
933defaa
BV
448 case SR_CONF_CONN:
449 if (!sdi->conn)
450 return SR_ERR_ARG;
451 usb = sdi->conn;
452 if (usb->address == 255)
453 /* Device still needs to re-enumerate after firmware
454 * upload, so we don't know its (future) address. */
455 return SR_ERR;
95c1fe62 456 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
933defaa
BV
457 break;
458 case SR_CONF_TIMEBASE:
459 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
460 timebases[devc->timebase][1]);
461 break;
3b2b7031 462 case SR_CONF_SAMPLERATE:
11e33196 463 *data = g_variant_new_uint64(devc->samplerate);
3b2b7031 464 break;
933defaa
BV
465 case SR_CONF_BUFFERSIZE:
466 *data = g_variant_new_uint64(devc->framesize);
467 break;
468 case SR_CONF_TRIGGER_SOURCE:
469 *data = g_variant_new_string(devc->triggersource);
470 break;
471 case SR_CONF_TRIGGER_SLOPE:
c442ffda 472 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
473 *data = g_variant_new_string(s);
474 break;
95983cc3
PM
475 case SR_CONF_CAPTURE_RATIO:
476 *data = g_variant_new_uint64(devc->capture_ratio);
933defaa
BV
477 break;
478 default:
479 return SR_ERR_NA;
480 }
481 } else {
482 if (sdi->channel_groups->data == cg)
483 ch_idx = 0;
484 else if (sdi->channel_groups->next->data == cg)
485 ch_idx = 1;
486 else
487 return SR_ERR_ARG;
0c5f2abc 488 switch (key) {
933defaa
BV
489 case SR_CONF_FILTER:
490 *data = g_variant_new_boolean(devc->filter[ch_idx]);
491 break;
492 case SR_CONF_VDIV:
493 vdiv = vdivs[devc->voltage[ch_idx]];
494 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
495 break;
496 case SR_CONF_COUPLING:
497 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
498 break;
499 }
79917848
BV
500 }
501
502 return SR_OK;
503}
504
dd7a72ea
UH
505static int config_set(uint32_t key, GVariant *data,
506 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
3b533202 507{
269971dd 508 struct dev_context *devc;
95983cc3 509 int rat;
697fb6dd 510 int ch_idx, idx;
12f62ce6 511 float flt;
8f996b89 512
269971dd 513 devc = sdi->priv;
933defaa
BV
514 if (!cg) {
515 switch (key) {
516 case SR_CONF_LIMIT_FRAMES:
517 devc->limit_frames = g_variant_get_uint64(data);
518 break;
12f62ce6
PM
519 case SR_CONF_TRIGGER_LEVEL:
520 flt = g_variant_get_double(data);
521 if (flt < 0.0 || flt > 1.0) {
522 sr_err("Trigger level must be in [0.0,1.0].");
523 return SR_ERR_ARG;
524 }
12f62ce6 525 devc->voffset_trigger = flt;
ab8df2b1
UH
526 if (dso_set_voffsets(sdi) != SR_OK)
527 return SR_ERR;
12f62ce6 528 break;
933defaa 529 case SR_CONF_TRIGGER_SLOPE:
697fb6dd 530 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
933defaa 531 return SR_ERR_ARG;
db85496e 532 devc->triggerslope = idx;
933defaa 533 break;
95983cc3
PM
534 case SR_CONF_CAPTURE_RATIO:
535 rat = g_variant_get_uint64(data);
536 if (rat < 0 || rat > 100) {
537 sr_err("Capture ratio must be in [0,100].");
a9010323 538 return SR_ERR_ARG;
933defaa 539 } else
95983cc3 540 devc->capture_ratio = rat;
933defaa
BV
541 break;
542 case SR_CONF_BUFFERSIZE:
697fb6dd 543 if ((idx = std_u64_idx(data, devc->profile->buffersizes, NUM_BUFFER_SIZES)) < 0)
a9010323 544 return SR_ERR_ARG;
697fb6dd 545 devc->framesize = devc->profile->buffersizes[idx];
933defaa
BV
546 break;
547 case SR_CONF_TIMEBASE:
697fb6dd 548 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(timebases))) < 0)
a9010323 549 return SR_ERR_ARG;
697fb6dd 550 devc->timebase = idx;
933defaa 551 break;
11e33196
PM
552 case SR_CONF_SAMPLERATE:
553 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(samplerates))) < 0)
554 return SR_ERR_ARG;
555 devc->samplerate = samplerates[idx];
556 if (dso_set_trigger_samplerate(sdi) != SR_OK)
557 return SR_ERR;
558 break;
933defaa 559 case SR_CONF_TRIGGER_SOURCE:
697fb6dd 560 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_sources))) < 0)
a9010323 561 return SR_ERR_ARG;
697fb6dd 562 devc->triggersource = g_strdup(trigger_sources[idx]);
933defaa
BV
563 break;
564 default:
a9010323 565 return SR_ERR_NA;
ebb781a6 566 }
933defaa
BV
567 } else {
568 if (sdi->channel_groups->data == cg)
569 ch_idx = 0;
570 else if (sdi->channel_groups->next->data == cg)
571 ch_idx = 1;
572 else
573 return SR_ERR_ARG;
574 switch (key) {
575 case SR_CONF_FILTER:
576 devc->filter[ch_idx] = g_variant_get_boolean(data);
577 break;
578 case SR_CONF_VDIV:
697fb6dd 579 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
a9010323 580 return SR_ERR_ARG;
697fb6dd 581 devc->voltage[ch_idx] = idx;
933defaa
BV
582 break;
583 case SR_CONF_COUPLING:
697fb6dd 584 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
a9010323 585 return SR_ERR_ARG;
697fb6dd 586 devc->coupling[ch_idx] = idx;
933defaa
BV
587 break;
588 default:
a9010323 589 return SR_ERR_NA;
b58fbd99 590 }
3b533202
BV
591 }
592
a9010323 593 return SR_OK;
3b533202
BV
594}
595
dd7a72ea
UH
596static int config_list(uint32_t key, GVariant **data,
597 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 598{
034accb5 599 struct dev_context *devc;
a1c743fc 600
933defaa 601 if (!cg) {
93b118da 602 switch (key) {
e66d1892 603 case SR_CONF_SCAN_OPTIONS:
933defaa 604 case SR_CONF_DEVICE_OPTIONS:
e66d1892 605 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
933defaa
BV
606 case SR_CONF_BUFFERSIZE:
607 if (!sdi)
608 return SR_ERR_ARG;
609 devc = sdi->priv;
105df674 610 *data = std_gvar_array_u64(devc->profile->buffersizes, NUM_BUFFER_SIZES);
933defaa 611 break;
11e33196
PM
612 case SR_CONF_SAMPLERATE:
613 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
614 break;
933defaa 615 case SR_CONF_TIMEBASE:
58ffcf97 616 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(timebases));
933defaa
BV
617 break;
618 case SR_CONF_TRIGGER_SOURCE:
53012da6 619 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_sources));
933defaa
BV
620 break;
621 case SR_CONF_TRIGGER_SLOPE:
53012da6 622 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
933defaa
BV
623 break;
624 default:
625 return SR_ERR_NA;
3973ee26 626 }
933defaa 627 } else {
93b118da 628 switch (key) {
933defaa 629 case SR_CONF_DEVICE_OPTIONS:
53012da6 630 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
933defaa
BV
631 break;
632 case SR_CONF_COUPLING:
53012da6 633 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
933defaa
BV
634 break;
635 case SR_CONF_VDIV:
58ffcf97 636 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(vdivs));
933defaa
BV
637 break;
638 default:
639 return SR_ERR_NA;
3973ee26 640 }
a1c743fc
BV
641 }
642
643 return SR_OK;
644}
645
69e19dd7 646static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 647 int num_samples)
3b533202
BV
648{
649 struct sr_datafeed_packet packet;
ae7d8a58
UH
650 struct sr_datafeed_analog analog;
651 struct sr_analog_encoding encoding;
652 struct sr_analog_meaning meaning;
653 struct sr_analog_spec spec;
417412c8
AJ
654 struct dev_context *devc = sdi->priv;
655 GSList *channels = devc->enabled_channels;
3b533202 656
ae7d8a58 657 packet.type = SR_DF_ANALOG;
3b533202 658 packet.payload = &analog;
6e71ef3b 659 /* TODO: support for 5xxx series 9-bit samples */
ae7d8a58 660 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
e749a8cb 661 analog.num_samples = num_samples;
ae7d8a58
UH
662 analog.meaning->mq = SR_MQ_VOLTAGE;
663 analog.meaning->unit = SR_UNIT_VOLT;
664 analog.meaning->mqflags = 0;
886a52b6 665 /* TODO: Check malloc return value. */
417412c8
AJ
666 analog.data = g_try_malloc(num_samples * sizeof(float));
667
b3fd0993 668 for (int ch = 0; ch < NUM_CHANNELS; ch++) {
417412c8
AJ
669 if (!devc->ch_enabled[ch])
670 continue;
671
672 float range = ((float)vdivs[devc->voltage[ch]][0] / vdivs[devc->voltage[ch]][1]) * 8;
673 float vdivlog = log10f(range / 255);
674 int digits = -(int)vdivlog + (vdivlog < 0.0);
675 analog.encoding->digits = digits;
676 analog.spec->spec_digits = digits;
677 analog.meaning->channels = g_slist_append(NULL, channels->data);
678
679 for (int i = 0; i < num_samples; i++) {
680 /*
681 * The device always sends data for both channels. If a channel
682 * is disabled, it contains a copy of the enabled channel's
683 * data. However, we only send the requested channels to
684 * the bus.
685 *
686 * Voltage values are encoded as a value 0-255 (0-512 on the
687 * DSO-5200*), where the value is a point in the range
688 * represented by the vdiv setting. There are 8 vertical divs,
689 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
690 * and 255 = +2V.
691 */
692 /* TODO: Support for DSO-5xxx series 9-bit samples. */
693 ((float *)analog.data)[i] = range / 255 * *(buf + i * 2 + 1 - ch) - range / 2;
6e71ef3b 694 }
417412c8
AJ
695 sr_session_send(sdi, &packet);
696 g_slist_free(analog.meaning->channels);
697
698 channels = channels->next;
3b533202 699 }
1e6b5b93 700 g_free(analog.data);
e749a8cb
BV
701}
702
e98b7f1b
UH
703/*
704 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 705 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 706 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
707 * the libsigrok session bus.
708 */
55462b8b 709static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb
BV
710{
711 struct sr_datafeed_packet packet;
69e19dd7 712 struct sr_dev_inst *sdi;
269971dd 713 struct dev_context *devc;
e749a8cb
BV
714 int num_samples, pre;
715
69e19dd7
BV
716 sdi = transfer->user_data;
717 devc = sdi->priv;
eb8e6cd2
UH
718 sr_spew("receive_transfer(): status %s received %d bytes.",
719 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
720
721 if (transfer->actual_length == 0)
722 /* Nothing to send to the bus. */
723 return;
724
725 num_samples = transfer->actual_length / 2;
726
d4007311 727 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
d9251a2c 728 devc->samp_received + num_samples, devc->framesize);
e749a8cb 729
e98b7f1b
UH
730 /*
731 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
732 * doesn't represent the trigger point. The offset at which the trigger
733 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
734 * from there up the session bus. The samples in the frame buffer
735 * before that trigger point came after the end of the device's frame
736 * buffer was reached, and it wrapped around to overwrite up until the
737 * trigger point.
e749a8cb 738 */
269971dd 739 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 740 /* Trigger point not yet reached. */
269971dd 741 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 742 /* The entire chunk is before the trigger point. */
269971dd 743 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 744 transfer->buffer, num_samples * 2);
269971dd 745 devc->samp_buffered += num_samples;
e749a8cb 746 } else {
e98b7f1b
UH
747 /*
748 * This chunk hits or overruns the trigger point.
e749a8cb 749 * Store the part before the trigger fired, and
e98b7f1b
UH
750 * send the rest up to the session bus.
751 */
269971dd
BV
752 pre = devc->trigger_offset - devc->samp_received;
753 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 754 transfer->buffer, pre * 2);
269971dd 755 devc->samp_buffered += pre;
e749a8cb
BV
756
757 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 758 sr_dbg("Reached trigger point, %d samples buffered.",
d9251a2c 759 devc->samp_buffered);
e749a8cb
BV
760
761 /* Avoid the corner case where the chunk ended at
762 * exactly the trigger point. */
763 if (num_samples > pre)
69e19dd7 764 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
765 num_samples - pre);
766 }
767 } else {
768 /* Already past the trigger point, just send it all out. */
a95f142e 769 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
770 }
771
269971dd 772 devc->samp_received += num_samples;
e749a8cb
BV
773
774 /* Everything in this transfer was either copied to the buffer or
775 * sent to the session bus. */
3b533202
BV
776 g_free(transfer->buffer);
777 libusb_free_transfer(transfer);
3b533202 778
269971dd 779 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
780 /* That was the last chunk in this frame. Send the buffered
781 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 782 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
d9251a2c 783 devc->samp_buffered);
69e19dd7 784 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
16a1dca4
PM
785 g_free(devc->framebuf);
786 devc->framebuf = NULL;
e749a8cb
BV
787
788 /* Mark the end of this frame. */
ae88b97b 789 packet.type = SR_DF_FRAME_END;
695dc859 790 sr_session_send(sdi, &packet);
ae88b97b 791
8f484ca7 792 if (devc->limit_frames && ++devc->num_frames >= devc->limit_frames) {
ae88b97b 793 /* Terminate session */
a3508e33 794 devc->dev_state = STOPPING;
ae88b97b 795 } else {
269971dd 796 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
797 }
798 }
3b533202
BV
799}
800
801static int handle_event(int fd, int revents, void *cb_data)
802{
a3508e33 803 const struct sr_dev_inst *sdi;
ae88b97b 804 struct sr_datafeed_packet packet;
3b533202 805 struct timeval tv;
4f840ce9 806 struct sr_dev_driver *di;
269971dd 807 struct dev_context *devc;
4f840ce9 808 struct drv_context *drvc;
ba7dd8bb 809 int num_channels;
6e6eeff4
BV
810 uint32_t trigger_offset;
811 uint8_t capturestate;
3b533202 812
3b533202
BV
813 (void)fd;
814 (void)revents;
815
269971dd 816 sdi = cb_data;
4f840ce9 817 di = sdi->driver;
41812aca 818 drvc = di->context;
269971dd 819 devc = sdi->priv;
a3508e33
BV
820 if (devc->dev_state == STOPPING) {
821 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
822 sr_dbg("Stopping acquisition.");
823 /*
824 * TODO: Doesn't really cancel pending transfers so they might
825 * come in after SR_DF_END is sent.
826 */
102f1239 827 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 828
bee2b016 829 std_session_send_df_end(sdi);
a3508e33
BV
830
831 devc->dev_state = IDLE;
832
833 return TRUE;
834 }
835
3b533202
BV
836 /* Always handle pending libusb events. */
837 tv.tv_sec = tv.tv_usec = 0;
d4abb463 838 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 839
3b533202 840 /* TODO: ugh */
269971dd 841 if (devc->dev_state == NEW_CAPTURE) {
c118080b 842 if (dso_capture_start(sdi) != SR_OK)
3b533202 843 return TRUE;
c118080b 844 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 845 return TRUE;
c118080b 846// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 847// return TRUE;
e98b7f1b 848 sr_dbg("Successfully requested next chunk.");
269971dd 849 devc->dev_state = CAPTURE;
3b533202
BV
850 return TRUE;
851 }
269971dd 852 if (devc->dev_state != CAPTURE)
3b533202
BV
853 return TRUE;
854
c118080b 855 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 856 return TRUE;
3b533202 857
e98b7f1b
UH
858 sr_dbg("Capturestate %d.", capturestate);
859 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
860 switch (capturestate) {
861 case CAPTURE_EMPTY:
269971dd
BV
862 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
863 devc->capture_empty_count = 0;
c118080b 864 if (dso_capture_start(sdi) != SR_OK)
3b533202 865 break;
c118080b 866 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 867 break;
c118080b 868// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 869// break;
e98b7f1b 870 sr_dbg("Successfully requested next chunk.");
3b533202
BV
871 }
872 break;
873 case CAPTURE_FILLING:
e98b7f1b 874 /* No data yet. */
3b533202
BV
875 break;
876 case CAPTURE_READY_8BIT:
ab8df2b1 877 case CAPTURE_READY_2250:
e749a8cb 878 /* Remember where in the captured frame the trigger is. */
269971dd 879 devc->trigger_offset = trigger_offset;
e749a8cb 880
417412c8 881 num_channels = (devc->ch_enabled[0] && devc->ch_enabled[1]) ? 2 : 1;
a95f142e 882 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 883 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 884
3b533202 885 /* Tell the scope to send us the first frame. */
69e19dd7 886 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 887 break;
ae88b97b 888
e98b7f1b
UH
889 /*
890 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
891 * the data we just told the scope to send.
892 */
269971dd 893 devc->dev_state = FETCH_DATA;
ae88b97b
BV
894
895 /* Tell the frontend a new frame is on the way. */
896 packet.type = SR_DF_FRAME_BEGIN;
269971dd 897 sr_session_send(sdi, &packet);
3b533202
BV
898 break;
899 case CAPTURE_READY_9BIT:
900 /* TODO */
e98b7f1b 901 sr_err("Not yet supported.");
3b533202
BV
902 break;
903 case CAPTURE_TIMEOUT:
904 /* Doesn't matter, we'll try again next time. */
905 break;
906 default:
e98b7f1b
UH
907 sr_dbg("Unknown capture state: %d.", capturestate);
908 break;
3b533202
BV
909 }
910
911 return TRUE;
912}
913
695dc859 914static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 915{
269971dd 916 struct dev_context *devc;
4f840ce9 917 struct sr_dev_driver *di = sdi->driver;
41812aca 918 struct drv_context *drvc = di->context;
3b533202 919
269971dd 920 devc = sdi->priv;
3b533202 921
ba7dd8bb
UH
922 if (configure_channels(sdi) != SR_OK) {
923 sr_err("Failed to configure channels.");
014359e3
BV
924 return SR_ERR;
925 }
926
c118080b 927 if (dso_init(sdi) != SR_OK)
3b533202
BV
928 return SR_ERR;
929
c118080b 930 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
931 return SR_ERR;
932
269971dd 933 devc->dev_state = CAPTURE;
102f1239 934 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 935
bee2b016 936 std_session_send_df_header(sdi);
3b533202 937
3b533202
BV
938 return SR_OK;
939}
940
695dc859 941static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 942{
269971dd
BV
943 struct dev_context *devc;
944
a3508e33
BV
945 devc = sdi->priv;
946 devc->dev_state = STOPPING;
8f484ca7 947 devc->num_frames = 0;
3b533202
BV
948
949 return SR_OK;
950}
951
dd5c48a6 952static struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
953 .name = "hantek-dso",
954 .longname = "Hantek DSO",
955 .api_version = 1,
c2fdcc25 956 .init = std_init,
700d6b64 957 .cleanup = std_cleanup,
6078d2c9 958 .scan = scan,
c01bf34c 959 .dev_list = std_dev_list,
3b412e3a 960 .dev_clear = dev_clear,
79917848 961 .config_get = config_get,
035a1078 962 .config_set = config_set,
a1c743fc 963 .config_list = config_list,
6078d2c9
UH
964 .dev_open = dev_open,
965 .dev_close = dev_close,
966 .dev_acquisition_start = dev_acquisition_start,
967 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 968 .context = NULL,
3b533202 969};
dd5c48a6 970SR_REGISTER_DEV_DRIVER(hantek_dso_driver_info);