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CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
62bb8840 40static const int hwcaps[] = {
3b533202 41 SR_HWCAP_OSCILLOSCOPE,
ae88b97b 42 SR_HWCAP_LIMIT_SAMPLES,
3b533202 43 SR_HWCAP_CONTINUOUS,
a370ef19
BV
44 SR_HWCAP_TIMEBASE,
45 SR_HWCAP_BUFFERSIZE,
46 SR_HWCAP_TRIGGER_SOURCE,
47 SR_HWCAP_TRIGGER_SLOPE,
48 SR_HWCAP_HORIZ_TRIGGERPOS,
ebb781a6 49 SR_HWCAP_FILTER,
313deed2 50 SR_HWCAP_VDIV,
4a090d72 51 SR_HWCAP_COUPLING,
3b533202
BV
52 0,
53};
54
55static const char *probe_names[] = {
56 "CH1",
57 "CH2",
58 NULL,
59};
60
62bb8840 61static const struct dso_profile dev_profiles[] = {
88a13f30 62 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 63 "Hantek", "DSO-2090",
88a13f30
BV
64 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
65 { 0x04b4, 0x2150, 0x04b5, 0x2150,
66 "Hantek", "DSO-2150",
67 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
68 { 0x04b4, 0x2250, 0x04b5, 0x2250,
69 "Hantek", "DSO-2250",
70 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
71 { 0x04b4, 0x5200, 0x04b5, 0x5200,
72 "Hantek", "DSO-5200",
73 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
74 { 0x04b4, 0x520a, 0x04b5, 0x520a,
75 "Hantek", "DSO-5200A",
76 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
77 { 0, 0, 0, 0, 0, 0, 0 },
3b533202
BV
78};
79
62bb8840 80static const uint64_t buffersizes[] = {
a370ef19
BV
81 10240,
82 32768,
83 /* TODO: 65535 */
62bb8840 84 0,
a370ef19
BV
85};
86
62bb8840 87static const struct sr_rational timebases[] = {
a370ef19
BV
88 /* microseconds */
89 { 10, 1000000 },
90 { 20, 1000000 },
91 { 40, 1000000 },
92 { 100, 1000000 },
93 { 200, 1000000 },
94 { 400, 1000000 },
95 /* milliseconds */
96 { 1, 1000 },
97 { 2, 1000 },
98 { 4, 1000 },
99 { 10, 1000 },
100 { 20, 1000 },
101 { 40, 1000 },
102 { 100, 1000 },
103 { 200, 1000 },
104 { 400, 1000 },
62bb8840 105 { 0, 0},
a370ef19
BV
106};
107
62bb8840 108static const struct sr_rational vdivs[] = {
313deed2
BV
109 /* millivolts */
110 { 10, 1000 },
111 { 20, 1000 },
112 { 50, 1000 },
113 { 100, 1000 },
114 { 200, 1000 },
115 { 500, 1000 },
116 /* volts */
117 { 1, 1 },
118 { 2, 1 },
119 { 5, 1 },
62bb8840 120 { 0, 0 },
313deed2
BV
121};
122
62bb8840 123static const char *trigger_sources[] = {
a370ef19
BV
124 "CH1",
125 "CH2",
126 "EXT",
88a13f30 127 /* TODO: forced */
62bb8840 128 NULL,
a370ef19 129};
3b533202 130
62bb8840 131static const char *filter_targets[] = {
ebb781a6
BV
132 "CH1",
133 "CH2",
134 /* TODO: "TRIGGER", */
62bb8840 135 NULL,
ebb781a6
BV
136};
137
62bb8840 138static const char *coupling[] = {
b58fbd99
BV
139 "AC",
140 "DC",
141 "GND",
62bb8840 142 NULL,
b58fbd99
BV
143};
144
982947f7 145SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 146static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 147
69b07d14 148static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 149
62bb8840 150static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
151{
152 struct sr_dev_inst *sdi;
87ca93c5 153 struct sr_probe *probe;
269971dd
BV
154 struct drv_context *drvc;
155 struct dev_context *devc;
87ca93c5 156 int i;
3b533202
BV
157
158 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 159 prof->vendor, prof->model, NULL);
3b533202
BV
160 if (!sdi)
161 return NULL;
a873c594 162 sdi->driver = di;
3b533202 163
e98b7f1b
UH
164 /*
165 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
166 * a trigger source internal to the device.
167 */
168 for (i = 0; probe_names[i]; i++) {
169 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
170 probe_names[i])))
171 return NULL;
172 sdi->probes = g_slist_append(sdi->probes, probe);
173 }
174
269971dd 175 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 176 sr_err("Device context malloc failed.");
3b533202
BV
177 return NULL;
178 }
e98b7f1b 179
269971dd
BV
180 devc->profile = prof;
181 devc->dev_state = IDLE;
182 devc->timebase = DEFAULT_TIMEBASE;
183 devc->ch1_enabled = TRUE;
184 devc->ch2_enabled = TRUE;
185 devc->voltage_ch1 = DEFAULT_VOLTAGE;
186 devc->voltage_ch2 = DEFAULT_VOLTAGE;
187 devc->coupling_ch1 = DEFAULT_COUPLING;
188 devc->coupling_ch2 = DEFAULT_COUPLING;
189 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
190 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
191 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
192 devc->framesize = DEFAULT_FRAMESIZE;
193 devc->triggerslope = SLOPE_POSITIVE;
194 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
195 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
196 sdi->priv = devc;
a873c594 197 drvc = di->priv;
269971dd 198 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
199
200 return sdi;
201}
202
014359e3 203static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 204{
014359e3 205 struct dev_context *devc;
62bb8840
UH
206 const struct sr_probe *probe;
207 const GSList *l;
3b533202 208
014359e3
BV
209 devc = sdi->priv;
210
269971dd 211 devc->ch1_enabled = devc->ch2_enabled = FALSE;
014359e3 212 for (l = sdi->probes; l; l = l->next) {
3b533202 213 probe = (struct sr_probe *)l->data;
b35c8293 214 if (probe->index == 0)
269971dd 215 devc->ch1_enabled = probe->enabled;
b35c8293 216 else if (probe->index == 1)
269971dd 217 devc->ch2_enabled = probe->enabled;
3b533202
BV
218 }
219
220 return SR_OK;
221}
222
39cfdd75 223/* Properly close and free all devices. */
811deee4 224static int clear_instances(void)
39cfdd75
BV
225{
226 struct sr_dev_inst *sdi;
269971dd
BV
227 struct drv_context *drvc;
228 struct dev_context *devc;
39cfdd75
BV
229 GSList *l;
230
a873c594 231 drvc = di->priv;
269971dd 232 for (l = drvc->instances; l; l = l->next) {
39cfdd75
BV
233 if (!(sdi = l->data)) {
234 /* Log error, but continue cleaning up the rest. */
e98b7f1b 235 sr_err("%s: sdi was NULL, continuing", __func__);
39cfdd75
BV
236 continue;
237 }
269971dd 238 if (!(devc = sdi->priv)) {
39cfdd75 239 /* Log error, but continue cleaning up the rest. */
e98b7f1b 240 sr_err("%s: sdi->priv was NULL, continuing", __func__);
39cfdd75
BV
241 continue;
242 }
243 dso_close(sdi);
269971dd
BV
244 sr_usb_dev_inst_free(devc->usb);
245 g_free(devc->triggersource);
39cfdd75
BV
246
247 sr_dev_inst_free(sdi);
248 }
249
269971dd
BV
250 g_slist_free(drvc->instances);
251 drvc->instances = NULL;
39cfdd75 252
811deee4 253 return SR_OK;
39cfdd75
BV
254}
255
34f06b90 256static int hw_init(struct sr_context *sr_ctx)
61136ea6 257{
269971dd
BV
258 struct drv_context *drvc;
259
260 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
e98b7f1b 261 sr_err("Driver context malloc failed.");
886a52b6 262 return SR_ERR_MALLOC;
269971dd 263 }
61136ea6 264
1ebe4b4e 265 drvc->sr_ctx = sr_ctx;
a873c594 266 di->priv = drvc;
269971dd 267
61136ea6
BV
268 return SR_OK;
269}
270
39cfdd75 271static GSList *hw_scan(GSList *options)
3b533202
BV
272{
273 struct sr_dev_inst *sdi;
62bb8840 274 const struct dso_profile *prof;
269971dd
BV
275 struct drv_context *drvc;
276 struct dev_context *devc;
39cfdd75
BV
277 GSList *devices;
278 struct libusb_device_descriptor des;
3b533202 279 libusb_device **devlist;
61136ea6 280 int devcnt, ret, i, j;
3b533202 281
39cfdd75 282 (void)options;
e98b7f1b 283
3b533202 284 devcnt = 0;
39cfdd75 285 devices = 0;
a873c594 286 drvc = di->priv;
269971dd 287 drvc->instances = NULL;
39cfdd75
BV
288
289 clear_instances();
290
291 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 292 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 293 for (i = 0; devlist[i]; i++) {
61136ea6 294 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71
PS
295 sr_err("Failed to get device descriptor: %s.",
296 libusb_error_name(ret));
3b533202
BV
297 continue;
298 }
299
300 prof = NULL;
301 for (j = 0; dev_profiles[j].orig_vid; j++) {
302 if (des.idVendor == dev_profiles[j].orig_vid
303 && des.idProduct == dev_profiles[j].orig_pid) {
304 /* Device matches the pre-firmware profile. */
305 prof = &dev_profiles[j];
e98b7f1b 306 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 307 sdi = dso_dev_new(devcnt, prof);
39cfdd75 308 devices = g_slist_append(devices, sdi);
269971dd 309 devc = sdi->priv;
3b533202
BV
310 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
311 prof->firmware) == SR_OK)
312 /* Remember when the firmware on this device was updated */
269971dd 313 devc->fw_updated = g_get_monotonic_time();
3b533202 314 else
e98b7f1b
UH
315 sr_err("Firmware upload failed for "
316 "device %d.", devcnt);
3b533202 317 /* Dummy USB address of 0xff will get overwritten later. */
269971dd 318 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
319 libusb_get_bus_number(devlist[i]), 0xff, NULL);
320 devcnt++;
321 break;
322 } else if (des.idVendor == dev_profiles[j].fw_vid
323 && des.idProduct == dev_profiles[j].fw_pid) {
324 /* Device matches the post-firmware profile. */
325 prof = &dev_profiles[j];
e98b7f1b 326 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
327 sdi = dso_dev_new(devcnt, prof);
328 sdi->status = SR_ST_INACTIVE;
39cfdd75 329 devices = g_slist_append(devices, sdi);
269971dd
BV
330 devc = sdi->priv;
331 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
332 libusb_get_bus_number(devlist[i]),
333 libusb_get_device_address(devlist[i]), NULL);
334 devcnt++;
335 break;
336 }
337 }
338 if (!prof)
339 /* not a supported VID/PID */
340 continue;
341 }
342 libusb_free_device_list(devlist, 1);
343
39cfdd75 344 return devices;
3b533202
BV
345}
346
811deee4
BV
347static GSList *hw_dev_list(void)
348{
349 struct drv_context *drvc;
350
a873c594 351 drvc = di->priv;
811deee4
BV
352
353 return drvc->instances;
354}
355
25a0f108 356static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 357{
269971dd 358 struct dev_context *devc;
fc8fe3e3
BV
359 int64_t timediff_us, timediff_ms;
360 int err;
3b533202 361
269971dd 362 devc = sdi->priv;
3b533202
BV
363
364 /*
e98b7f1b
UH
365 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
366 * for the FX2 to renumerate.
3b533202 367 */
fc8fe3e3 368 err = SR_ERR;
269971dd 369 if (devc->fw_updated > 0) {
e98b7f1b
UH
370 sr_info("Waiting for device to reset.");
371 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 372 g_usleep(300 * 1000);
fc8fe3e3
BV
373 timediff_ms = 0;
374 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 375 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
376 break;
377 g_usleep(100 * 1000);
269971dd 378 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 379 timediff_ms = timediff_us / 1000;
e98b7f1b 380 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 381 }
e98b7f1b 382 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 383 } else {
25a0f108 384 err = dso_open(sdi);
3b533202
BV
385 }
386
387 if (err != SR_OK) {
e98b7f1b 388 sr_err("Unable to open device.");
3b533202
BV
389 return SR_ERR;
390 }
391
269971dd 392 err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE);
3b533202 393 if (err != 0) {
d4928d71
PS
394 sr_err("Unable to claim interface: %s.",
395 libusb_error_name(err));
3b533202
BV
396 return SR_ERR;
397 }
398
399 return SR_OK;
400}
401
25a0f108 402static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 403{
3b533202
BV
404 dso_close(sdi);
405
406 return SR_OK;
407}
408
409static int hw_cleanup(void)
410{
269971dd
BV
411 struct drv_context *drvc;
412
a873c594 413 if (!(drvc = di->priv))
269971dd 414 return SR_OK;
3b533202 415
39cfdd75 416 clear_instances();
3b533202 417
3b533202
BV
418 return SR_OK;
419}
420
0b79bcbb 421static int hw_info_get(int info_id, const void **data,
e98b7f1b 422 const struct sr_dev_inst *sdi)
3b533202 423{
3b533202
BV
424 uint64_t tmp;
425
6f57fd96
BV
426 (void)sdi;
427
0b79bcbb 428 switch (info_id) {
2ce9f046
BV
429 case SR_DI_HWCAPS:
430 *data = hwcaps;
431 break;
3b533202 432 case SR_DI_NUM_PROBES:
0b79bcbb 433 *data = GINT_TO_POINTER(NUM_PROBES);
3b533202
BV
434 break;
435 case SR_DI_PROBE_NAMES:
0b79bcbb 436 *data = probe_names;
3b533202 437 break;
a370ef19 438 case SR_DI_BUFFERSIZES:
0b79bcbb 439 *data = buffersizes;
a370ef19
BV
440 break;
441 case SR_DI_TIMEBASES:
0b79bcbb 442 *data = timebases;
a370ef19
BV
443 break;
444 case SR_DI_TRIGGER_SOURCES:
0b79bcbb 445 *data = trigger_sources;
a370ef19 446 break;
ebb781a6 447 case SR_DI_FILTERS:
0b79bcbb 448 *data = filter_targets;
ebb781a6 449 break;
313deed2 450 case SR_DI_VDIVS:
0b79bcbb 451 *data = vdivs;
313deed2 452 break;
4a090d72 453 case SR_DI_COUPLING:
0b79bcbb 454 *data = coupling;
4a090d72 455 break;
3b533202
BV
456 /* TODO remove this */
457 case SR_DI_CUR_SAMPLERATE:
0b79bcbb 458 *data = &tmp;
3b533202 459 break;
b0c8d7ac
BV
460 default:
461 return SR_ERR_ARG;
3b533202
BV
462 }
463
0b79bcbb 464 return SR_OK;
3b533202
BV
465}
466
6f4b1868 467static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
e98b7f1b 468 const void *value)
3b533202 469{
269971dd 470 struct dev_context *devc;
a370ef19
BV
471 struct sr_rational tmp_rat;
472 float tmp_float;
473 uint64_t tmp_u64;
474 int ret, i;
4a090d72 475 char **targets;
3b533202 476
3b533202
BV
477 if (sdi->status != SR_ST_ACTIVE)
478 return SR_ERR;
479
a370ef19 480 ret = SR_OK;
269971dd 481 devc = sdi->priv;
3b533202 482 switch (hwcap) {
ae88b97b 483 case SR_HWCAP_LIMIT_FRAMES:
269971dd 484 devc->limit_frames = *(const uint64_t *)value;
ae88b97b 485 break;
a370ef19 486 case SR_HWCAP_TRIGGER_SLOPE:
62bb8840 487 tmp_u64 = *(const int *)value;
a370ef19
BV
488 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
489 ret = SR_ERR_ARG;
269971dd 490 devc->triggerslope = tmp_u64;
a370ef19
BV
491 break;
492 case SR_HWCAP_HORIZ_TRIGGERPOS:
62bb8840 493 tmp_float = *(const float *)value;
a370ef19 494 if (tmp_float < 0.0 || tmp_float > 1.0) {
e98b7f1b 495 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 496 ret = SR_ERR_ARG;
a370ef19 497 } else
269971dd 498 devc->triggerposition = tmp_float;
a370ef19
BV
499 break;
500 case SR_HWCAP_BUFFERSIZE:
62bb8840 501 tmp_u64 = *(const int *)value;
a370ef19
BV
502 for (i = 0; buffersizes[i]; i++) {
503 if (buffersizes[i] == tmp_u64) {
269971dd 504 devc->framesize = tmp_u64;
a370ef19
BV
505 break;
506 }
507 }
508 if (buffersizes[i] == 0)
509 ret = SR_ERR_ARG;
510 break;
511 case SR_HWCAP_TIMEBASE:
62bb8840 512 tmp_rat = *(const struct sr_rational *)value;
a370ef19
BV
513 for (i = 0; timebases[i].p && timebases[i].q; i++) {
514 if (timebases[i].p == tmp_rat.p
515 && timebases[i].q == tmp_rat.q) {
269971dd 516 devc->timebase = i;
a370ef19
BV
517 break;
518 }
519 }
520 if (timebases[i].p == 0 && timebases[i].q == 0)
521 ret = SR_ERR_ARG;
522 break;
523 case SR_HWCAP_TRIGGER_SOURCE:
a370ef19 524 for (i = 0; trigger_sources[i]; i++) {
4a090d72 525 if (!strcmp(value, trigger_sources[i])) {
269971dd 526 devc->triggersource = g_strdup(value);
a370ef19
BV
527 break;
528 }
529 }
530 if (trigger_sources[i] == 0)
531 ret = SR_ERR_ARG;
532 break;
ebb781a6 533 case SR_HWCAP_FILTER:
269971dd 534 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
ebb781a6
BV
535 targets = g_strsplit(value, ",", 0);
536 for (i = 0; targets[i]; i++) {
537 if (targets[i] == '\0')
538 /* Empty filter string can be used to clear them all. */
539 ;
540 else if (!strcmp(targets[i], "CH1"))
269971dd 541 devc->filter_ch1 = TRUE;
ebb781a6 542 else if (!strcmp(targets[i], "CH2"))
269971dd 543 devc->filter_ch2 = TRUE;
ebb781a6 544 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 545 devc->filter_trigger = TRUE;
ebb781a6 546 else {
e98b7f1b 547 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
548 ret = SR_ERR_ARG;
549 }
550 }
551 g_strfreev(targets);
552 break;
313deed2 553 case SR_HWCAP_VDIV:
e98b7f1b 554 /* TODO: Not supporting vdiv per channel yet. */
62bb8840 555 tmp_rat = *(const struct sr_rational *)value;
313deed2
BV
556 for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
557 if (vdivs[i].p == tmp_rat.p
558 && vdivs[i].q == tmp_rat.q) {
269971dd
BV
559 devc->voltage_ch1 = i;
560 devc->voltage_ch2 = i;
313deed2
BV
561 break;
562 }
563 }
564 if (vdivs[i].p == 0 && vdivs[i].q == 0)
565 ret = SR_ERR_ARG;
566 break;
b58fbd99 567 case SR_HWCAP_COUPLING:
e98b7f1b 568 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 569 for (i = 0; coupling[i]; i++) {
4a090d72 570 if (!strcmp(value, coupling[i])) {
269971dd
BV
571 devc->coupling_ch1 = i;
572 devc->coupling_ch2 = i;
b58fbd99
BV
573 break;
574 }
575 }
576 if (coupling[i] == 0)
577 ret = SR_ERR_ARG;
578 break;
3b533202
BV
579 default:
580 ret = SR_ERR_ARG;
e98b7f1b 581 break;
3b533202
BV
582 }
583
584 return ret;
585}
586
269971dd 587static void send_chunk(struct dev_context *devc, unsigned char *buf,
e749a8cb 588 int num_samples)
3b533202
BV
589{
590 struct sr_datafeed_packet packet;
591 struct sr_datafeed_analog analog;
c5841b28 592 float ch1, ch2, range;
6e71ef3b 593 int num_probes, data_offset, i;
3b533202 594
269971dd 595 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
596 packet.type = SR_DF_ANALOG;
597 packet.payload = &analog;
6e71ef3b 598 /* TODO: support for 5xxx series 9-bit samples */
e749a8cb 599 analog.num_samples = num_samples;
9956f285
UH
600 analog.mq = SR_MQ_VOLTAGE;
601 analog.unit = SR_UNIT_VOLT;
886a52b6 602 /* TODO: Check malloc return value. */
6e71ef3b
BV
603 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
604 data_offset = 0;
3b533202 605 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
606 /*
607 * The device always sends data for both channels. If a channel
6e71ef3b 608 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
609 * data. However, we only send the requested channels to
610 * the bus.
c5841b28 611 *
e98b7f1b
UH
612 * Voltage values are encoded as a value 0-255 (0-512 on the
613 * DSO-5200*), where the value is a point in the range
614 * represented by the vdiv setting. There are 8 vertical divs,
615 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
616 * and 255 = +2V.
6e71ef3b 617 */
e98b7f1b 618 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd
BV
619 if (devc->ch1_enabled) {
620 range = ((float)vdivs[devc->voltage_ch1].p / vdivs[devc->voltage_ch1].q) * 8;
e749a8cb 621 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
622 /* Value is centered around 0V. */
623 ch1 -= range / 2;
6e71ef3b
BV
624 analog.data[data_offset++] = ch1;
625 }
269971dd
BV
626 if (devc->ch2_enabled) {
627 range = ((float)vdivs[devc->voltage_ch2].p / vdivs[devc->voltage_ch2].q) * 8;
e749a8cb 628 ch2 = range / 255 * *(buf + i * 2);
c5841b28 629 ch2 -= range / 2;
6e71ef3b
BV
630 analog.data[data_offset++] = ch2;
631 }
3b533202 632 }
269971dd 633 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
634}
635
e98b7f1b
UH
636/*
637 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 638 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 639 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
640 * the libsigrok session bus.
641 */
642static void receive_transfer(struct libusb_transfer *transfer)
643{
644 struct sr_datafeed_packet packet;
269971dd 645 struct dev_context *devc;
e749a8cb
BV
646 int num_samples, pre;
647
269971dd 648 devc = transfer->user_data;
e98b7f1b
UH
649 sr_dbg("receive_transfer(): status %d received %d bytes.",
650 transfer->status, transfer->actual_length);
e749a8cb
BV
651
652 if (transfer->actual_length == 0)
653 /* Nothing to send to the bus. */
654 return;
655
656 num_samples = transfer->actual_length / 2;
657
e98b7f1b
UH
658 sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
659 devc->samp_received + num_samples, devc->framesize);
e749a8cb 660
e98b7f1b
UH
661 /*
662 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
663 * doesn't represent the trigger point. The offset at which the trigger
664 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
665 * from there up the session bus. The samples in the frame buffer
666 * before that trigger point came after the end of the device's frame
667 * buffer was reached, and it wrapped around to overwrite up until the
668 * trigger point.
e749a8cb 669 */
269971dd 670 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 671 /* Trigger point not yet reached. */
269971dd 672 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 673 /* The entire chunk is before the trigger point. */
269971dd 674 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 675 transfer->buffer, num_samples * 2);
269971dd 676 devc->samp_buffered += num_samples;
e749a8cb 677 } else {
e98b7f1b
UH
678 /*
679 * This chunk hits or overruns the trigger point.
e749a8cb 680 * Store the part before the trigger fired, and
e98b7f1b
UH
681 * send the rest up to the session bus.
682 */
269971dd
BV
683 pre = devc->trigger_offset - devc->samp_received;
684 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 685 transfer->buffer, pre * 2);
269971dd 686 devc->samp_buffered += pre;
e749a8cb
BV
687
688 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
689 sr_dbg("Reached trigger point, %d samples buffered.",
690 devc->samp_buffered);
e749a8cb
BV
691
692 /* Avoid the corner case where the chunk ended at
693 * exactly the trigger point. */
694 if (num_samples > pre)
269971dd 695 send_chunk(devc, transfer->buffer + pre * 2,
e749a8cb
BV
696 num_samples - pre);
697 }
698 } else {
699 /* Already past the trigger point, just send it all out. */
269971dd 700 send_chunk(devc, transfer->buffer,
e749a8cb
BV
701 num_samples);
702 }
703
269971dd 704 devc->samp_received += num_samples;
e749a8cb
BV
705
706 /* Everything in this transfer was either copied to the buffer or
707 * sent to the session bus. */
3b533202
BV
708 g_free(transfer->buffer);
709 libusb_free_transfer(transfer);
3b533202 710
269971dd 711 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
712 /* That was the last chunk in this frame. Send the buffered
713 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
714 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
715 devc->samp_buffered);
269971dd 716 send_chunk(devc, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
717
718 /* Mark the end of this frame. */
ae88b97b 719 packet.type = SR_DF_FRAME_END;
269971dd 720 sr_session_send(devc->cb_data, &packet);
ae88b97b 721
269971dd 722 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 723 /* Terminate session */
a3508e33 724 devc->dev_state = STOPPING;
ae88b97b 725 } else {
269971dd 726 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
727 }
728 }
3b533202
BV
729}
730
731static int handle_event(int fd, int revents, void *cb_data)
732{
a3508e33 733 const struct sr_dev_inst *sdi;
ae88b97b 734 struct sr_datafeed_packet packet;
3b533202 735 struct timeval tv;
269971dd 736 struct dev_context *devc;
a873c594 737 struct drv_context *drvc = di->priv;
a3508e33
BV
738 const struct libusb_pollfd **lupfd;
739 int num_probes, i;
6e6eeff4
BV
740 uint32_t trigger_offset;
741 uint8_t capturestate;
3b533202 742
3b533202
BV
743 (void)fd;
744 (void)revents;
745
269971dd
BV
746 sdi = cb_data;
747 devc = sdi->priv;
a3508e33
BV
748 if (devc->dev_state == STOPPING) {
749 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
750 sr_dbg("Stopping acquisition.");
751 /*
752 * TODO: Doesn't really cancel pending transfers so they might
753 * come in after SR_DF_END is sent.
754 */
d4abb463 755 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
756 for (i = 0; lupfd[i]; i++)
757 sr_source_remove(lupfd[i]->fd);
758 free(lupfd);
759
760 packet.type = SR_DF_END;
761 sr_session_send(sdi, &packet);
762
763 devc->dev_state = IDLE;
764
765 return TRUE;
766 }
767
3b533202
BV
768 /* Always handle pending libusb events. */
769 tv.tv_sec = tv.tv_usec = 0;
d4abb463 770 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 771
3b533202 772 /* TODO: ugh */
269971dd
BV
773 if (devc->dev_state == NEW_CAPTURE) {
774 if (dso_capture_start(devc) != SR_OK)
3b533202 775 return TRUE;
269971dd 776 if (dso_enable_trigger(devc) != SR_OK)
3b533202 777 return TRUE;
269971dd 778// if (dso_force_trigger(devc) != SR_OK)
a370ef19 779// return TRUE;
e98b7f1b 780 sr_dbg("Successfully requested next chunk.");
269971dd 781 devc->dev_state = CAPTURE;
3b533202
BV
782 return TRUE;
783 }
269971dd 784 if (devc->dev_state != CAPTURE)
3b533202
BV
785 return TRUE;
786
269971dd 787 if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK)
3b533202 788 return TRUE;
3b533202 789
e98b7f1b
UH
790 sr_dbg("Capturestate %d.", capturestate);
791 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
792 switch (capturestate) {
793 case CAPTURE_EMPTY:
269971dd
BV
794 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
795 devc->capture_empty_count = 0;
796 if (dso_capture_start(devc) != SR_OK)
3b533202 797 break;
269971dd 798 if (dso_enable_trigger(devc) != SR_OK)
3b533202 799 break;
269971dd 800// if (dso_force_trigger(devc) != SR_OK)
a370ef19 801// break;
e98b7f1b 802 sr_dbg("Successfully requested next chunk.");
3b533202
BV
803 }
804 break;
805 case CAPTURE_FILLING:
e98b7f1b 806 /* No data yet. */
3b533202
BV
807 break;
808 case CAPTURE_READY_8BIT:
e749a8cb 809 /* Remember where in the captured frame the trigger is. */
269971dd 810 devc->trigger_offset = trigger_offset;
e749a8cb 811
269971dd 812 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 813 /* TODO: Check malloc return value. */
269971dd
BV
814 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
815 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 816
3b533202 817 /* Tell the scope to send us the first frame. */
269971dd 818 if (dso_get_channeldata(devc, receive_transfer) != SR_OK)
3b533202 819 break;
ae88b97b 820
e98b7f1b
UH
821 /*
822 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
823 * the data we just told the scope to send.
824 */
269971dd 825 devc->dev_state = FETCH_DATA;
ae88b97b
BV
826
827 /* Tell the frontend a new frame is on the way. */
828 packet.type = SR_DF_FRAME_BEGIN;
269971dd 829 sr_session_send(sdi, &packet);
3b533202
BV
830 break;
831 case CAPTURE_READY_9BIT:
832 /* TODO */
e98b7f1b 833 sr_err("Not yet supported.");
3b533202
BV
834 break;
835 case CAPTURE_TIMEOUT:
836 /* Doesn't matter, we'll try again next time. */
837 break;
838 default:
e98b7f1b
UH
839 sr_dbg("Unknown capture state: %d.", capturestate);
840 break;
3b533202
BV
841 }
842
843 return TRUE;
844}
845
3ffb6964 846static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 847 void *cb_data)
3b533202
BV
848{
849 const struct libusb_pollfd **lupfd;
850 struct sr_datafeed_packet packet;
851 struct sr_datafeed_header header;
852 struct sr_datafeed_meta_analog meta;
269971dd 853 struct dev_context *devc;
a873c594 854 struct drv_context *drvc = di->priv;
3b533202
BV
855 int i;
856
3b533202
BV
857 if (sdi->status != SR_ST_ACTIVE)
858 return SR_ERR;
859
269971dd
BV
860 devc = sdi->priv;
861 devc->cb_data = cb_data;
3b533202 862
014359e3 863 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 864 sr_err("Failed to configure probes.");
014359e3
BV
865 return SR_ERR;
866 }
867
269971dd 868 if (dso_init(devc) != SR_OK)
3b533202
BV
869 return SR_ERR;
870
269971dd 871 if (dso_capture_start(devc) != SR_OK)
3b533202
BV
872 return SR_ERR;
873
269971dd 874 devc->dev_state = CAPTURE;
d4abb463 875 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 876 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
877 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
878 handle_event, (void *)sdi);
3b533202
BV
879 free(lupfd);
880
881 /* Send header packet to the session bus. */
882 packet.type = SR_DF_HEADER;
883 packet.payload = (unsigned char *)&header;
884 header.feed_version = 1;
885 gettimeofday(&header.starttime, NULL);
886 sr_session_send(cb_data, &packet);
887
888 /* Send metadata about the SR_DF_ANALOG packets to come. */
889 packet.type = SR_DF_META_ANALOG;
890 packet.payload = &meta;
88a13f30 891 meta.num_probes = NUM_PROBES;
3b533202
BV
892 sr_session_send(cb_data, &packet);
893
894 return SR_OK;
895}
896
69b07d14 897static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 898{
269971dd
BV
899 struct dev_context *devc;
900
901 (void)cb_data;
3b533202 902
3b533202
BV
903 if (sdi->status != SR_ST_ACTIVE)
904 return SR_ERR;
905
a3508e33
BV
906 devc = sdi->priv;
907 devc->dev_state = STOPPING;
3b533202
BV
908
909 return SR_OK;
910}
911
62bb8840 912SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
913 .name = "hantek-dso",
914 .longname = "Hantek DSO",
915 .api_version = 1,
916 .init = hw_init,
917 .cleanup = hw_cleanup,
61136ea6 918 .scan = hw_scan,
811deee4
BV
919 .dev_list = hw_dev_list,
920 .dev_clear = clear_instances,
3b533202
BV
921 .dev_open = hw_dev_open,
922 .dev_close = hw_dev_close,
0b79bcbb 923 .info_get = hw_info_get,
3b533202 924 .dev_config_set = hw_dev_config_set,
62bb8840
UH
925 .dev_acquisition_start = hw_dev_acquisition_start,
926 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 927 .priv = NULL,
3b533202 928};