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hantek-dso: Use std_dev_clear()
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
f627afd6 43static const int32_t devopts[] = {
1953564a 44 SR_CONF_OSCILLOSCOPE,
be6db330 45 SR_CONF_LIMIT_FRAMES,
1953564a
BV
46 SR_CONF_CONTINUOUS,
47 SR_CONF_TIMEBASE,
48 SR_CONF_BUFFERSIZE,
49 SR_CONF_TRIGGER_SOURCE,
50 SR_CONF_TRIGGER_SLOPE,
51 SR_CONF_HORIZ_TRIGGERPOS,
52 SR_CONF_FILTER,
53 SR_CONF_VDIV,
54 SR_CONF_COUPLING,
79917848
BV
55 SR_CONF_NUM_TIMEBASE,
56 SR_CONF_NUM_VDIV,
3b533202
BV
57};
58
59static const char *probe_names[] = {
78693401 60 "CH1", "CH2",
3b533202
BV
61 NULL,
62};
63
034accb5
BV
64static const uint64_t buffersizes_32k[] = {
65 10240, 32768,
66};
67static const uint64_t buffersizes_512k[] = {
68 10240, 524288,
69};
70static const uint64_t buffersizes_14k[] = {
71 10240, 14336,
72};
73
62bb8840 74static const struct dso_profile dev_profiles[] = {
88a13f30 75 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 76 "Hantek", "DSO-2090",
034accb5 77 buffersizes_32k,
7b78b2f7 78 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
79 { 0x04b4, 0x2150, 0x04b5, 0x2150,
80 "Hantek", "DSO-2150",
034accb5 81 buffersizes_32k,
7b78b2f7 82 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
83 { 0x04b4, 0x2250, 0x04b5, 0x2250,
84 "Hantek", "DSO-2250",
034accb5 85 buffersizes_512k,
7b78b2f7 86 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
87 { 0x04b4, 0x5200, 0x04b5, 0x5200,
88 "Hantek", "DSO-5200",
034accb5 89 buffersizes_14k,
7b78b2f7 90 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
91 { 0x04b4, 0x520a, 0x04b5, 0x520a,
92 "Hantek", "DSO-5200A",
034accb5 93 buffersizes_512k,
7b78b2f7 94 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 95 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
96};
97
86bb3f4a 98static const uint64_t timebases[][2] = {
a370ef19
BV
99 /* microseconds */
100 { 10, 1000000 },
101 { 20, 1000000 },
102 { 40, 1000000 },
103 { 100, 1000000 },
104 { 200, 1000000 },
105 { 400, 1000000 },
106 /* milliseconds */
107 { 1, 1000 },
108 { 2, 1000 },
109 { 4, 1000 },
110 { 10, 1000 },
111 { 20, 1000 },
112 { 40, 1000 },
113 { 100, 1000 },
114 { 200, 1000 },
115 { 400, 1000 },
a370ef19
BV
116};
117
86bb3f4a 118static const uint64_t vdivs[][2] = {
313deed2
BV
119 /* millivolts */
120 { 10, 1000 },
121 { 20, 1000 },
122 { 50, 1000 },
123 { 100, 1000 },
124 { 200, 1000 },
125 { 500, 1000 },
126 /* volts */
127 { 1, 1 },
128 { 2, 1 },
129 { 5, 1 },
313deed2
BV
130};
131
62bb8840 132static const char *trigger_sources[] = {
a370ef19
BV
133 "CH1",
134 "CH2",
135 "EXT",
88a13f30 136 /* TODO: forced */
a370ef19 137};
3b533202 138
62bb8840 139static const char *filter_targets[] = {
ebb781a6
BV
140 "CH1",
141 "CH2",
142 /* TODO: "TRIGGER", */
ebb781a6
BV
143};
144
62bb8840 145static const char *coupling[] = {
b58fbd99
BV
146 "AC",
147 "DC",
148 "GND",
b58fbd99
BV
149};
150
982947f7 151SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 152static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 153
69b07d14 154static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 155
62bb8840 156static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
157{
158 struct sr_dev_inst *sdi;
87ca93c5 159 struct sr_probe *probe;
269971dd
BV
160 struct drv_context *drvc;
161 struct dev_context *devc;
87ca93c5 162 int i;
3b533202
BV
163
164 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 165 prof->vendor, prof->model, NULL);
3b533202
BV
166 if (!sdi)
167 return NULL;
a873c594 168 sdi->driver = di;
3b533202 169
e98b7f1b
UH
170 /*
171 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
172 * a trigger source internal to the device.
173 */
174 for (i = 0; probe_names[i]; i++) {
175 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
176 probe_names[i])))
177 return NULL;
178 sdi->probes = g_slist_append(sdi->probes, probe);
179 }
180
269971dd 181 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 182 sr_err("Device context malloc failed.");
3b533202
BV
183 return NULL;
184 }
e98b7f1b 185
269971dd
BV
186 devc->profile = prof;
187 devc->dev_state = IDLE;
188 devc->timebase = DEFAULT_TIMEBASE;
189 devc->ch1_enabled = TRUE;
190 devc->ch2_enabled = TRUE;
191 devc->voltage_ch1 = DEFAULT_VOLTAGE;
192 devc->voltage_ch2 = DEFAULT_VOLTAGE;
193 devc->coupling_ch1 = DEFAULT_COUPLING;
194 devc->coupling_ch2 = DEFAULT_COUPLING;
195 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
196 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
197 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
198 devc->framesize = DEFAULT_FRAMESIZE;
199 devc->triggerslope = SLOPE_POSITIVE;
200 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
201 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
202 sdi->priv = devc;
a873c594 203 drvc = di->priv;
269971dd 204 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
205
206 return sdi;
207}
208
014359e3 209static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 210{
014359e3 211 struct dev_context *devc;
69e19dd7 212 struct sr_probe *probe;
62bb8840 213 const GSList *l;
69e19dd7 214 int p;
3b533202 215
014359e3
BV
216 devc = sdi->priv;
217
69e19dd7 218 g_slist_free(devc->enabled_probes);
269971dd 219 devc->ch1_enabled = devc->ch2_enabled = FALSE;
69e19dd7
BV
220 for (l = sdi->probes, p = 0; l; l = l->next, p++) {
221 probe = l->data;
222 if (p == 0)
269971dd 223 devc->ch1_enabled = probe->enabled;
69e19dd7 224 else
269971dd 225 devc->ch2_enabled = probe->enabled;
69e19dd7
BV
226 if (probe->enabled)
227 devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
3b533202
BV
228 }
229
230 return SR_OK;
231}
232
949b3dc0 233static void clear_dev_context(void *priv)
39cfdd75 234{
269971dd 235 struct dev_context *devc;
39cfdd75 236
949b3dc0
BV
237 devc = priv;
238 g_free(devc->triggersource);
239 g_slist_free(devc->enabled_probes);
39cfdd75 240
949b3dc0 241}
39cfdd75 242
949b3dc0
BV
243static int clear_instances(void)
244{
245 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
246}
247
34f06b90 248static int hw_init(struct sr_context *sr_ctx)
61136ea6 249{
063e7aef 250 return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
61136ea6
BV
251}
252
39cfdd75 253static GSList *hw_scan(GSList *options)
3b533202
BV
254{
255 struct sr_dev_inst *sdi;
62bb8840 256 const struct dso_profile *prof;
269971dd
BV
257 struct drv_context *drvc;
258 struct dev_context *devc;
39cfdd75
BV
259 GSList *devices;
260 struct libusb_device_descriptor des;
3b533202 261 libusb_device **devlist;
61136ea6 262 int devcnt, ret, i, j;
3b533202 263
39cfdd75 264 (void)options;
e98b7f1b 265
a873c594 266 drvc = di->priv;
269971dd 267 drvc->instances = NULL;
39cfdd75 268
4b97c74e
UH
269 devcnt = 0;
270 devices = 0;
271
39cfdd75
BV
272 clear_instances();
273
274 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 275 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 276 for (i = 0; devlist[i]; i++) {
61136ea6 277 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71
PS
278 sr_err("Failed to get device descriptor: %s.",
279 libusb_error_name(ret));
3b533202
BV
280 continue;
281 }
282
283 prof = NULL;
284 for (j = 0; dev_profiles[j].orig_vid; j++) {
285 if (des.idVendor == dev_profiles[j].orig_vid
286 && des.idProduct == dev_profiles[j].orig_pid) {
287 /* Device matches the pre-firmware profile. */
288 prof = &dev_profiles[j];
e98b7f1b 289 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 290 sdi = dso_dev_new(devcnt, prof);
39cfdd75 291 devices = g_slist_append(devices, sdi);
269971dd 292 devc = sdi->priv;
3b533202
BV
293 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
294 prof->firmware) == SR_OK)
295 /* Remember when the firmware on this device was updated */
269971dd 296 devc->fw_updated = g_get_monotonic_time();
3b533202 297 else
e98b7f1b
UH
298 sr_err("Firmware upload failed for "
299 "device %d.", devcnt);
3b533202 300 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 301 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
302 libusb_get_bus_number(devlist[i]), 0xff, NULL);
303 devcnt++;
304 break;
305 } else if (des.idVendor == dev_profiles[j].fw_vid
306 && des.idProduct == dev_profiles[j].fw_pid) {
307 /* Device matches the post-firmware profile. */
308 prof = &dev_profiles[j];
e98b7f1b 309 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
310 sdi = dso_dev_new(devcnt, prof);
311 sdi->status = SR_ST_INACTIVE;
39cfdd75 312 devices = g_slist_append(devices, sdi);
269971dd 313 devc = sdi->priv;
c118080b 314 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
315 libusb_get_bus_number(devlist[i]),
316 libusb_get_device_address(devlist[i]), NULL);
317 devcnt++;
318 break;
319 }
320 }
321 if (!prof)
322 /* not a supported VID/PID */
323 continue;
324 }
325 libusb_free_device_list(devlist, 1);
326
39cfdd75 327 return devices;
3b533202
BV
328}
329
811deee4
BV
330static GSList *hw_dev_list(void)
331{
0e94d524 332 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
333}
334
25a0f108 335static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 336{
269971dd 337 struct dev_context *devc;
c118080b 338 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
339 int64_t timediff_us, timediff_ms;
340 int err;
3b533202 341
269971dd 342 devc = sdi->priv;
c118080b 343 usb = sdi->conn;
3b533202
BV
344
345 /*
e98b7f1b
UH
346 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
347 * for the FX2 to renumerate.
3b533202 348 */
fc8fe3e3 349 err = SR_ERR;
269971dd 350 if (devc->fw_updated > 0) {
e98b7f1b
UH
351 sr_info("Waiting for device to reset.");
352 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 353 g_usleep(300 * 1000);
fc8fe3e3
BV
354 timediff_ms = 0;
355 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 356 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
357 break;
358 g_usleep(100 * 1000);
269971dd 359 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 360 timediff_ms = timediff_us / 1000;
e98b7f1b 361 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 362 }
e98b7f1b 363 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 364 } else {
25a0f108 365 err = dso_open(sdi);
3b533202
BV
366 }
367
368 if (err != SR_OK) {
e98b7f1b 369 sr_err("Unable to open device.");
3b533202
BV
370 return SR_ERR;
371 }
372
c118080b 373 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 374 if (err != 0) {
d4928d71
PS
375 sr_err("Unable to claim interface: %s.",
376 libusb_error_name(err));
3b533202
BV
377 return SR_ERR;
378 }
379
380 return SR_OK;
381}
382
25a0f108 383static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 384{
3b533202
BV
385 dso_close(sdi);
386
387 return SR_OK;
388}
389
390static int hw_cleanup(void)
391{
269971dd
BV
392 struct drv_context *drvc;
393
a873c594 394 if (!(drvc = di->priv))
269971dd 395 return SR_OK;
3b533202 396
39cfdd75 397 clear_instances();
3b533202 398
3b533202
BV
399 return SR_OK;
400}
401
79917848
BV
402static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
403{
404
405 (void)sdi;
406
407 switch (id) {
408 case SR_CONF_NUM_TIMEBASE:
409 *data = g_variant_new_int32(NUM_TIMEBASE);
410 break;
411 case SR_CONF_NUM_VDIV:
412 *data = g_variant_new_int32(NUM_VDIV);
413 break;
414 default:
bd6fbf62 415 return SR_ERR_NA;
79917848
BV
416 }
417
418 return SR_OK;
419}
420
f627afd6 421static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
3b533202 422{
269971dd 423 struct dev_context *devc;
f627afd6 424 double tmp_double;
86bb3f4a 425 uint64_t tmp_u64, p, q;
f627afd6
BV
426 int tmp_int, ret;
427 unsigned int i;
428 const char *tmp_str;
4a090d72 429 char **targets;
3b533202 430
3b533202
BV
431 if (sdi->status != SR_ST_ACTIVE)
432 return SR_ERR;
433
a370ef19 434 ret = SR_OK;
269971dd 435 devc = sdi->priv;
035a1078 436 switch (id) {
1953564a 437 case SR_CONF_LIMIT_FRAMES:
f627afd6 438 devc->limit_frames = g_variant_get_uint64(data);
ae88b97b 439 break;
1953564a 440 case SR_CONF_TRIGGER_SLOPE:
f627afd6 441 tmp_u64 = g_variant_get_uint64(data);
a370ef19
BV
442 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
443 ret = SR_ERR_ARG;
269971dd 444 devc->triggerslope = tmp_u64;
a370ef19 445 break;
1953564a 446 case SR_CONF_HORIZ_TRIGGERPOS:
f627afd6
BV
447 tmp_double = g_variant_get_double(data);
448 if (tmp_double < 0.0 || tmp_double > 1.0) {
e98b7f1b 449 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 450 ret = SR_ERR_ARG;
a370ef19 451 } else
f627afd6 452 devc->triggerposition = tmp_double;
a370ef19 453 break;
1953564a 454 case SR_CONF_BUFFERSIZE:
f627afd6 455 tmp_u64 = g_variant_get_uint64(data);
034accb5
BV
456 for (i = 0; i < 2; i++) {
457 if (devc->profile->buffersizes[i] == tmp_u64) {
269971dd 458 devc->framesize = tmp_u64;
a370ef19
BV
459 break;
460 }
461 }
034accb5 462 if (i == 2)
a370ef19
BV
463 ret = SR_ERR_ARG;
464 break;
1953564a 465 case SR_CONF_TIMEBASE:
86bb3f4a 466 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
467 tmp_int = -1;
468 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
469 if (timebases[i][0] == p && timebases[i][1] == q) {
470 tmp_int = i;
a370ef19
BV
471 break;
472 }
473 }
f627afd6
BV
474 if (tmp_int >= 0)
475 devc->timebase = tmp_int;
476 else
a370ef19
BV
477 ret = SR_ERR_ARG;
478 break;
1953564a 479 case SR_CONF_TRIGGER_SOURCE:
f627afd6 480 tmp_str = g_variant_get_string(data, NULL);
a370ef19 481 for (i = 0; trigger_sources[i]; i++) {
f627afd6
BV
482 if (!strcmp(tmp_str, trigger_sources[i])) {
483 devc->triggersource = g_strdup(tmp_str);
a370ef19
BV
484 break;
485 }
486 }
487 if (trigger_sources[i] == 0)
488 ret = SR_ERR_ARG;
489 break;
1953564a 490 case SR_CONF_FILTER:
f627afd6 491 tmp_str = g_variant_get_string(data, NULL);
269971dd 492 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
f627afd6 493 targets = g_strsplit(tmp_str, ",", 0);
ebb781a6
BV
494 for (i = 0; targets[i]; i++) {
495 if (targets[i] == '\0')
496 /* Empty filter string can be used to clear them all. */
497 ;
498 else if (!strcmp(targets[i], "CH1"))
269971dd 499 devc->filter_ch1 = TRUE;
ebb781a6 500 else if (!strcmp(targets[i], "CH2"))
269971dd 501 devc->filter_ch2 = TRUE;
ebb781a6 502 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 503 devc->filter_trigger = TRUE;
ebb781a6 504 else {
e98b7f1b 505 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
506 ret = SR_ERR_ARG;
507 }
508 }
509 g_strfreev(targets);
510 break;
1953564a 511 case SR_CONF_VDIV:
e98b7f1b 512 /* TODO: Not supporting vdiv per channel yet. */
86bb3f4a 513 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
514 tmp_int = -1;
515 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
516 if (vdivs[i][0] == p && vdivs[i][1] == q) {
517 tmp_int = i;
313deed2
BV
518 break;
519 }
520 }
f627afd6
BV
521 if (tmp_int >= 0) {
522 devc->voltage_ch1 = tmp_int;
523 devc->voltage_ch2 = tmp_int;
524 } else
313deed2
BV
525 ret = SR_ERR_ARG;
526 break;
1953564a 527 case SR_CONF_COUPLING:
f627afd6 528 tmp_str = g_variant_get_string(data, NULL);
e98b7f1b 529 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 530 for (i = 0; coupling[i]; i++) {
f627afd6 531 if (!strcmp(tmp_str, coupling[i])) {
269971dd
BV
532 devc->coupling_ch1 = i;
533 devc->coupling_ch2 = i;
b58fbd99
BV
534 break;
535 }
536 }
537 if (coupling[i] == 0)
538 ret = SR_ERR_ARG;
539 break;
3b533202 540 default:
bd6fbf62 541 ret = SR_ERR_NA;
e98b7f1b 542 break;
3b533202
BV
543 }
544
545 return ret;
546}
547
f627afd6 548static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
a1c743fc 549{
034accb5 550 struct dev_context *devc;
3973ee26
BV
551 GVariant *tuple, *rational[2];
552 GVariantBuilder gvb;
553 unsigned int i;
a1c743fc
BV
554
555 (void)sdi;
556
034accb5
BV
557 if (!sdi)
558 return SR_ERR_ARG;
559
560 devc = sdi->priv;
a1c743fc 561 switch (key) {
9a6517d1 562 case SR_CONF_DEVICE_OPTIONS:
f627afd6
BV
563 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
564 devopts, ARRAY_SIZE(devopts), sizeof(int32_t));
9a6517d1 565 break;
6d1ceffa 566 case SR_CONF_BUFFERSIZE:
f627afd6 567 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
034accb5 568 devc->profile->buffersizes, 2, sizeof(uint64_t));
6d1ceffa 569 break;
2a7b113d 570 case SR_CONF_COUPLING:
f627afd6 571 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
2a7b113d 572 break;
e4f2b2ad 573 case SR_CONF_VDIV:
3973ee26
BV
574 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
575 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
576 rational[0] = g_variant_new_uint64(vdivs[i][0]);
577 rational[1] = g_variant_new_uint64(vdivs[i][1]);
578 tuple = g_variant_new_tuple(rational, 2);
579 g_variant_builder_add_value(&gvb, tuple);
580 }
581 *data = g_variant_builder_end(&gvb);
e4f2b2ad 582 break;
6e1fbcc4 583 case SR_CONF_FILTER:
f627afd6
BV
584 *data = g_variant_new_strv(filter_targets,
585 ARRAY_SIZE(filter_targets));
6e1fbcc4 586 break;
41f5bd09 587 case SR_CONF_TIMEBASE:
3973ee26
BV
588 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
589 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
590 rational[0] = g_variant_new_uint64(timebases[i][0]);
591 rational[1] = g_variant_new_uint64(timebases[i][1]);
592 tuple = g_variant_new_tuple(rational, 2);
593 g_variant_builder_add_value(&gvb, tuple);
594 }
595 *data = g_variant_builder_end(&gvb);
41f5bd09 596 break;
328bafab 597 case SR_CONF_TRIGGER_SOURCE:
f627afd6
BV
598 *data = g_variant_new_strv(trigger_sources,
599 ARRAY_SIZE(trigger_sources));
328bafab 600 break;
a1c743fc 601 default:
bd6fbf62 602 return SR_ERR_NA;
a1c743fc
BV
603 }
604
605 return SR_OK;
606}
607
69e19dd7 608static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 609 int num_samples)
3b533202
BV
610{
611 struct sr_datafeed_packet packet;
612 struct sr_datafeed_analog analog;
69e19dd7 613 struct dev_context *devc;
c5841b28 614 float ch1, ch2, range;
6e71ef3b 615 int num_probes, data_offset, i;
3b533202 616
69e19dd7 617 devc = sdi->priv;
269971dd 618 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
619 packet.type = SR_DF_ANALOG;
620 packet.payload = &analog;
6e71ef3b 621 /* TODO: support for 5xxx series 9-bit samples */
69e19dd7 622 analog.probes = devc->enabled_probes;
e749a8cb 623 analog.num_samples = num_samples;
9956f285
UH
624 analog.mq = SR_MQ_VOLTAGE;
625 analog.unit = SR_UNIT_VOLT;
886a52b6 626 /* TODO: Check malloc return value. */
6e71ef3b
BV
627 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
628 data_offset = 0;
3b533202 629 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
630 /*
631 * The device always sends data for both channels. If a channel
6e71ef3b 632 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
633 * data. However, we only send the requested channels to
634 * the bus.
c5841b28 635 *
e98b7f1b
UH
636 * Voltage values are encoded as a value 0-255 (0-512 on the
637 * DSO-5200*), where the value is a point in the range
638 * represented by the vdiv setting. There are 8 vertical divs,
639 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
640 * and 255 = +2V.
6e71ef3b 641 */
e98b7f1b 642 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 643 if (devc->ch1_enabled) {
f627afd6 644 range = ((float)vdivs[devc->voltage_ch1][0] / vdivs[devc->voltage_ch1][1]) * 8;
e749a8cb 645 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
646 /* Value is centered around 0V. */
647 ch1 -= range / 2;
6e71ef3b
BV
648 analog.data[data_offset++] = ch1;
649 }
269971dd 650 if (devc->ch2_enabled) {
f627afd6 651 range = ((float)vdivs[devc->voltage_ch2][0] / vdivs[devc->voltage_ch2][1]) * 8;
e749a8cb 652 ch2 = range / 255 * *(buf + i * 2);
c5841b28 653 ch2 -= range / 2;
6e71ef3b
BV
654 analog.data[data_offset++] = ch2;
655 }
3b533202 656 }
269971dd 657 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
658}
659
e98b7f1b
UH
660/*
661 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 662 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 663 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
664 * the libsigrok session bus.
665 */
666static void receive_transfer(struct libusb_transfer *transfer)
667{
668 struct sr_datafeed_packet packet;
69e19dd7 669 struct sr_dev_inst *sdi;
269971dd 670 struct dev_context *devc;
e749a8cb
BV
671 int num_samples, pre;
672
69e19dd7
BV
673 sdi = transfer->user_data;
674 devc = sdi->priv;
d4007311 675 sr_spew("receive_transfer(): status %d received %d bytes.",
e98b7f1b 676 transfer->status, transfer->actual_length);
e749a8cb
BV
677
678 if (transfer->actual_length == 0)
679 /* Nothing to send to the bus. */
680 return;
681
682 num_samples = transfer->actual_length / 2;
683
d4007311 684 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
e98b7f1b 685 devc->samp_received + num_samples, devc->framesize);
e749a8cb 686
e98b7f1b
UH
687 /*
688 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
689 * doesn't represent the trigger point. The offset at which the trigger
690 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
691 * from there up the session bus. The samples in the frame buffer
692 * before that trigger point came after the end of the device's frame
693 * buffer was reached, and it wrapped around to overwrite up until the
694 * trigger point.
e749a8cb 695 */
269971dd 696 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 697 /* Trigger point not yet reached. */
269971dd 698 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 699 /* The entire chunk is before the trigger point. */
269971dd 700 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 701 transfer->buffer, num_samples * 2);
269971dd 702 devc->samp_buffered += num_samples;
e749a8cb 703 } else {
e98b7f1b
UH
704 /*
705 * This chunk hits or overruns the trigger point.
e749a8cb 706 * Store the part before the trigger fired, and
e98b7f1b
UH
707 * send the rest up to the session bus.
708 */
269971dd
BV
709 pre = devc->trigger_offset - devc->samp_received;
710 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 711 transfer->buffer, pre * 2);
269971dd 712 devc->samp_buffered += pre;
e749a8cb
BV
713
714 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
715 sr_dbg("Reached trigger point, %d samples buffered.",
716 devc->samp_buffered);
e749a8cb
BV
717
718 /* Avoid the corner case where the chunk ended at
719 * exactly the trigger point. */
720 if (num_samples > pre)
69e19dd7 721 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
722 num_samples - pre);
723 }
724 } else {
725 /* Already past the trigger point, just send it all out. */
69e19dd7 726 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
727 num_samples);
728 }
729
269971dd 730 devc->samp_received += num_samples;
e749a8cb
BV
731
732 /* Everything in this transfer was either copied to the buffer or
733 * sent to the session bus. */
3b533202
BV
734 g_free(transfer->buffer);
735 libusb_free_transfer(transfer);
3b533202 736
269971dd 737 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
738 /* That was the last chunk in this frame. Send the buffered
739 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
740 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
741 devc->samp_buffered);
69e19dd7 742 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
743
744 /* Mark the end of this frame. */
ae88b97b 745 packet.type = SR_DF_FRAME_END;
269971dd 746 sr_session_send(devc->cb_data, &packet);
ae88b97b 747
269971dd 748 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 749 /* Terminate session */
a3508e33 750 devc->dev_state = STOPPING;
ae88b97b 751 } else {
269971dd 752 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
753 }
754 }
3b533202
BV
755}
756
757static int handle_event(int fd, int revents, void *cb_data)
758{
a3508e33 759 const struct sr_dev_inst *sdi;
ae88b97b 760 struct sr_datafeed_packet packet;
3b533202 761 struct timeval tv;
269971dd 762 struct dev_context *devc;
a873c594 763 struct drv_context *drvc = di->priv;
a3508e33
BV
764 const struct libusb_pollfd **lupfd;
765 int num_probes, i;
6e6eeff4
BV
766 uint32_t trigger_offset;
767 uint8_t capturestate;
3b533202 768
3b533202
BV
769 (void)fd;
770 (void)revents;
771
269971dd
BV
772 sdi = cb_data;
773 devc = sdi->priv;
a3508e33
BV
774 if (devc->dev_state == STOPPING) {
775 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
776 sr_dbg("Stopping acquisition.");
777 /*
778 * TODO: Doesn't really cancel pending transfers so they might
779 * come in after SR_DF_END is sent.
780 */
d4abb463 781 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
782 for (i = 0; lupfd[i]; i++)
783 sr_source_remove(lupfd[i]->fd);
784 free(lupfd);
785
786 packet.type = SR_DF_END;
787 sr_session_send(sdi, &packet);
788
789 devc->dev_state = IDLE;
790
791 return TRUE;
792 }
793
3b533202
BV
794 /* Always handle pending libusb events. */
795 tv.tv_sec = tv.tv_usec = 0;
d4abb463 796 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 797
3b533202 798 /* TODO: ugh */
269971dd 799 if (devc->dev_state == NEW_CAPTURE) {
c118080b 800 if (dso_capture_start(sdi) != SR_OK)
3b533202 801 return TRUE;
c118080b 802 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 803 return TRUE;
c118080b 804// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 805// return TRUE;
e98b7f1b 806 sr_dbg("Successfully requested next chunk.");
269971dd 807 devc->dev_state = CAPTURE;
3b533202
BV
808 return TRUE;
809 }
269971dd 810 if (devc->dev_state != CAPTURE)
3b533202
BV
811 return TRUE;
812
c118080b 813 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 814 return TRUE;
3b533202 815
e98b7f1b
UH
816 sr_dbg("Capturestate %d.", capturestate);
817 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
818 switch (capturestate) {
819 case CAPTURE_EMPTY:
269971dd
BV
820 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
821 devc->capture_empty_count = 0;
c118080b 822 if (dso_capture_start(sdi) != SR_OK)
3b533202 823 break;
c118080b 824 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 825 break;
c118080b 826// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 827// break;
e98b7f1b 828 sr_dbg("Successfully requested next chunk.");
3b533202
BV
829 }
830 break;
831 case CAPTURE_FILLING:
e98b7f1b 832 /* No data yet. */
3b533202
BV
833 break;
834 case CAPTURE_READY_8BIT:
e749a8cb 835 /* Remember where in the captured frame the trigger is. */
269971dd 836 devc->trigger_offset = trigger_offset;
e749a8cb 837
269971dd 838 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 839 /* TODO: Check malloc return value. */
269971dd
BV
840 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
841 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 842
3b533202 843 /* Tell the scope to send us the first frame. */
69e19dd7 844 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 845 break;
ae88b97b 846
e98b7f1b
UH
847 /*
848 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
849 * the data we just told the scope to send.
850 */
269971dd 851 devc->dev_state = FETCH_DATA;
ae88b97b
BV
852
853 /* Tell the frontend a new frame is on the way. */
854 packet.type = SR_DF_FRAME_BEGIN;
269971dd 855 sr_session_send(sdi, &packet);
3b533202
BV
856 break;
857 case CAPTURE_READY_9BIT:
858 /* TODO */
e98b7f1b 859 sr_err("Not yet supported.");
3b533202
BV
860 break;
861 case CAPTURE_TIMEOUT:
862 /* Doesn't matter, we'll try again next time. */
863 break;
864 default:
e98b7f1b
UH
865 sr_dbg("Unknown capture state: %d.", capturestate);
866 break;
3b533202
BV
867 }
868
869 return TRUE;
870}
871
3ffb6964 872static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 873 void *cb_data)
3b533202
BV
874{
875 const struct libusb_pollfd **lupfd;
269971dd 876 struct dev_context *devc;
a873c594 877 struct drv_context *drvc = di->priv;
3b533202
BV
878 int i;
879
3b533202
BV
880 if (sdi->status != SR_ST_ACTIVE)
881 return SR_ERR;
882
269971dd
BV
883 devc = sdi->priv;
884 devc->cb_data = cb_data;
3b533202 885
014359e3 886 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 887 sr_err("Failed to configure probes.");
014359e3
BV
888 return SR_ERR;
889 }
890
c118080b 891 if (dso_init(sdi) != SR_OK)
3b533202
BV
892 return SR_ERR;
893
c118080b 894 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
895 return SR_ERR;
896
269971dd 897 devc->dev_state = CAPTURE;
d4abb463 898 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 899 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
900 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
901 handle_event, (void *)sdi);
3b533202
BV
902 free(lupfd);
903
904 /* Send header packet to the session bus. */
4afdfd46 905 std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
3b533202 906
3b533202
BV
907 return SR_OK;
908}
909
69b07d14 910static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 911{
269971dd
BV
912 struct dev_context *devc;
913
914 (void)cb_data;
3b533202 915
3b533202
BV
916 if (sdi->status != SR_ST_ACTIVE)
917 return SR_ERR;
918
a3508e33
BV
919 devc = sdi->priv;
920 devc->dev_state = STOPPING;
3b533202
BV
921
922 return SR_OK;
923}
924
62bb8840 925SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
926 .name = "hantek-dso",
927 .longname = "Hantek DSO",
928 .api_version = 1,
929 .init = hw_init,
930 .cleanup = hw_cleanup,
61136ea6 931 .scan = hw_scan,
811deee4
BV
932 .dev_list = hw_dev_list,
933 .dev_clear = clear_instances,
79917848 934 .config_get = config_get,
035a1078 935 .config_set = config_set,
a1c743fc 936 .config_list = config_list,
3b533202
BV
937 .dev_open = hw_dev_open,
938 .dev_close = hw_dev_close,
62bb8840
UH
939 .dev_acquisition_start = hw_dev_acquisition_start,
940 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 941 .priv = NULL,
3b533202 942};