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[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
417412c8 21#include <math.h>
3b533202
BV
22#include <stdio.h>
23#include <stdint.h>
24#include <stdlib.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <fcntl.h>
28#include <unistd.h>
29#include <string.h>
30#include <sys/time.h>
31#include <inttypes.h>
3b533202
BV
32#include <glib.h>
33#include <libusb.h>
c1aae900 34#include <libsigrok/libsigrok.h>
45c59c8b 35#include "libsigrok-internal.h"
caeb8d7a 36#include "protocol.h"
3b533202 37
fc8fe3e3
BV
38/* Max time in ms before we want to check on USB events */
39/* TODO tune this properly */
e98b7f1b 40#define TICK 1
3b533202 41
d9251a2c
UH
42#define NUM_TIMEBASE 10
43#define NUM_VDIV 8
79917848 44
07ffa5b3
UH
45#define NUM_BUFFER_SIZES 2
46
584560f1 47static const uint32_t scanopts[] = {
624f5b4c
BV
48 SR_CONF_CONN,
49};
50
5ecd9049 51static const uint32_t drvopts[] = {
1953564a 52 SR_CONF_OSCILLOSCOPE,
933defaa
BV
53};
54
5ecd9049 55static const uint32_t devopts[] = {
e91bb0a6 56 SR_CONF_CONTINUOUS,
933defaa 57 SR_CONF_CONN | SR_CONF_GET,
50bc52f3 58 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
933defaa 59 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
95983cc3 61 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
933defaa
BV
62 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
86621306 64 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3b2b7031 65 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 66 SR_CONF_NUM_VDIV | SR_CONF_GET,
12f62ce6 67 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
3b533202
BV
68};
69
933defaa 70static const uint32_t devopts_cg[] = {
933defaa
BV
71 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
72 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 73 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
933defaa
BV
74};
75
ba7dd8bb 76static const char *channel_names[] = {
78693401 77 "CH1", "CH2",
3b533202
BV
78};
79
034accb5 80static const uint64_t buffersizes_32k[] = {
1a46cc62 81 (10 * 1024), (32 * 1024),
034accb5
BV
82};
83static const uint64_t buffersizes_512k[] = {
1a46cc62 84 (10 * 1024), (512 * 1024),
034accb5
BV
85};
86static const uint64_t buffersizes_14k[] = {
1a46cc62 87 (10 * 1024), (14 * 1024),
034accb5
BV
88};
89
62bb8840 90static const struct dso_profile dev_profiles[] = {
88a13f30 91 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 92 "Hantek", "DSO-2090",
034accb5 93 buffersizes_32k,
8e2d6c9d 94 "hantek-dso-2090.fw" },
88a13f30
BV
95 { 0x04b4, 0x2150, 0x04b5, 0x2150,
96 "Hantek", "DSO-2150",
034accb5 97 buffersizes_32k,
8e2d6c9d 98 "hantek-dso-2150.fw" },
88a13f30
BV
99 { 0x04b4, 0x2250, 0x04b5, 0x2250,
100 "Hantek", "DSO-2250",
034accb5 101 buffersizes_512k,
8e2d6c9d 102 "hantek-dso-2250.fw" },
88a13f30
BV
103 { 0x04b4, 0x5200, 0x04b5, 0x5200,
104 "Hantek", "DSO-5200",
034accb5 105 buffersizes_14k,
8e2d6c9d 106 "hantek-dso-5200.fw" },
88a13f30
BV
107 { 0x04b4, 0x520a, 0x04b5, 0x520a,
108 "Hantek", "DSO-5200A",
034accb5 109 buffersizes_512k,
8e2d6c9d 110 "hantek-dso-5200A.fw" },
1b4aedc0 111 ALL_ZERO
a370ef19
BV
112};
113
86bb3f4a 114static const uint64_t timebases[][2] = {
a370ef19
BV
115 /* microseconds */
116 { 10, 1000000 },
117 { 20, 1000000 },
118 { 40, 1000000 },
119 { 100, 1000000 },
120 { 200, 1000000 },
121 { 400, 1000000 },
122 /* milliseconds */
123 { 1, 1000 },
124 { 2, 1000 },
125 { 4, 1000 },
126 { 10, 1000 },
127 { 20, 1000 },
128 { 40, 1000 },
129 { 100, 1000 },
130 { 200, 1000 },
131 { 400, 1000 },
a370ef19
BV
132};
133
11e33196
PM
134static const uint64_t samplerates[] = {
135 SR_KHZ(20),
136 SR_KHZ(25),
137 SR_KHZ(50),
138 SR_KHZ(100),
139 SR_KHZ(200),
140 SR_KHZ(250),
141 SR_KHZ(500),
142 SR_MHZ(1),
143 SR_MHZ(2),
144 SR_MHZ(5),
145 SR_MHZ(10),
146 SR_MHZ(20),
147 SR_MHZ(25),
148 SR_MHZ(50),
149 SR_MHZ(100),
150 SR_MHZ(125),
ab8df2b1 151 /* Fast mode not supported yet.
11e33196
PM
152 SR_MHZ(200),
153 SR_MHZ(250), */
154};
155
86bb3f4a 156static const uint64_t vdivs[][2] = {
313deed2
BV
157 /* millivolts */
158 { 10, 1000 },
159 { 20, 1000 },
160 { 50, 1000 },
161 { 100, 1000 },
162 { 200, 1000 },
163 { 500, 1000 },
164 /* volts */
165 { 1, 1 },
166 { 2, 1 },
167 { 5, 1 },
313deed2
BV
168};
169
62bb8840 170static const char *trigger_sources[] = {
f8195cb2 171 "CH1", "CH2", "EXT",
88a13f30 172 /* TODO: forced */
a370ef19 173};
3b533202 174
933defaa 175static const char *trigger_slopes[] = {
f8195cb2 176 "r", "f",
ebb781a6
BV
177};
178
62bb8840 179static const char *coupling[] = {
f8195cb2 180 "AC", "DC", "GND",
b58fbd99
BV
181};
182
15a5bfe4 183static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
184{
185 struct sr_dev_inst *sdi;
ba7dd8bb 186 struct sr_channel *ch;
933defaa 187 struct sr_channel_group *cg;
269971dd 188 struct dev_context *devc;
dcd438ee 189 unsigned int i;
3b533202 190
aac29cc1 191 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
192 sdi->status = SR_ST_INITIALIZING;
193 sdi->vendor = g_strdup(prof->vendor);
194 sdi->model = g_strdup(prof->model);
3b533202 195
e98b7f1b 196 /*
ba7dd8bb 197 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
198 * a trigger source internal to the device.
199 */
0f34cb47 200 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 201 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
d810901a 202 cg = sr_channel_group_new(sdi, channel_names[i], NULL);
933defaa 203 cg->channels = g_slist_append(cg->channels, ch);
87ca93c5
BV
204 }
205
933defaa 206 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
207 devc->profile = prof;
208 devc->dev_state = IDLE;
209 devc->timebase = DEFAULT_TIMEBASE;
11e33196 210 devc->samplerate = DEFAULT_SAMPLERATE;
417412c8
AJ
211 devc->ch_enabled[0] = TRUE;
212 devc->ch_enabled[1] = TRUE;
933defaa
BV
213 devc->voltage[0] = DEFAULT_VOLTAGE;
214 devc->voltage[1] = DEFAULT_VOLTAGE;
215 devc->coupling[0] = DEFAULT_COUPLING;
216 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
217 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
218 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
219 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
220 devc->framesize = DEFAULT_FRAMESIZE;
221 devc->triggerslope = SLOPE_POSITIVE;
222 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
95983cc3 223 devc->capture_ratio = DEFAULT_CAPTURE_RATIO;
269971dd 224 sdi->priv = devc;
3b533202
BV
225
226 return sdi;
227}
228
ba7dd8bb 229static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 230{
014359e3 231 struct dev_context *devc;
ba7dd8bb 232 struct sr_channel *ch;
62bb8840 233 const GSList *l;
69e19dd7 234 int p;
3b533202 235
014359e3
BV
236 devc = sdi->priv;
237
ba7dd8bb 238 g_slist_free(devc->enabled_channels);
be10b96d 239 devc->enabled_channels = NULL;
417412c8 240 devc->ch_enabled[0] = devc->ch_enabled[1] = FALSE;
ba7dd8bb
UH
241 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
242 ch = l->data;
69e19dd7 243 if (p == 0)
417412c8 244 devc->ch_enabled[0] = ch->enabled;
69e19dd7 245 else
417412c8 246 devc->ch_enabled[1] = ch->enabled;
ba7dd8bb
UH
247 if (ch->enabled)
248 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
249 }
250
251 return SR_OK;
252}
253
3553451f 254static void clear_helper(struct dev_context *devc)
39cfdd75 255{
949b3dc0 256 g_free(devc->triggersource);
ba7dd8bb 257 g_slist_free(devc->enabled_channels);
949b3dc0 258}
39cfdd75 259
4f840ce9 260static int dev_clear(const struct sr_dev_driver *di)
949b3dc0 261{
3553451f 262 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
39cfdd75
BV
263}
264
4f840ce9 265static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 266{
269971dd
BV
267 struct drv_context *drvc;
268 struct dev_context *devc;
294dbac7 269 struct sr_dev_inst *sdi;
46a743c1
BV
270 struct sr_usb_dev_inst *usb;
271 struct sr_config *src;
294dbac7
BV
272 const struct dso_profile *prof;
273 GSList *l, *devices, *conn_devices;
39cfdd75 274 struct libusb_device_descriptor des;
3b533202 275 libusb_device **devlist;
2a8f2d41 276 int i, j;
46a743c1 277 const char *conn;
395206f4 278 char connection_id[64];
e98b7f1b 279
41812aca 280 drvc = di->context;
39cfdd75 281
4b97c74e
UH
282 devices = 0;
283
294dbac7
BV
284 conn = NULL;
285 for (l = options; l; l = l->next) {
286 src = l->data;
287 if (src->key == SR_CONF_CONN) {
288 conn = g_variant_get_string(src->data, NULL);
289 break;
290 }
291 }
292 if (conn)
293 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
294 else
295 conn_devices = NULL;
296
39cfdd75 297 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 298 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 299 for (i = 0; devlist[i]; i++) {
46a743c1 300 if (conn) {
294dbac7
BV
301 usb = NULL;
302 for (l = conn_devices; l; l = l->next) {
303 usb = l->data;
304 if (usb->bus == libusb_get_bus_number(devlist[i])
305 && usb->address == libusb_get_device_address(devlist[i]))
306 break;
307 }
308 if (!l)
309 /* This device matched none of the ones that
310 * matched the conn specification. */
311 continue;
46a743c1 312 }
294dbac7 313
2a8f2d41 314 libusb_get_device_descriptor(devlist[i], &des);
3b533202 315
6c1a76d1
RT
316 if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
317 continue;
395206f4 318
3b533202
BV
319 prof = NULL;
320 for (j = 0; dev_profiles[j].orig_vid; j++) {
321 if (des.idVendor == dev_profiles[j].orig_vid
322 && des.idProduct == dev_profiles[j].orig_pid) {
323 /* Device matches the pre-firmware profile. */
324 prof = &dev_profiles[j];
e98b7f1b 325 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 326 sdi = dso_dev_new(prof);
395206f4 327 sdi->connection_id = g_strdup(connection_id);
39cfdd75 328 devices = g_slist_append(devices, sdi);
269971dd 329 devc = sdi->priv;
8e2d6c9d 330 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
1372bdcd 331 USB_CONFIGURATION, prof->firmware) == SR_OK) {
3b533202 332 /* Remember when the firmware on this device was updated */
269971dd 333 devc->fw_updated = g_get_monotonic_time();
1372bdcd
GS
334 } else {
335 sr_err("Firmware upload failed, name %s", prof->firmware);
336 }
3b533202 337 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 338 sdi->conn = sr_usb_dev_inst_new(
3b533202 339 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
340 break;
341 } else if (des.idVendor == dev_profiles[j].fw_vid
342 && des.idProduct == dev_profiles[j].fw_pid) {
343 /* Device matches the post-firmware profile. */
344 prof = &dev_profiles[j];
e98b7f1b 345 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 346 sdi = dso_dev_new(prof);
395206f4 347 sdi->connection_id = g_strdup(connection_id);
3b533202 348 sdi->status = SR_ST_INACTIVE;
39cfdd75 349 devices = g_slist_append(devices, sdi);
d0eec1ee 350 sdi->inst_type = SR_INST_USB;
c118080b 351 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
352 libusb_get_bus_number(devlist[i]),
353 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
354 break;
355 }
356 }
357 if (!prof)
358 /* not a supported VID/PID */
359 continue;
360 }
361 libusb_free_device_list(devlist, 1);
362
15a5bfe4 363 return std_scan_complete(di, devices);
3b533202
BV
364}
365
6078d2c9 366static int dev_open(struct sr_dev_inst *sdi)
3b533202 367{
269971dd 368 struct dev_context *devc;
c118080b 369 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
370 int64_t timediff_us, timediff_ms;
371 int err;
3b533202 372
269971dd 373 devc = sdi->priv;
c118080b 374 usb = sdi->conn;
3b533202
BV
375
376 /*
e98b7f1b
UH
377 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
378 * for the FX2 to renumerate.
3b533202 379 */
fc8fe3e3 380 err = SR_ERR;
269971dd 381 if (devc->fw_updated > 0) {
e98b7f1b
UH
382 sr_info("Waiting for device to reset.");
383 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 384 g_usleep(300 * 1000);
fc8fe3e3
BV
385 timediff_ms = 0;
386 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 387 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
388 break;
389 g_usleep(100 * 1000);
269971dd 390 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 391 timediff_ms = timediff_us / 1000;
e98b7f1b 392 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 393 }
6433156c 394 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 395 } else {
25a0f108 396 err = dso_open(sdi);
3b533202
BV
397 }
398
399 if (err != SR_OK) {
e98b7f1b 400 sr_err("Unable to open device.");
3b533202
BV
401 return SR_ERR;
402 }
403
c118080b 404 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 405 if (err != 0) {
d4928d71 406 sr_err("Unable to claim interface: %s.",
d9251a2c 407 libusb_error_name(err));
3b533202
BV
408 return SR_ERR;
409 }
410
411 return SR_OK;
412}
413
6078d2c9 414static int dev_close(struct sr_dev_inst *sdi)
3b533202 415{
3b533202
BV
416 dso_close(sdi);
417
418 return SR_OK;
419}
420
dd7a72ea
UH
421static int config_get(uint32_t key, GVariant **data,
422 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
79917848 423{
933defaa 424 struct dev_context *devc;
624f5b4c 425 struct sr_usb_dev_inst *usb;
2c240774 426 const char *s;
933defaa
BV
427 const uint64_t *vdiv;
428 int ch_idx;
79917848 429
584560f1 430 switch (key) {
bf622e6d 431 case SR_CONF_NUM_HDIV:
79917848
BV
432 *data = g_variant_new_int32(NUM_TIMEBASE);
433 break;
434 case SR_CONF_NUM_VDIV:
435 *data = g_variant_new_int32(NUM_VDIV);
436 break;
933defaa
BV
437 }
438
439 if (!sdi)
440 return SR_ERR_ARG;
441
442 devc = sdi->priv;
443 if (!cg) {
444 switch (key) {
12f62ce6
PM
445 case SR_CONF_TRIGGER_LEVEL:
446 *data = g_variant_new_double(devc->voffset_trigger);
447 break;
933defaa
BV
448 case SR_CONF_CONN:
449 if (!sdi->conn)
450 return SR_ERR_ARG;
451 usb = sdi->conn;
452 if (usb->address == 255)
453 /* Device still needs to re-enumerate after firmware
454 * upload, so we don't know its (future) address. */
455 return SR_ERR;
95c1fe62 456 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
933defaa
BV
457 break;
458 case SR_CONF_TIMEBASE:
459 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
460 timebases[devc->timebase][1]);
461 break;
3b2b7031 462 case SR_CONF_SAMPLERATE:
11e33196 463 *data = g_variant_new_uint64(devc->samplerate);
3b2b7031 464 break;
933defaa
BV
465 case SR_CONF_BUFFERSIZE:
466 *data = g_variant_new_uint64(devc->framesize);
467 break;
468 case SR_CONF_TRIGGER_SOURCE:
469 *data = g_variant_new_string(devc->triggersource);
470 break;
471 case SR_CONF_TRIGGER_SLOPE:
c442ffda 472 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
473 *data = g_variant_new_string(s);
474 break;
95983cc3
PM
475 case SR_CONF_CAPTURE_RATIO:
476 *data = g_variant_new_uint64(devc->capture_ratio);
933defaa 477 break;
50bc52f3
VO
478 case SR_CONF_LIMIT_FRAMES:
479 *data = g_variant_new_uint64(devc->limit_frames);
480 break;
933defaa
BV
481 default:
482 return SR_ERR_NA;
483 }
484 } else {
485 if (sdi->channel_groups->data == cg)
486 ch_idx = 0;
487 else if (sdi->channel_groups->next->data == cg)
488 ch_idx = 1;
489 else
490 return SR_ERR_ARG;
0c5f2abc 491 switch (key) {
933defaa
BV
492 case SR_CONF_FILTER:
493 *data = g_variant_new_boolean(devc->filter[ch_idx]);
494 break;
495 case SR_CONF_VDIV:
496 vdiv = vdivs[devc->voltage[ch_idx]];
497 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
498 break;
499 case SR_CONF_COUPLING:
500 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
501 break;
502 }
79917848
BV
503 }
504
505 return SR_OK;
506}
507
dd7a72ea
UH
508static int config_set(uint32_t key, GVariant *data,
509 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
3b533202 510{
269971dd 511 struct dev_context *devc;
697fb6dd 512 int ch_idx, idx;
12f62ce6 513 float flt;
8f996b89 514
269971dd 515 devc = sdi->priv;
933defaa
BV
516 if (!cg) {
517 switch (key) {
518 case SR_CONF_LIMIT_FRAMES:
519 devc->limit_frames = g_variant_get_uint64(data);
520 break;
12f62ce6
PM
521 case SR_CONF_TRIGGER_LEVEL:
522 flt = g_variant_get_double(data);
523 if (flt < 0.0 || flt > 1.0) {
524 sr_err("Trigger level must be in [0.0,1.0].");
525 return SR_ERR_ARG;
526 }
12f62ce6 527 devc->voffset_trigger = flt;
ab8df2b1
UH
528 if (dso_set_voffsets(sdi) != SR_OK)
529 return SR_ERR;
12f62ce6 530 break;
933defaa 531 case SR_CONF_TRIGGER_SLOPE:
697fb6dd 532 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
933defaa 533 return SR_ERR_ARG;
db85496e 534 devc->triggerslope = idx;
933defaa 535 break;
95983cc3 536 case SR_CONF_CAPTURE_RATIO:
04069272 537 devc->capture_ratio = g_variant_get_uint64(data);
933defaa
BV
538 break;
539 case SR_CONF_BUFFERSIZE:
697fb6dd 540 if ((idx = std_u64_idx(data, devc->profile->buffersizes, NUM_BUFFER_SIZES)) < 0)
a9010323 541 return SR_ERR_ARG;
697fb6dd 542 devc->framesize = devc->profile->buffersizes[idx];
933defaa
BV
543 break;
544 case SR_CONF_TIMEBASE:
697fb6dd 545 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(timebases))) < 0)
a9010323 546 return SR_ERR_ARG;
697fb6dd 547 devc->timebase = idx;
933defaa 548 break;
11e33196
PM
549 case SR_CONF_SAMPLERATE:
550 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(samplerates))) < 0)
551 return SR_ERR_ARG;
552 devc->samplerate = samplerates[idx];
553 if (dso_set_trigger_samplerate(sdi) != SR_OK)
554 return SR_ERR;
555 break;
933defaa 556 case SR_CONF_TRIGGER_SOURCE:
697fb6dd 557 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_sources))) < 0)
a9010323 558 return SR_ERR_ARG;
697fb6dd 559 devc->triggersource = g_strdup(trigger_sources[idx]);
933defaa
BV
560 break;
561 default:
a9010323 562 return SR_ERR_NA;
ebb781a6 563 }
933defaa
BV
564 } else {
565 if (sdi->channel_groups->data == cg)
566 ch_idx = 0;
567 else if (sdi->channel_groups->next->data == cg)
568 ch_idx = 1;
569 else
570 return SR_ERR_ARG;
571 switch (key) {
572 case SR_CONF_FILTER:
573 devc->filter[ch_idx] = g_variant_get_boolean(data);
574 break;
575 case SR_CONF_VDIV:
697fb6dd 576 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
a9010323 577 return SR_ERR_ARG;
697fb6dd 578 devc->voltage[ch_idx] = idx;
933defaa
BV
579 break;
580 case SR_CONF_COUPLING:
697fb6dd 581 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
a9010323 582 return SR_ERR_ARG;
697fb6dd 583 devc->coupling[ch_idx] = idx;
933defaa
BV
584 break;
585 default:
a9010323 586 return SR_ERR_NA;
b58fbd99 587 }
3b533202
BV
588 }
589
a9010323 590 return SR_OK;
3b533202
BV
591}
592
dd7a72ea
UH
593static int config_list(uint32_t key, GVariant **data,
594 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 595{
034accb5 596 struct dev_context *devc;
a1c743fc 597
933defaa 598 if (!cg) {
93b118da 599 switch (key) {
e66d1892 600 case SR_CONF_SCAN_OPTIONS:
933defaa 601 case SR_CONF_DEVICE_OPTIONS:
e66d1892 602 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
933defaa
BV
603 case SR_CONF_BUFFERSIZE:
604 if (!sdi)
605 return SR_ERR_ARG;
606 devc = sdi->priv;
105df674 607 *data = std_gvar_array_u64(devc->profile->buffersizes, NUM_BUFFER_SIZES);
933defaa 608 break;
11e33196
PM
609 case SR_CONF_SAMPLERATE:
610 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
611 break;
933defaa 612 case SR_CONF_TIMEBASE:
58ffcf97 613 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(timebases));
933defaa
BV
614 break;
615 case SR_CONF_TRIGGER_SOURCE:
53012da6 616 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_sources));
933defaa
BV
617 break;
618 case SR_CONF_TRIGGER_SLOPE:
53012da6 619 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
933defaa
BV
620 break;
621 default:
622 return SR_ERR_NA;
3973ee26 623 }
933defaa 624 } else {
93b118da 625 switch (key) {
933defaa 626 case SR_CONF_DEVICE_OPTIONS:
53012da6 627 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
933defaa
BV
628 break;
629 case SR_CONF_COUPLING:
53012da6 630 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
933defaa
BV
631 break;
632 case SR_CONF_VDIV:
58ffcf97 633 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(vdivs));
933defaa
BV
634 break;
635 default:
636 return SR_ERR_NA;
3973ee26 637 }
a1c743fc
BV
638 }
639
640 return SR_OK;
641}
642
69e19dd7 643static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 644 int num_samples)
3b533202
BV
645{
646 struct sr_datafeed_packet packet;
ae7d8a58
UH
647 struct sr_datafeed_analog analog;
648 struct sr_analog_encoding encoding;
649 struct sr_analog_meaning meaning;
650 struct sr_analog_spec spec;
417412c8
AJ
651 struct dev_context *devc = sdi->priv;
652 GSList *channels = devc->enabled_channels;
3b533202 653
ae7d8a58 654 packet.type = SR_DF_ANALOG;
3b533202 655 packet.payload = &analog;
6e71ef3b 656 /* TODO: support for 5xxx series 9-bit samples */
ae7d8a58 657 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
e749a8cb 658 analog.num_samples = num_samples;
ae7d8a58
UH
659 analog.meaning->mq = SR_MQ_VOLTAGE;
660 analog.meaning->unit = SR_UNIT_VOLT;
661 analog.meaning->mqflags = 0;
886a52b6 662 /* TODO: Check malloc return value. */
417412c8
AJ
663 analog.data = g_try_malloc(num_samples * sizeof(float));
664
b3fd0993 665 for (int ch = 0; ch < NUM_CHANNELS; ch++) {
417412c8
AJ
666 if (!devc->ch_enabled[ch])
667 continue;
668
669 float range = ((float)vdivs[devc->voltage[ch]][0] / vdivs[devc->voltage[ch]][1]) * 8;
670 float vdivlog = log10f(range / 255);
671 int digits = -(int)vdivlog + (vdivlog < 0.0);
672 analog.encoding->digits = digits;
673 analog.spec->spec_digits = digits;
674 analog.meaning->channels = g_slist_append(NULL, channels->data);
675
676 for (int i = 0; i < num_samples; i++) {
677 /*
678 * The device always sends data for both channels. If a channel
679 * is disabled, it contains a copy of the enabled channel's
680 * data. However, we only send the requested channels to
681 * the bus.
682 *
683 * Voltage values are encoded as a value 0-255 (0-512 on the
684 * DSO-5200*), where the value is a point in the range
685 * represented by the vdiv setting. There are 8 vertical divs,
686 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
687 * and 255 = +2V.
688 */
689 /* TODO: Support for DSO-5xxx series 9-bit samples. */
690 ((float *)analog.data)[i] = range / 255 * *(buf + i * 2 + 1 - ch) - range / 2;
6e71ef3b 691 }
417412c8
AJ
692 sr_session_send(sdi, &packet);
693 g_slist_free(analog.meaning->channels);
694
695 channels = channels->next;
3b533202 696 }
1e6b5b93 697 g_free(analog.data);
e749a8cb
BV
698}
699
e98b7f1b
UH
700/*
701 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 702 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 703 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
704 * the libsigrok session bus.
705 */
55462b8b 706static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb 707{
69e19dd7 708 struct sr_dev_inst *sdi;
269971dd 709 struct dev_context *devc;
e749a8cb
BV
710 int num_samples, pre;
711
69e19dd7
BV
712 sdi = transfer->user_data;
713 devc = sdi->priv;
eb8e6cd2
UH
714 sr_spew("receive_transfer(): status %s received %d bytes.",
715 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
716
717 if (transfer->actual_length == 0)
718 /* Nothing to send to the bus. */
719 return;
720
721 num_samples = transfer->actual_length / 2;
722
d4007311 723 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
d9251a2c 724 devc->samp_received + num_samples, devc->framesize);
e749a8cb 725
e98b7f1b
UH
726 /*
727 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
728 * doesn't represent the trigger point. The offset at which the trigger
729 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
730 * from there up the session bus. The samples in the frame buffer
731 * before that trigger point came after the end of the device's frame
732 * buffer was reached, and it wrapped around to overwrite up until the
733 * trigger point.
e749a8cb 734 */
269971dd 735 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 736 /* Trigger point not yet reached. */
269971dd 737 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 738 /* The entire chunk is before the trigger point. */
269971dd 739 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 740 transfer->buffer, num_samples * 2);
269971dd 741 devc->samp_buffered += num_samples;
e749a8cb 742 } else {
e98b7f1b
UH
743 /*
744 * This chunk hits or overruns the trigger point.
e749a8cb 745 * Store the part before the trigger fired, and
e98b7f1b
UH
746 * send the rest up to the session bus.
747 */
269971dd
BV
748 pre = devc->trigger_offset - devc->samp_received;
749 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 750 transfer->buffer, pre * 2);
269971dd 751 devc->samp_buffered += pre;
e749a8cb
BV
752
753 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 754 sr_dbg("Reached trigger point, %d samples buffered.",
d9251a2c 755 devc->samp_buffered);
e749a8cb
BV
756
757 /* Avoid the corner case where the chunk ended at
758 * exactly the trigger point. */
759 if (num_samples > pre)
69e19dd7 760 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
761 num_samples - pre);
762 }
763 } else {
764 /* Already past the trigger point, just send it all out. */
a95f142e 765 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
766 }
767
269971dd 768 devc->samp_received += num_samples;
e749a8cb
BV
769
770 /* Everything in this transfer was either copied to the buffer or
771 * sent to the session bus. */
3b533202
BV
772 g_free(transfer->buffer);
773 libusb_free_transfer(transfer);
3b533202 774
269971dd 775 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
776 /* That was the last chunk in this frame. Send the buffered
777 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 778 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
d9251a2c 779 devc->samp_buffered);
69e19dd7 780 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
16a1dca4
PM
781 g_free(devc->framebuf);
782 devc->framebuf = NULL;
e749a8cb
BV
783
784 /* Mark the end of this frame. */
4c5f7006 785 std_session_send_df_frame_end(sdi);
ae88b97b 786
8f484ca7 787 if (devc->limit_frames && ++devc->num_frames >= devc->limit_frames) {
ae88b97b 788 /* Terminate session */
a3508e33 789 devc->dev_state = STOPPING;
ae88b97b 790 } else {
269971dd 791 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
792 }
793 }
3b533202
BV
794}
795
796static int handle_event(int fd, int revents, void *cb_data)
797{
a3508e33 798 const struct sr_dev_inst *sdi;
3b533202 799 struct timeval tv;
4f840ce9 800 struct sr_dev_driver *di;
269971dd 801 struct dev_context *devc;
4f840ce9 802 struct drv_context *drvc;
ba7dd8bb 803 int num_channels;
6e6eeff4
BV
804 uint32_t trigger_offset;
805 uint8_t capturestate;
3b533202 806
3b533202
BV
807 (void)fd;
808 (void)revents;
809
269971dd 810 sdi = cb_data;
4f840ce9 811 di = sdi->driver;
41812aca 812 drvc = di->context;
269971dd 813 devc = sdi->priv;
a3508e33
BV
814 if (devc->dev_state == STOPPING) {
815 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
816 sr_dbg("Stopping acquisition.");
817 /*
818 * TODO: Doesn't really cancel pending transfers so they might
819 * come in after SR_DF_END is sent.
820 */
102f1239 821 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 822
bee2b016 823 std_session_send_df_end(sdi);
a3508e33
BV
824
825 devc->dev_state = IDLE;
826
827 return TRUE;
828 }
829
3b533202
BV
830 /* Always handle pending libusb events. */
831 tv.tv_sec = tv.tv_usec = 0;
d4abb463 832 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 833
3b533202 834 /* TODO: ugh */
269971dd 835 if (devc->dev_state == NEW_CAPTURE) {
c118080b 836 if (dso_capture_start(sdi) != SR_OK)
3b533202 837 return TRUE;
c118080b 838 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 839 return TRUE;
c118080b 840// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 841// return TRUE;
e98b7f1b 842 sr_dbg("Successfully requested next chunk.");
269971dd 843 devc->dev_state = CAPTURE;
3b533202
BV
844 return TRUE;
845 }
269971dd 846 if (devc->dev_state != CAPTURE)
3b533202
BV
847 return TRUE;
848
c118080b 849 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 850 return TRUE;
3b533202 851
e98b7f1b
UH
852 sr_dbg("Capturestate %d.", capturestate);
853 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
854 switch (capturestate) {
855 case CAPTURE_EMPTY:
269971dd
BV
856 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
857 devc->capture_empty_count = 0;
c118080b 858 if (dso_capture_start(sdi) != SR_OK)
3b533202 859 break;
c118080b 860 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 861 break;
c118080b 862// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 863// break;
e98b7f1b 864 sr_dbg("Successfully requested next chunk.");
3b533202
BV
865 }
866 break;
867 case CAPTURE_FILLING:
e98b7f1b 868 /* No data yet. */
3b533202
BV
869 break;
870 case CAPTURE_READY_8BIT:
ab8df2b1 871 case CAPTURE_READY_2250:
e749a8cb 872 /* Remember where in the captured frame the trigger is. */
269971dd 873 devc->trigger_offset = trigger_offset;
e749a8cb 874
417412c8 875 num_channels = (devc->ch_enabled[0] && devc->ch_enabled[1]) ? 2 : 1;
a95f142e 876 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 877 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 878
3b533202 879 /* Tell the scope to send us the first frame. */
69e19dd7 880 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 881 break;
ae88b97b 882
e98b7f1b
UH
883 /*
884 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
885 * the data we just told the scope to send.
886 */
269971dd 887 devc->dev_state = FETCH_DATA;
ae88b97b
BV
888
889 /* Tell the frontend a new frame is on the way. */
4c5f7006 890 std_session_send_df_frame_begin(sdi);
3b533202
BV
891 break;
892 case CAPTURE_READY_9BIT:
893 /* TODO */
e98b7f1b 894 sr_err("Not yet supported.");
3b533202
BV
895 break;
896 case CAPTURE_TIMEOUT:
897 /* Doesn't matter, we'll try again next time. */
898 break;
899 default:
e98b7f1b
UH
900 sr_dbg("Unknown capture state: %d.", capturestate);
901 break;
3b533202
BV
902 }
903
904 return TRUE;
905}
906
695dc859 907static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 908{
269971dd 909 struct dev_context *devc;
4f840ce9 910 struct sr_dev_driver *di = sdi->driver;
41812aca 911 struct drv_context *drvc = di->context;
3b533202 912
269971dd 913 devc = sdi->priv;
3b533202 914
ba7dd8bb
UH
915 if (configure_channels(sdi) != SR_OK) {
916 sr_err("Failed to configure channels.");
014359e3
BV
917 return SR_ERR;
918 }
919
c118080b 920 if (dso_init(sdi) != SR_OK)
3b533202
BV
921 return SR_ERR;
922
c118080b 923 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
924 return SR_ERR;
925
269971dd 926 devc->dev_state = CAPTURE;
102f1239 927 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 928
bee2b016 929 std_session_send_df_header(sdi);
3b533202 930
3b533202
BV
931 return SR_OK;
932}
933
695dc859 934static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 935{
269971dd
BV
936 struct dev_context *devc;
937
a3508e33
BV
938 devc = sdi->priv;
939 devc->dev_state = STOPPING;
8f484ca7 940 devc->num_frames = 0;
3b533202
BV
941
942 return SR_OK;
943}
944
dd5c48a6 945static struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
946 .name = "hantek-dso",
947 .longname = "Hantek DSO",
948 .api_version = 1,
c2fdcc25 949 .init = std_init,
700d6b64 950 .cleanup = std_cleanup,
6078d2c9 951 .scan = scan,
c01bf34c 952 .dev_list = std_dev_list,
3b412e3a 953 .dev_clear = dev_clear,
79917848 954 .config_get = config_get,
035a1078 955 .config_set = config_set,
a1c743fc 956 .config_list = config_list,
6078d2c9
UH
957 .dev_open = dev_open,
958 .dev_close = dev_close,
959 .dev_acquisition_start = dev_acquisition_start,
960 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 961 .context = NULL,
3b533202 962};
dd5c48a6 963SR_REGISTER_DEV_DRIVER(hantek_dso_driver_info);