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input/vcd: deprecate struct sr_rational
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
f627afd6 40static const int32_t devopts[] = {
1953564a 41 SR_CONF_OSCILLOSCOPE,
be6db330 42 SR_CONF_LIMIT_FRAMES,
1953564a
BV
43 SR_CONF_CONTINUOUS,
44 SR_CONF_TIMEBASE,
45 SR_CONF_BUFFERSIZE,
46 SR_CONF_TRIGGER_SOURCE,
47 SR_CONF_TRIGGER_SLOPE,
48 SR_CONF_HORIZ_TRIGGERPOS,
49 SR_CONF_FILTER,
50 SR_CONF_VDIV,
51 SR_CONF_COUPLING,
3b533202
BV
52};
53
54static const char *probe_names[] = {
78693401 55 "CH1", "CH2",
3b533202
BV
56 NULL,
57};
58
62bb8840 59static const struct dso_profile dev_profiles[] = {
88a13f30 60 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 61 "Hantek", "DSO-2090",
7b78b2f7 62 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
63 { 0x04b4, 0x2150, 0x04b5, 0x2150,
64 "Hantek", "DSO-2150",
7b78b2f7 65 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
66 { 0x04b4, 0x2250, 0x04b5, 0x2250,
67 "Hantek", "DSO-2250",
7b78b2f7 68 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
69 { 0x04b4, 0x5200, 0x04b5, 0x5200,
70 "Hantek", "DSO-5200",
7b78b2f7 71 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
72 { 0x04b4, 0x520a, 0x04b5, 0x520a,
73 "Hantek", "DSO-5200A",
7b78b2f7 74 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
88a13f30 75 { 0, 0, 0, 0, 0, 0, 0 },
3b533202
BV
76};
77
62bb8840 78static const uint64_t buffersizes[] = {
a370ef19
BV
79 10240,
80 32768,
81 /* TODO: 65535 */
a370ef19
BV
82};
83
f627afd6 84static const int32_t timebases[][2] = {
a370ef19
BV
85 /* microseconds */
86 { 10, 1000000 },
87 { 20, 1000000 },
88 { 40, 1000000 },
89 { 100, 1000000 },
90 { 200, 1000000 },
91 { 400, 1000000 },
92 /* milliseconds */
93 { 1, 1000 },
94 { 2, 1000 },
95 { 4, 1000 },
96 { 10, 1000 },
97 { 20, 1000 },
98 { 40, 1000 },
99 { 100, 1000 },
100 { 200, 1000 },
101 { 400, 1000 },
a370ef19
BV
102};
103
f627afd6 104static const int32_t vdivs[][2] = {
313deed2
BV
105 /* millivolts */
106 { 10, 1000 },
107 { 20, 1000 },
108 { 50, 1000 },
109 { 100, 1000 },
110 { 200, 1000 },
111 { 500, 1000 },
112 /* volts */
113 { 1, 1 },
114 { 2, 1 },
115 { 5, 1 },
313deed2
BV
116};
117
62bb8840 118static const char *trigger_sources[] = {
a370ef19
BV
119 "CH1",
120 "CH2",
121 "EXT",
88a13f30 122 /* TODO: forced */
a370ef19 123};
3b533202 124
62bb8840 125static const char *filter_targets[] = {
ebb781a6
BV
126 "CH1",
127 "CH2",
128 /* TODO: "TRIGGER", */
ebb781a6
BV
129};
130
62bb8840 131static const char *coupling[] = {
b58fbd99
BV
132 "AC",
133 "DC",
134 "GND",
b58fbd99
BV
135};
136
982947f7 137SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 138static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 139
69b07d14 140static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 141
62bb8840 142static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
143{
144 struct sr_dev_inst *sdi;
87ca93c5 145 struct sr_probe *probe;
269971dd
BV
146 struct drv_context *drvc;
147 struct dev_context *devc;
87ca93c5 148 int i;
3b533202
BV
149
150 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 151 prof->vendor, prof->model, NULL);
3b533202
BV
152 if (!sdi)
153 return NULL;
a873c594 154 sdi->driver = di;
3b533202 155
e98b7f1b
UH
156 /*
157 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
158 * a trigger source internal to the device.
159 */
160 for (i = 0; probe_names[i]; i++) {
161 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
162 probe_names[i])))
163 return NULL;
164 sdi->probes = g_slist_append(sdi->probes, probe);
165 }
166
269971dd 167 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 168 sr_err("Device context malloc failed.");
3b533202
BV
169 return NULL;
170 }
e98b7f1b 171
269971dd
BV
172 devc->profile = prof;
173 devc->dev_state = IDLE;
174 devc->timebase = DEFAULT_TIMEBASE;
175 devc->ch1_enabled = TRUE;
176 devc->ch2_enabled = TRUE;
177 devc->voltage_ch1 = DEFAULT_VOLTAGE;
178 devc->voltage_ch2 = DEFAULT_VOLTAGE;
179 devc->coupling_ch1 = DEFAULT_COUPLING;
180 devc->coupling_ch2 = DEFAULT_COUPLING;
181 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
182 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
183 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
184 devc->framesize = DEFAULT_FRAMESIZE;
185 devc->triggerslope = SLOPE_POSITIVE;
186 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
187 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
188 sdi->priv = devc;
a873c594 189 drvc = di->priv;
269971dd 190 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
191
192 return sdi;
193}
194
014359e3 195static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 196{
014359e3 197 struct dev_context *devc;
69e19dd7 198 struct sr_probe *probe;
62bb8840 199 const GSList *l;
69e19dd7 200 int p;
3b533202 201
014359e3
BV
202 devc = sdi->priv;
203
69e19dd7 204 g_slist_free(devc->enabled_probes);
269971dd 205 devc->ch1_enabled = devc->ch2_enabled = FALSE;
69e19dd7
BV
206 for (l = sdi->probes, p = 0; l; l = l->next, p++) {
207 probe = l->data;
208 if (p == 0)
269971dd 209 devc->ch1_enabled = probe->enabled;
69e19dd7 210 else
269971dd 211 devc->ch2_enabled = probe->enabled;
69e19dd7
BV
212 if (probe->enabled)
213 devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
3b533202
BV
214 }
215
216 return SR_OK;
217}
218
39cfdd75 219/* Properly close and free all devices. */
811deee4 220static int clear_instances(void)
39cfdd75
BV
221{
222 struct sr_dev_inst *sdi;
269971dd
BV
223 struct drv_context *drvc;
224 struct dev_context *devc;
39cfdd75
BV
225 GSList *l;
226
a873c594 227 drvc = di->priv;
269971dd 228 for (l = drvc->instances; l; l = l->next) {
39cfdd75
BV
229 if (!(sdi = l->data)) {
230 /* Log error, but continue cleaning up the rest. */
e98b7f1b 231 sr_err("%s: sdi was NULL, continuing", __func__);
39cfdd75
BV
232 continue;
233 }
269971dd 234 if (!(devc = sdi->priv)) {
39cfdd75 235 /* Log error, but continue cleaning up the rest. */
e98b7f1b 236 sr_err("%s: sdi->priv was NULL, continuing", __func__);
39cfdd75
BV
237 continue;
238 }
239 dso_close(sdi);
269971dd
BV
240 sr_usb_dev_inst_free(devc->usb);
241 g_free(devc->triggersource);
69e19dd7 242 g_slist_free(devc->enabled_probes);
39cfdd75
BV
243
244 sr_dev_inst_free(sdi);
245 }
246
269971dd
BV
247 g_slist_free(drvc->instances);
248 drvc->instances = NULL;
39cfdd75 249
811deee4 250 return SR_OK;
39cfdd75
BV
251}
252
34f06b90 253static int hw_init(struct sr_context *sr_ctx)
61136ea6 254{
063e7aef 255 return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
61136ea6
BV
256}
257
39cfdd75 258static GSList *hw_scan(GSList *options)
3b533202
BV
259{
260 struct sr_dev_inst *sdi;
62bb8840 261 const struct dso_profile *prof;
269971dd
BV
262 struct drv_context *drvc;
263 struct dev_context *devc;
39cfdd75
BV
264 GSList *devices;
265 struct libusb_device_descriptor des;
3b533202 266 libusb_device **devlist;
61136ea6 267 int devcnt, ret, i, j;
3b533202 268
39cfdd75 269 (void)options;
e98b7f1b 270
a873c594 271 drvc = di->priv;
269971dd 272 drvc->instances = NULL;
39cfdd75 273
4b97c74e
UH
274 devcnt = 0;
275 devices = 0;
276
39cfdd75
BV
277 clear_instances();
278
279 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 280 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 281 for (i = 0; devlist[i]; i++) {
61136ea6 282 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71
PS
283 sr_err("Failed to get device descriptor: %s.",
284 libusb_error_name(ret));
3b533202
BV
285 continue;
286 }
287
288 prof = NULL;
289 for (j = 0; dev_profiles[j].orig_vid; j++) {
290 if (des.idVendor == dev_profiles[j].orig_vid
291 && des.idProduct == dev_profiles[j].orig_pid) {
292 /* Device matches the pre-firmware profile. */
293 prof = &dev_profiles[j];
e98b7f1b 294 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 295 sdi = dso_dev_new(devcnt, prof);
39cfdd75 296 devices = g_slist_append(devices, sdi);
269971dd 297 devc = sdi->priv;
3b533202
BV
298 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
299 prof->firmware) == SR_OK)
300 /* Remember when the firmware on this device was updated */
269971dd 301 devc->fw_updated = g_get_monotonic_time();
3b533202 302 else
e98b7f1b
UH
303 sr_err("Firmware upload failed for "
304 "device %d.", devcnt);
3b533202 305 /* Dummy USB address of 0xff will get overwritten later. */
269971dd 306 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
307 libusb_get_bus_number(devlist[i]), 0xff, NULL);
308 devcnt++;
309 break;
310 } else if (des.idVendor == dev_profiles[j].fw_vid
311 && des.idProduct == dev_profiles[j].fw_pid) {
312 /* Device matches the post-firmware profile. */
313 prof = &dev_profiles[j];
e98b7f1b 314 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
315 sdi = dso_dev_new(devcnt, prof);
316 sdi->status = SR_ST_INACTIVE;
39cfdd75 317 devices = g_slist_append(devices, sdi);
269971dd
BV
318 devc = sdi->priv;
319 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
320 libusb_get_bus_number(devlist[i]),
321 libusb_get_device_address(devlist[i]), NULL);
322 devcnt++;
323 break;
324 }
325 }
326 if (!prof)
327 /* not a supported VID/PID */
328 continue;
329 }
330 libusb_free_device_list(devlist, 1);
331
39cfdd75 332 return devices;
3b533202
BV
333}
334
811deee4
BV
335static GSList *hw_dev_list(void)
336{
0e94d524 337 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
338}
339
25a0f108 340static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 341{
269971dd 342 struct dev_context *devc;
fc8fe3e3
BV
343 int64_t timediff_us, timediff_ms;
344 int err;
3b533202 345
269971dd 346 devc = sdi->priv;
3b533202
BV
347
348 /*
e98b7f1b
UH
349 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
350 * for the FX2 to renumerate.
3b533202 351 */
fc8fe3e3 352 err = SR_ERR;
269971dd 353 if (devc->fw_updated > 0) {
e98b7f1b
UH
354 sr_info("Waiting for device to reset.");
355 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 356 g_usleep(300 * 1000);
fc8fe3e3
BV
357 timediff_ms = 0;
358 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 359 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
360 break;
361 g_usleep(100 * 1000);
269971dd 362 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 363 timediff_ms = timediff_us / 1000;
e98b7f1b 364 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 365 }
e98b7f1b 366 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 367 } else {
25a0f108 368 err = dso_open(sdi);
3b533202
BV
369 }
370
371 if (err != SR_OK) {
e98b7f1b 372 sr_err("Unable to open device.");
3b533202
BV
373 return SR_ERR;
374 }
375
269971dd 376 err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE);
3b533202 377 if (err != 0) {
d4928d71
PS
378 sr_err("Unable to claim interface: %s.",
379 libusb_error_name(err));
3b533202
BV
380 return SR_ERR;
381 }
382
383 return SR_OK;
384}
385
25a0f108 386static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 387{
3b533202
BV
388 dso_close(sdi);
389
390 return SR_OK;
391}
392
393static int hw_cleanup(void)
394{
269971dd
BV
395 struct drv_context *drvc;
396
a873c594 397 if (!(drvc = di->priv))
269971dd 398 return SR_OK;
3b533202 399
39cfdd75 400 clear_instances();
3b533202 401
3b533202
BV
402 return SR_OK;
403}
404
f627afd6 405static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
3b533202 406{
269971dd 407 struct dev_context *devc;
f627afd6 408 double tmp_double;
a370ef19 409 uint64_t tmp_u64;
f627afd6
BV
410 int32_t p, q;
411 int tmp_int, ret;
412 unsigned int i;
413 const char *tmp_str;
4a090d72 414 char **targets;
3b533202 415
3b533202
BV
416 if (sdi->status != SR_ST_ACTIVE)
417 return SR_ERR;
418
a370ef19 419 ret = SR_OK;
269971dd 420 devc = sdi->priv;
035a1078 421 switch (id) {
1953564a 422 case SR_CONF_LIMIT_FRAMES:
f627afd6 423 devc->limit_frames = g_variant_get_uint64(data);
ae88b97b 424 break;
1953564a 425 case SR_CONF_TRIGGER_SLOPE:
f627afd6 426 tmp_u64 = g_variant_get_uint64(data);
a370ef19
BV
427 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
428 ret = SR_ERR_ARG;
269971dd 429 devc->triggerslope = tmp_u64;
a370ef19 430 break;
1953564a 431 case SR_CONF_HORIZ_TRIGGERPOS:
f627afd6
BV
432 tmp_double = g_variant_get_double(data);
433 if (tmp_double < 0.0 || tmp_double > 1.0) {
e98b7f1b 434 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 435 ret = SR_ERR_ARG;
a370ef19 436 } else
f627afd6 437 devc->triggerposition = tmp_double;
a370ef19 438 break;
1953564a 439 case SR_CONF_BUFFERSIZE:
f627afd6 440 tmp_u64 = g_variant_get_uint64(data);
a370ef19
BV
441 for (i = 0; buffersizes[i]; i++) {
442 if (buffersizes[i] == tmp_u64) {
269971dd 443 devc->framesize = tmp_u64;
a370ef19
BV
444 break;
445 }
446 }
447 if (buffersizes[i] == 0)
448 ret = SR_ERR_ARG;
449 break;
1953564a 450 case SR_CONF_TIMEBASE:
f627afd6
BV
451 g_variant_get(data, "(ii)", &p, &q);
452 tmp_int = -1;
453 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
454 if (timebases[i][0] == p && timebases[i][1] == q) {
455 tmp_int = i;
a370ef19
BV
456 break;
457 }
458 }
f627afd6
BV
459 if (tmp_int >= 0)
460 devc->timebase = tmp_int;
461 else
a370ef19
BV
462 ret = SR_ERR_ARG;
463 break;
1953564a 464 case SR_CONF_TRIGGER_SOURCE:
f627afd6 465 tmp_str = g_variant_get_string(data, NULL);
a370ef19 466 for (i = 0; trigger_sources[i]; i++) {
f627afd6
BV
467 if (!strcmp(tmp_str, trigger_sources[i])) {
468 devc->triggersource = g_strdup(tmp_str);
a370ef19
BV
469 break;
470 }
471 }
472 if (trigger_sources[i] == 0)
473 ret = SR_ERR_ARG;
474 break;
1953564a 475 case SR_CONF_FILTER:
f627afd6 476 tmp_str = g_variant_get_string(data, NULL);
269971dd 477 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
f627afd6 478 targets = g_strsplit(tmp_str, ",", 0);
ebb781a6
BV
479 for (i = 0; targets[i]; i++) {
480 if (targets[i] == '\0')
481 /* Empty filter string can be used to clear them all. */
482 ;
483 else if (!strcmp(targets[i], "CH1"))
269971dd 484 devc->filter_ch1 = TRUE;
ebb781a6 485 else if (!strcmp(targets[i], "CH2"))
269971dd 486 devc->filter_ch2 = TRUE;
ebb781a6 487 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 488 devc->filter_trigger = TRUE;
ebb781a6 489 else {
e98b7f1b 490 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
491 ret = SR_ERR_ARG;
492 }
493 }
494 g_strfreev(targets);
495 break;
1953564a 496 case SR_CONF_VDIV:
e98b7f1b 497 /* TODO: Not supporting vdiv per channel yet. */
f627afd6
BV
498 g_variant_get(data, "(ii)", &p, &q);
499 tmp_int = -1;
500 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
501 if (vdivs[i][0] == p && vdivs[i][1] == q) {
502 tmp_int = i;
313deed2
BV
503 break;
504 }
505 }
f627afd6
BV
506 if (tmp_int >= 0) {
507 devc->voltage_ch1 = tmp_int;
508 devc->voltage_ch2 = tmp_int;
509 } else
313deed2
BV
510 ret = SR_ERR_ARG;
511 break;
1953564a 512 case SR_CONF_COUPLING:
f627afd6 513 tmp_str = g_variant_get_string(data, NULL);
e98b7f1b 514 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 515 for (i = 0; coupling[i]; i++) {
f627afd6 516 if (!strcmp(tmp_str, coupling[i])) {
269971dd
BV
517 devc->coupling_ch1 = i;
518 devc->coupling_ch2 = i;
b58fbd99
BV
519 break;
520 }
521 }
522 if (coupling[i] == 0)
523 ret = SR_ERR_ARG;
524 break;
3b533202
BV
525 default:
526 ret = SR_ERR_ARG;
e98b7f1b 527 break;
3b533202
BV
528 }
529
530 return ret;
531}
532
f627afd6 533static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
a1c743fc
BV
534{
535
536 (void)sdi;
537
538 switch (key) {
9a6517d1 539 case SR_CONF_DEVICE_OPTIONS:
f627afd6
BV
540 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
541 devopts, ARRAY_SIZE(devopts), sizeof(int32_t));
9a6517d1 542 break;
6d1ceffa 543 case SR_CONF_BUFFERSIZE:
f627afd6
BV
544 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
545 buffersizes, ARRAY_SIZE(buffersizes), sizeof(uint64_t));
6d1ceffa 546 break;
2a7b113d 547 case SR_CONF_COUPLING:
f627afd6 548 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
2a7b113d 549 break;
e4f2b2ad 550 case SR_CONF_VDIV:
f627afd6
BV
551 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
552 vdivs, ARRAY_SIZE(vdivs) * 2, sizeof(int32_t));
e4f2b2ad 553 break;
6e1fbcc4 554 case SR_CONF_FILTER:
f627afd6
BV
555 *data = g_variant_new_strv(filter_targets,
556 ARRAY_SIZE(filter_targets));
6e1fbcc4 557 break;
41f5bd09 558 case SR_CONF_TIMEBASE:
f627afd6
BV
559 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
560 timebases, ARRAY_SIZE(timebases) * 2, sizeof(int32_t));
41f5bd09 561 break;
328bafab 562 case SR_CONF_TRIGGER_SOURCE:
f627afd6
BV
563 *data = g_variant_new_strv(trigger_sources,
564 ARRAY_SIZE(trigger_sources));
328bafab 565 break;
a1c743fc
BV
566 default:
567 return SR_ERR_ARG;
568 }
569
570 return SR_OK;
571}
572
69e19dd7 573static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 574 int num_samples)
3b533202
BV
575{
576 struct sr_datafeed_packet packet;
577 struct sr_datafeed_analog analog;
69e19dd7 578 struct dev_context *devc;
c5841b28 579 float ch1, ch2, range;
6e71ef3b 580 int num_probes, data_offset, i;
3b533202 581
69e19dd7 582 devc = sdi->priv;
269971dd 583 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
584 packet.type = SR_DF_ANALOG;
585 packet.payload = &analog;
6e71ef3b 586 /* TODO: support for 5xxx series 9-bit samples */
69e19dd7 587 analog.probes = devc->enabled_probes;
e749a8cb 588 analog.num_samples = num_samples;
9956f285
UH
589 analog.mq = SR_MQ_VOLTAGE;
590 analog.unit = SR_UNIT_VOLT;
886a52b6 591 /* TODO: Check malloc return value. */
6e71ef3b
BV
592 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
593 data_offset = 0;
3b533202 594 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
595 /*
596 * The device always sends data for both channels. If a channel
6e71ef3b 597 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
598 * data. However, we only send the requested channels to
599 * the bus.
c5841b28 600 *
e98b7f1b
UH
601 * Voltage values are encoded as a value 0-255 (0-512 on the
602 * DSO-5200*), where the value is a point in the range
603 * represented by the vdiv setting. There are 8 vertical divs,
604 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
605 * and 255 = +2V.
6e71ef3b 606 */
e98b7f1b 607 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 608 if (devc->ch1_enabled) {
f627afd6 609 range = ((float)vdivs[devc->voltage_ch1][0] / vdivs[devc->voltage_ch1][1]) * 8;
e749a8cb 610 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
611 /* Value is centered around 0V. */
612 ch1 -= range / 2;
6e71ef3b
BV
613 analog.data[data_offset++] = ch1;
614 }
269971dd 615 if (devc->ch2_enabled) {
f627afd6 616 range = ((float)vdivs[devc->voltage_ch2][0] / vdivs[devc->voltage_ch2][1]) * 8;
e749a8cb 617 ch2 = range / 255 * *(buf + i * 2);
c5841b28 618 ch2 -= range / 2;
6e71ef3b
BV
619 analog.data[data_offset++] = ch2;
620 }
3b533202 621 }
269971dd 622 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
623}
624
e98b7f1b
UH
625/*
626 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 627 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 628 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
629 * the libsigrok session bus.
630 */
631static void receive_transfer(struct libusb_transfer *transfer)
632{
633 struct sr_datafeed_packet packet;
69e19dd7 634 struct sr_dev_inst *sdi;
269971dd 635 struct dev_context *devc;
e749a8cb
BV
636 int num_samples, pre;
637
69e19dd7
BV
638 sdi = transfer->user_data;
639 devc = sdi->priv;
e98b7f1b
UH
640 sr_dbg("receive_transfer(): status %d received %d bytes.",
641 transfer->status, transfer->actual_length);
e749a8cb
BV
642
643 if (transfer->actual_length == 0)
644 /* Nothing to send to the bus. */
645 return;
646
647 num_samples = transfer->actual_length / 2;
648
e98b7f1b
UH
649 sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
650 devc->samp_received + num_samples, devc->framesize);
e749a8cb 651
e98b7f1b
UH
652 /*
653 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
654 * doesn't represent the trigger point. The offset at which the trigger
655 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
656 * from there up the session bus. The samples in the frame buffer
657 * before that trigger point came after the end of the device's frame
658 * buffer was reached, and it wrapped around to overwrite up until the
659 * trigger point.
e749a8cb 660 */
269971dd 661 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 662 /* Trigger point not yet reached. */
269971dd 663 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 664 /* The entire chunk is before the trigger point. */
269971dd 665 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 666 transfer->buffer, num_samples * 2);
269971dd 667 devc->samp_buffered += num_samples;
e749a8cb 668 } else {
e98b7f1b
UH
669 /*
670 * This chunk hits or overruns the trigger point.
e749a8cb 671 * Store the part before the trigger fired, and
e98b7f1b
UH
672 * send the rest up to the session bus.
673 */
269971dd
BV
674 pre = devc->trigger_offset - devc->samp_received;
675 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 676 transfer->buffer, pre * 2);
269971dd 677 devc->samp_buffered += pre;
e749a8cb
BV
678
679 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
680 sr_dbg("Reached trigger point, %d samples buffered.",
681 devc->samp_buffered);
e749a8cb
BV
682
683 /* Avoid the corner case where the chunk ended at
684 * exactly the trigger point. */
685 if (num_samples > pre)
69e19dd7 686 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
687 num_samples - pre);
688 }
689 } else {
690 /* Already past the trigger point, just send it all out. */
69e19dd7 691 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
692 num_samples);
693 }
694
269971dd 695 devc->samp_received += num_samples;
e749a8cb
BV
696
697 /* Everything in this transfer was either copied to the buffer or
698 * sent to the session bus. */
3b533202
BV
699 g_free(transfer->buffer);
700 libusb_free_transfer(transfer);
3b533202 701
269971dd 702 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
703 /* That was the last chunk in this frame. Send the buffered
704 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
705 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
706 devc->samp_buffered);
69e19dd7 707 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
708
709 /* Mark the end of this frame. */
ae88b97b 710 packet.type = SR_DF_FRAME_END;
269971dd 711 sr_session_send(devc->cb_data, &packet);
ae88b97b 712
269971dd 713 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 714 /* Terminate session */
a3508e33 715 devc->dev_state = STOPPING;
ae88b97b 716 } else {
269971dd 717 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
718 }
719 }
3b533202
BV
720}
721
722static int handle_event(int fd, int revents, void *cb_data)
723{
a3508e33 724 const struct sr_dev_inst *sdi;
ae88b97b 725 struct sr_datafeed_packet packet;
3b533202 726 struct timeval tv;
269971dd 727 struct dev_context *devc;
a873c594 728 struct drv_context *drvc = di->priv;
a3508e33
BV
729 const struct libusb_pollfd **lupfd;
730 int num_probes, i;
6e6eeff4
BV
731 uint32_t trigger_offset;
732 uint8_t capturestate;
3b533202 733
3b533202
BV
734 (void)fd;
735 (void)revents;
736
269971dd
BV
737 sdi = cb_data;
738 devc = sdi->priv;
a3508e33
BV
739 if (devc->dev_state == STOPPING) {
740 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
741 sr_dbg("Stopping acquisition.");
742 /*
743 * TODO: Doesn't really cancel pending transfers so they might
744 * come in after SR_DF_END is sent.
745 */
d4abb463 746 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
747 for (i = 0; lupfd[i]; i++)
748 sr_source_remove(lupfd[i]->fd);
749 free(lupfd);
750
751 packet.type = SR_DF_END;
752 sr_session_send(sdi, &packet);
753
754 devc->dev_state = IDLE;
755
756 return TRUE;
757 }
758
3b533202
BV
759 /* Always handle pending libusb events. */
760 tv.tv_sec = tv.tv_usec = 0;
d4abb463 761 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 762
3b533202 763 /* TODO: ugh */
269971dd
BV
764 if (devc->dev_state == NEW_CAPTURE) {
765 if (dso_capture_start(devc) != SR_OK)
3b533202 766 return TRUE;
269971dd 767 if (dso_enable_trigger(devc) != SR_OK)
3b533202 768 return TRUE;
269971dd 769// if (dso_force_trigger(devc) != SR_OK)
a370ef19 770// return TRUE;
e98b7f1b 771 sr_dbg("Successfully requested next chunk.");
269971dd 772 devc->dev_state = CAPTURE;
3b533202
BV
773 return TRUE;
774 }
269971dd 775 if (devc->dev_state != CAPTURE)
3b533202
BV
776 return TRUE;
777
269971dd 778 if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK)
3b533202 779 return TRUE;
3b533202 780
e98b7f1b
UH
781 sr_dbg("Capturestate %d.", capturestate);
782 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
783 switch (capturestate) {
784 case CAPTURE_EMPTY:
269971dd
BV
785 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
786 devc->capture_empty_count = 0;
787 if (dso_capture_start(devc) != SR_OK)
3b533202 788 break;
269971dd 789 if (dso_enable_trigger(devc) != SR_OK)
3b533202 790 break;
269971dd 791// if (dso_force_trigger(devc) != SR_OK)
a370ef19 792// break;
e98b7f1b 793 sr_dbg("Successfully requested next chunk.");
3b533202
BV
794 }
795 break;
796 case CAPTURE_FILLING:
e98b7f1b 797 /* No data yet. */
3b533202
BV
798 break;
799 case CAPTURE_READY_8BIT:
e749a8cb 800 /* Remember where in the captured frame the trigger is. */
269971dd 801 devc->trigger_offset = trigger_offset;
e749a8cb 802
269971dd 803 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 804 /* TODO: Check malloc return value. */
269971dd
BV
805 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
806 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 807
3b533202 808 /* Tell the scope to send us the first frame. */
69e19dd7 809 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 810 break;
ae88b97b 811
e98b7f1b
UH
812 /*
813 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
814 * the data we just told the scope to send.
815 */
269971dd 816 devc->dev_state = FETCH_DATA;
ae88b97b
BV
817
818 /* Tell the frontend a new frame is on the way. */
819 packet.type = SR_DF_FRAME_BEGIN;
269971dd 820 sr_session_send(sdi, &packet);
3b533202
BV
821 break;
822 case CAPTURE_READY_9BIT:
823 /* TODO */
e98b7f1b 824 sr_err("Not yet supported.");
3b533202
BV
825 break;
826 case CAPTURE_TIMEOUT:
827 /* Doesn't matter, we'll try again next time. */
828 break;
829 default:
e98b7f1b
UH
830 sr_dbg("Unknown capture state: %d.", capturestate);
831 break;
3b533202
BV
832 }
833
834 return TRUE;
835}
836
3ffb6964 837static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 838 void *cb_data)
3b533202
BV
839{
840 const struct libusb_pollfd **lupfd;
269971dd 841 struct dev_context *devc;
a873c594 842 struct drv_context *drvc = di->priv;
3b533202
BV
843 int i;
844
3b533202
BV
845 if (sdi->status != SR_ST_ACTIVE)
846 return SR_ERR;
847
269971dd
BV
848 devc = sdi->priv;
849 devc->cb_data = cb_data;
3b533202 850
014359e3 851 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 852 sr_err("Failed to configure probes.");
014359e3
BV
853 return SR_ERR;
854 }
855
269971dd 856 if (dso_init(devc) != SR_OK)
3b533202
BV
857 return SR_ERR;
858
269971dd 859 if (dso_capture_start(devc) != SR_OK)
3b533202
BV
860 return SR_ERR;
861
269971dd 862 devc->dev_state = CAPTURE;
d4abb463 863 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 864 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
865 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
866 handle_event, (void *)sdi);
3b533202
BV
867 free(lupfd);
868
869 /* Send header packet to the session bus. */
4afdfd46 870 std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
3b533202 871
3b533202
BV
872 return SR_OK;
873}
874
69b07d14 875static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 876{
269971dd
BV
877 struct dev_context *devc;
878
879 (void)cb_data;
3b533202 880
3b533202
BV
881 if (sdi->status != SR_ST_ACTIVE)
882 return SR_ERR;
883
a3508e33
BV
884 devc = sdi->priv;
885 devc->dev_state = STOPPING;
3b533202
BV
886
887 return SR_OK;
888}
889
62bb8840 890SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
891 .name = "hantek-dso",
892 .longname = "Hantek DSO",
893 .api_version = 1,
894 .init = hw_init,
895 .cleanup = hw_cleanup,
61136ea6 896 .scan = hw_scan,
811deee4
BV
897 .dev_list = hw_dev_list,
898 .dev_clear = clear_instances,
6fab7b8f 899 .config_get = NULL,
035a1078 900 .config_set = config_set,
a1c743fc 901 .config_list = config_list,
3b533202
BV
902 .dev_open = hw_dev_open,
903 .dev_close = hw_dev_close,
62bb8840
UH
904 .dev_acquisition_start = hw_dev_acquisition_start,
905 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 906 .priv = NULL,
3b533202 907};