]> sigrok.org Git - libsigrok.git/blame - hardware/hantek-dso/api.c
fx2lafw: Support config_get(SR_CONF_CONN)
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
f627afd6 43static const int32_t devopts[] = {
1953564a 44 SR_CONF_OSCILLOSCOPE,
be6db330 45 SR_CONF_LIMIT_FRAMES,
1953564a
BV
46 SR_CONF_CONTINUOUS,
47 SR_CONF_TIMEBASE,
48 SR_CONF_BUFFERSIZE,
49 SR_CONF_TRIGGER_SOURCE,
50 SR_CONF_TRIGGER_SLOPE,
51 SR_CONF_HORIZ_TRIGGERPOS,
52 SR_CONF_FILTER,
53 SR_CONF_VDIV,
54 SR_CONF_COUPLING,
79917848
BV
55 SR_CONF_NUM_TIMEBASE,
56 SR_CONF_NUM_VDIV,
3b533202
BV
57};
58
59static const char *probe_names[] = {
78693401 60 "CH1", "CH2",
3b533202
BV
61 NULL,
62};
63
034accb5
BV
64static const uint64_t buffersizes_32k[] = {
65 10240, 32768,
66};
67static const uint64_t buffersizes_512k[] = {
68 10240, 524288,
69};
70static const uint64_t buffersizes_14k[] = {
71 10240, 14336,
72};
73
62bb8840 74static const struct dso_profile dev_profiles[] = {
88a13f30 75 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 76 "Hantek", "DSO-2090",
034accb5 77 buffersizes_32k,
7b78b2f7 78 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
79 { 0x04b4, 0x2150, 0x04b5, 0x2150,
80 "Hantek", "DSO-2150",
034accb5 81 buffersizes_32k,
7b78b2f7 82 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
83 { 0x04b4, 0x2250, 0x04b5, 0x2250,
84 "Hantek", "DSO-2250",
034accb5 85 buffersizes_512k,
7b78b2f7 86 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
87 { 0x04b4, 0x5200, 0x04b5, 0x5200,
88 "Hantek", "DSO-5200",
034accb5 89 buffersizes_14k,
7b78b2f7 90 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
91 { 0x04b4, 0x520a, 0x04b5, 0x520a,
92 "Hantek", "DSO-5200A",
034accb5 93 buffersizes_512k,
7b78b2f7 94 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 95 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
96};
97
86bb3f4a 98static const uint64_t timebases[][2] = {
a370ef19
BV
99 /* microseconds */
100 { 10, 1000000 },
101 { 20, 1000000 },
102 { 40, 1000000 },
103 { 100, 1000000 },
104 { 200, 1000000 },
105 { 400, 1000000 },
106 /* milliseconds */
107 { 1, 1000 },
108 { 2, 1000 },
109 { 4, 1000 },
110 { 10, 1000 },
111 { 20, 1000 },
112 { 40, 1000 },
113 { 100, 1000 },
114 { 200, 1000 },
115 { 400, 1000 },
a370ef19
BV
116};
117
86bb3f4a 118static const uint64_t vdivs[][2] = {
313deed2
BV
119 /* millivolts */
120 { 10, 1000 },
121 { 20, 1000 },
122 { 50, 1000 },
123 { 100, 1000 },
124 { 200, 1000 },
125 { 500, 1000 },
126 /* volts */
127 { 1, 1 },
128 { 2, 1 },
129 { 5, 1 },
313deed2
BV
130};
131
62bb8840 132static const char *trigger_sources[] = {
a370ef19
BV
133 "CH1",
134 "CH2",
135 "EXT",
88a13f30 136 /* TODO: forced */
a370ef19 137};
3b533202 138
62bb8840 139static const char *filter_targets[] = {
ebb781a6
BV
140 "CH1",
141 "CH2",
142 /* TODO: "TRIGGER", */
ebb781a6
BV
143};
144
62bb8840 145static const char *coupling[] = {
b58fbd99
BV
146 "AC",
147 "DC",
148 "GND",
b58fbd99
BV
149};
150
982947f7 151SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 152static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 153
69b07d14 154static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 155
62bb8840 156static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
157{
158 struct sr_dev_inst *sdi;
87ca93c5 159 struct sr_probe *probe;
269971dd
BV
160 struct drv_context *drvc;
161 struct dev_context *devc;
87ca93c5 162 int i;
3b533202
BV
163
164 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 165 prof->vendor, prof->model, NULL);
3b533202
BV
166 if (!sdi)
167 return NULL;
a873c594 168 sdi->driver = di;
3b533202 169
e98b7f1b
UH
170 /*
171 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
172 * a trigger source internal to the device.
173 */
174 for (i = 0; probe_names[i]; i++) {
175 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
176 probe_names[i])))
177 return NULL;
178 sdi->probes = g_slist_append(sdi->probes, probe);
179 }
180
269971dd 181 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 182 sr_err("Device context malloc failed.");
3b533202
BV
183 return NULL;
184 }
e98b7f1b 185
269971dd
BV
186 devc->profile = prof;
187 devc->dev_state = IDLE;
188 devc->timebase = DEFAULT_TIMEBASE;
189 devc->ch1_enabled = TRUE;
190 devc->ch2_enabled = TRUE;
191 devc->voltage_ch1 = DEFAULT_VOLTAGE;
192 devc->voltage_ch2 = DEFAULT_VOLTAGE;
193 devc->coupling_ch1 = DEFAULT_COUPLING;
194 devc->coupling_ch2 = DEFAULT_COUPLING;
195 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
196 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
197 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
198 devc->framesize = DEFAULT_FRAMESIZE;
199 devc->triggerslope = SLOPE_POSITIVE;
200 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
201 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
202 sdi->priv = devc;
a873c594 203 drvc = di->priv;
269971dd 204 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
205
206 return sdi;
207}
208
014359e3 209static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 210{
014359e3 211 struct dev_context *devc;
69e19dd7 212 struct sr_probe *probe;
62bb8840 213 const GSList *l;
69e19dd7 214 int p;
3b533202 215
014359e3
BV
216 devc = sdi->priv;
217
69e19dd7 218 g_slist_free(devc->enabled_probes);
269971dd 219 devc->ch1_enabled = devc->ch2_enabled = FALSE;
69e19dd7
BV
220 for (l = sdi->probes, p = 0; l; l = l->next, p++) {
221 probe = l->data;
222 if (p == 0)
269971dd 223 devc->ch1_enabled = probe->enabled;
69e19dd7 224 else
269971dd 225 devc->ch2_enabled = probe->enabled;
69e19dd7
BV
226 if (probe->enabled)
227 devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
3b533202
BV
228 }
229
230 return SR_OK;
231}
232
949b3dc0 233static void clear_dev_context(void *priv)
39cfdd75 234{
269971dd 235 struct dev_context *devc;
39cfdd75 236
949b3dc0
BV
237 devc = priv;
238 g_free(devc->triggersource);
239 g_slist_free(devc->enabled_probes);
39cfdd75 240
949b3dc0 241}
39cfdd75 242
949b3dc0
BV
243static int clear_instances(void)
244{
245 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
246}
247
34f06b90 248static int hw_init(struct sr_context *sr_ctx)
61136ea6 249{
063e7aef 250 return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
61136ea6
BV
251}
252
39cfdd75 253static GSList *hw_scan(GSList *options)
3b533202
BV
254{
255 struct sr_dev_inst *sdi;
62bb8840 256 const struct dso_profile *prof;
269971dd
BV
257 struct drv_context *drvc;
258 struct dev_context *devc;
39cfdd75
BV
259 GSList *devices;
260 struct libusb_device_descriptor des;
3b533202 261 libusb_device **devlist;
61136ea6 262 int devcnt, ret, i, j;
3b533202 263
39cfdd75 264 (void)options;
e98b7f1b 265
a873c594 266 drvc = di->priv;
269971dd 267 drvc->instances = NULL;
39cfdd75 268
4b97c74e
UH
269 devcnt = 0;
270 devices = 0;
271
39cfdd75
BV
272 clear_instances();
273
274 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 275 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 276 for (i = 0; devlist[i]; i++) {
61136ea6 277 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71
PS
278 sr_err("Failed to get device descriptor: %s.",
279 libusb_error_name(ret));
3b533202
BV
280 continue;
281 }
282
283 prof = NULL;
284 for (j = 0; dev_profiles[j].orig_vid; j++) {
285 if (des.idVendor == dev_profiles[j].orig_vid
286 && des.idProduct == dev_profiles[j].orig_pid) {
287 /* Device matches the pre-firmware profile. */
288 prof = &dev_profiles[j];
e98b7f1b 289 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 290 sdi = dso_dev_new(devcnt, prof);
39cfdd75 291 devices = g_slist_append(devices, sdi);
269971dd 292 devc = sdi->priv;
3b533202
BV
293 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
294 prof->firmware) == SR_OK)
295 /* Remember when the firmware on this device was updated */
269971dd 296 devc->fw_updated = g_get_monotonic_time();
3b533202 297 else
e98b7f1b
UH
298 sr_err("Firmware upload failed for "
299 "device %d.", devcnt);
3b533202 300 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 301 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
302 libusb_get_bus_number(devlist[i]), 0xff, NULL);
303 devcnt++;
304 break;
305 } else if (des.idVendor == dev_profiles[j].fw_vid
306 && des.idProduct == dev_profiles[j].fw_pid) {
307 /* Device matches the post-firmware profile. */
308 prof = &dev_profiles[j];
e98b7f1b 309 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
310 sdi = dso_dev_new(devcnt, prof);
311 sdi->status = SR_ST_INACTIVE;
39cfdd75 312 devices = g_slist_append(devices, sdi);
269971dd 313 devc = sdi->priv;
d0eec1ee 314 sdi->inst_type = SR_INST_USB;
c118080b 315 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
316 libusb_get_bus_number(devlist[i]),
317 libusb_get_device_address(devlist[i]), NULL);
318 devcnt++;
319 break;
320 }
321 }
322 if (!prof)
323 /* not a supported VID/PID */
324 continue;
325 }
326 libusb_free_device_list(devlist, 1);
327
39cfdd75 328 return devices;
3b533202
BV
329}
330
811deee4
BV
331static GSList *hw_dev_list(void)
332{
0e94d524 333 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
334}
335
25a0f108 336static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 337{
269971dd 338 struct dev_context *devc;
c118080b 339 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
340 int64_t timediff_us, timediff_ms;
341 int err;
3b533202 342
269971dd 343 devc = sdi->priv;
c118080b 344 usb = sdi->conn;
3b533202
BV
345
346 /*
e98b7f1b
UH
347 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
348 * for the FX2 to renumerate.
3b533202 349 */
fc8fe3e3 350 err = SR_ERR;
269971dd 351 if (devc->fw_updated > 0) {
e98b7f1b
UH
352 sr_info("Waiting for device to reset.");
353 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 354 g_usleep(300 * 1000);
fc8fe3e3
BV
355 timediff_ms = 0;
356 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 357 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
358 break;
359 g_usleep(100 * 1000);
269971dd 360 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 361 timediff_ms = timediff_us / 1000;
e98b7f1b 362 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 363 }
e98b7f1b 364 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 365 } else {
25a0f108 366 err = dso_open(sdi);
3b533202
BV
367 }
368
369 if (err != SR_OK) {
e98b7f1b 370 sr_err("Unable to open device.");
3b533202
BV
371 return SR_ERR;
372 }
373
c118080b 374 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 375 if (err != 0) {
d4928d71
PS
376 sr_err("Unable to claim interface: %s.",
377 libusb_error_name(err));
3b533202
BV
378 return SR_ERR;
379 }
380
381 return SR_OK;
382}
383
25a0f108 384static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 385{
3b533202
BV
386 dso_close(sdi);
387
388 return SR_OK;
389}
390
391static int hw_cleanup(void)
392{
269971dd
BV
393 struct drv_context *drvc;
394
a873c594 395 if (!(drvc = di->priv))
269971dd 396 return SR_OK;
3b533202 397
39cfdd75 398 clear_instances();
3b533202 399
3b533202
BV
400 return SR_OK;
401}
402
79917848
BV
403static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
404{
405
406 (void)sdi;
407
408 switch (id) {
409 case SR_CONF_NUM_TIMEBASE:
410 *data = g_variant_new_int32(NUM_TIMEBASE);
411 break;
412 case SR_CONF_NUM_VDIV:
413 *data = g_variant_new_int32(NUM_VDIV);
414 break;
415 default:
bd6fbf62 416 return SR_ERR_NA;
79917848
BV
417 }
418
419 return SR_OK;
420}
421
f627afd6 422static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
3b533202 423{
269971dd 424 struct dev_context *devc;
f627afd6 425 double tmp_double;
86bb3f4a 426 uint64_t tmp_u64, p, q;
f627afd6
BV
427 int tmp_int, ret;
428 unsigned int i;
429 const char *tmp_str;
4a090d72 430 char **targets;
3b533202 431
3b533202
BV
432 if (sdi->status != SR_ST_ACTIVE)
433 return SR_ERR;
434
a370ef19 435 ret = SR_OK;
269971dd 436 devc = sdi->priv;
035a1078 437 switch (id) {
1953564a 438 case SR_CONF_LIMIT_FRAMES:
f627afd6 439 devc->limit_frames = g_variant_get_uint64(data);
ae88b97b 440 break;
1953564a 441 case SR_CONF_TRIGGER_SLOPE:
f627afd6 442 tmp_u64 = g_variant_get_uint64(data);
a370ef19
BV
443 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
444 ret = SR_ERR_ARG;
269971dd 445 devc->triggerslope = tmp_u64;
a370ef19 446 break;
1953564a 447 case SR_CONF_HORIZ_TRIGGERPOS:
f627afd6
BV
448 tmp_double = g_variant_get_double(data);
449 if (tmp_double < 0.0 || tmp_double > 1.0) {
e98b7f1b 450 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 451 ret = SR_ERR_ARG;
a370ef19 452 } else
f627afd6 453 devc->triggerposition = tmp_double;
a370ef19 454 break;
1953564a 455 case SR_CONF_BUFFERSIZE:
f627afd6 456 tmp_u64 = g_variant_get_uint64(data);
034accb5
BV
457 for (i = 0; i < 2; i++) {
458 if (devc->profile->buffersizes[i] == tmp_u64) {
269971dd 459 devc->framesize = tmp_u64;
a370ef19
BV
460 break;
461 }
462 }
034accb5 463 if (i == 2)
a370ef19
BV
464 ret = SR_ERR_ARG;
465 break;
1953564a 466 case SR_CONF_TIMEBASE:
86bb3f4a 467 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
468 tmp_int = -1;
469 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
470 if (timebases[i][0] == p && timebases[i][1] == q) {
471 tmp_int = i;
a370ef19
BV
472 break;
473 }
474 }
f627afd6
BV
475 if (tmp_int >= 0)
476 devc->timebase = tmp_int;
477 else
a370ef19
BV
478 ret = SR_ERR_ARG;
479 break;
1953564a 480 case SR_CONF_TRIGGER_SOURCE:
f627afd6 481 tmp_str = g_variant_get_string(data, NULL);
a370ef19 482 for (i = 0; trigger_sources[i]; i++) {
f627afd6
BV
483 if (!strcmp(tmp_str, trigger_sources[i])) {
484 devc->triggersource = g_strdup(tmp_str);
a370ef19
BV
485 break;
486 }
487 }
488 if (trigger_sources[i] == 0)
489 ret = SR_ERR_ARG;
490 break;
1953564a 491 case SR_CONF_FILTER:
f627afd6 492 tmp_str = g_variant_get_string(data, NULL);
269971dd 493 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
f627afd6 494 targets = g_strsplit(tmp_str, ",", 0);
ebb781a6
BV
495 for (i = 0; targets[i]; i++) {
496 if (targets[i] == '\0')
497 /* Empty filter string can be used to clear them all. */
498 ;
499 else if (!strcmp(targets[i], "CH1"))
269971dd 500 devc->filter_ch1 = TRUE;
ebb781a6 501 else if (!strcmp(targets[i], "CH2"))
269971dd 502 devc->filter_ch2 = TRUE;
ebb781a6 503 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 504 devc->filter_trigger = TRUE;
ebb781a6 505 else {
e98b7f1b 506 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
507 ret = SR_ERR_ARG;
508 }
509 }
510 g_strfreev(targets);
511 break;
1953564a 512 case SR_CONF_VDIV:
e98b7f1b 513 /* TODO: Not supporting vdiv per channel yet. */
86bb3f4a 514 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
515 tmp_int = -1;
516 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
517 if (vdivs[i][0] == p && vdivs[i][1] == q) {
518 tmp_int = i;
313deed2
BV
519 break;
520 }
521 }
f627afd6
BV
522 if (tmp_int >= 0) {
523 devc->voltage_ch1 = tmp_int;
524 devc->voltage_ch2 = tmp_int;
525 } else
313deed2
BV
526 ret = SR_ERR_ARG;
527 break;
1953564a 528 case SR_CONF_COUPLING:
f627afd6 529 tmp_str = g_variant_get_string(data, NULL);
e98b7f1b 530 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 531 for (i = 0; coupling[i]; i++) {
f627afd6 532 if (!strcmp(tmp_str, coupling[i])) {
269971dd
BV
533 devc->coupling_ch1 = i;
534 devc->coupling_ch2 = i;
b58fbd99
BV
535 break;
536 }
537 }
538 if (coupling[i] == 0)
539 ret = SR_ERR_ARG;
540 break;
3b533202 541 default:
bd6fbf62 542 ret = SR_ERR_NA;
e98b7f1b 543 break;
3b533202
BV
544 }
545
546 return ret;
547}
548
f627afd6 549static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
a1c743fc 550{
034accb5 551 struct dev_context *devc;
3973ee26
BV
552 GVariant *tuple, *rational[2];
553 GVariantBuilder gvb;
554 unsigned int i;
a1c743fc
BV
555
556 (void)sdi;
557
034accb5
BV
558 if (!sdi)
559 return SR_ERR_ARG;
560
561 devc = sdi->priv;
a1c743fc 562 switch (key) {
9a6517d1 563 case SR_CONF_DEVICE_OPTIONS:
f627afd6
BV
564 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
565 devopts, ARRAY_SIZE(devopts), sizeof(int32_t));
9a6517d1 566 break;
6d1ceffa 567 case SR_CONF_BUFFERSIZE:
f627afd6 568 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
034accb5 569 devc->profile->buffersizes, 2, sizeof(uint64_t));
6d1ceffa 570 break;
2a7b113d 571 case SR_CONF_COUPLING:
f627afd6 572 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
2a7b113d 573 break;
e4f2b2ad 574 case SR_CONF_VDIV:
3973ee26
BV
575 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
576 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
577 rational[0] = g_variant_new_uint64(vdivs[i][0]);
578 rational[1] = g_variant_new_uint64(vdivs[i][1]);
579 tuple = g_variant_new_tuple(rational, 2);
580 g_variant_builder_add_value(&gvb, tuple);
581 }
582 *data = g_variant_builder_end(&gvb);
e4f2b2ad 583 break;
6e1fbcc4 584 case SR_CONF_FILTER:
f627afd6
BV
585 *data = g_variant_new_strv(filter_targets,
586 ARRAY_SIZE(filter_targets));
6e1fbcc4 587 break;
41f5bd09 588 case SR_CONF_TIMEBASE:
3973ee26
BV
589 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
590 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
591 rational[0] = g_variant_new_uint64(timebases[i][0]);
592 rational[1] = g_variant_new_uint64(timebases[i][1]);
593 tuple = g_variant_new_tuple(rational, 2);
594 g_variant_builder_add_value(&gvb, tuple);
595 }
596 *data = g_variant_builder_end(&gvb);
41f5bd09 597 break;
328bafab 598 case SR_CONF_TRIGGER_SOURCE:
f627afd6
BV
599 *data = g_variant_new_strv(trigger_sources,
600 ARRAY_SIZE(trigger_sources));
328bafab 601 break;
a1c743fc 602 default:
bd6fbf62 603 return SR_ERR_NA;
a1c743fc
BV
604 }
605
606 return SR_OK;
607}
608
69e19dd7 609static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 610 int num_samples)
3b533202
BV
611{
612 struct sr_datafeed_packet packet;
613 struct sr_datafeed_analog analog;
69e19dd7 614 struct dev_context *devc;
c5841b28 615 float ch1, ch2, range;
6e71ef3b 616 int num_probes, data_offset, i;
3b533202 617
69e19dd7 618 devc = sdi->priv;
269971dd 619 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
620 packet.type = SR_DF_ANALOG;
621 packet.payload = &analog;
6e71ef3b 622 /* TODO: support for 5xxx series 9-bit samples */
69e19dd7 623 analog.probes = devc->enabled_probes;
e749a8cb 624 analog.num_samples = num_samples;
9956f285
UH
625 analog.mq = SR_MQ_VOLTAGE;
626 analog.unit = SR_UNIT_VOLT;
886a52b6 627 /* TODO: Check malloc return value. */
6e71ef3b
BV
628 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
629 data_offset = 0;
3b533202 630 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
631 /*
632 * The device always sends data for both channels. If a channel
6e71ef3b 633 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
634 * data. However, we only send the requested channels to
635 * the bus.
c5841b28 636 *
e98b7f1b
UH
637 * Voltage values are encoded as a value 0-255 (0-512 on the
638 * DSO-5200*), where the value is a point in the range
639 * represented by the vdiv setting. There are 8 vertical divs,
640 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
641 * and 255 = +2V.
6e71ef3b 642 */
e98b7f1b 643 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 644 if (devc->ch1_enabled) {
f627afd6 645 range = ((float)vdivs[devc->voltage_ch1][0] / vdivs[devc->voltage_ch1][1]) * 8;
e749a8cb 646 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
647 /* Value is centered around 0V. */
648 ch1 -= range / 2;
6e71ef3b
BV
649 analog.data[data_offset++] = ch1;
650 }
269971dd 651 if (devc->ch2_enabled) {
f627afd6 652 range = ((float)vdivs[devc->voltage_ch2][0] / vdivs[devc->voltage_ch2][1]) * 8;
e749a8cb 653 ch2 = range / 255 * *(buf + i * 2);
c5841b28 654 ch2 -= range / 2;
6e71ef3b
BV
655 analog.data[data_offset++] = ch2;
656 }
3b533202 657 }
269971dd 658 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
659}
660
e98b7f1b
UH
661/*
662 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 663 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 664 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
665 * the libsigrok session bus.
666 */
667static void receive_transfer(struct libusb_transfer *transfer)
668{
669 struct sr_datafeed_packet packet;
69e19dd7 670 struct sr_dev_inst *sdi;
269971dd 671 struct dev_context *devc;
e749a8cb
BV
672 int num_samples, pre;
673
69e19dd7
BV
674 sdi = transfer->user_data;
675 devc = sdi->priv;
d4007311 676 sr_spew("receive_transfer(): status %d received %d bytes.",
e98b7f1b 677 transfer->status, transfer->actual_length);
e749a8cb
BV
678
679 if (transfer->actual_length == 0)
680 /* Nothing to send to the bus. */
681 return;
682
683 num_samples = transfer->actual_length / 2;
684
d4007311 685 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
e98b7f1b 686 devc->samp_received + num_samples, devc->framesize);
e749a8cb 687
e98b7f1b
UH
688 /*
689 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
690 * doesn't represent the trigger point. The offset at which the trigger
691 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
692 * from there up the session bus. The samples in the frame buffer
693 * before that trigger point came after the end of the device's frame
694 * buffer was reached, and it wrapped around to overwrite up until the
695 * trigger point.
e749a8cb 696 */
269971dd 697 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 698 /* Trigger point not yet reached. */
269971dd 699 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 700 /* The entire chunk is before the trigger point. */
269971dd 701 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 702 transfer->buffer, num_samples * 2);
269971dd 703 devc->samp_buffered += num_samples;
e749a8cb 704 } else {
e98b7f1b
UH
705 /*
706 * This chunk hits or overruns the trigger point.
e749a8cb 707 * Store the part before the trigger fired, and
e98b7f1b
UH
708 * send the rest up to the session bus.
709 */
269971dd
BV
710 pre = devc->trigger_offset - devc->samp_received;
711 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 712 transfer->buffer, pre * 2);
269971dd 713 devc->samp_buffered += pre;
e749a8cb
BV
714
715 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
716 sr_dbg("Reached trigger point, %d samples buffered.",
717 devc->samp_buffered);
e749a8cb
BV
718
719 /* Avoid the corner case where the chunk ended at
720 * exactly the trigger point. */
721 if (num_samples > pre)
69e19dd7 722 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
723 num_samples - pre);
724 }
725 } else {
726 /* Already past the trigger point, just send it all out. */
69e19dd7 727 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
728 num_samples);
729 }
730
269971dd 731 devc->samp_received += num_samples;
e749a8cb
BV
732
733 /* Everything in this transfer was either copied to the buffer or
734 * sent to the session bus. */
3b533202
BV
735 g_free(transfer->buffer);
736 libusb_free_transfer(transfer);
3b533202 737
269971dd 738 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
739 /* That was the last chunk in this frame. Send the buffered
740 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
741 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
742 devc->samp_buffered);
69e19dd7 743 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
744
745 /* Mark the end of this frame. */
ae88b97b 746 packet.type = SR_DF_FRAME_END;
269971dd 747 sr_session_send(devc->cb_data, &packet);
ae88b97b 748
269971dd 749 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 750 /* Terminate session */
a3508e33 751 devc->dev_state = STOPPING;
ae88b97b 752 } else {
269971dd 753 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
754 }
755 }
3b533202
BV
756}
757
758static int handle_event(int fd, int revents, void *cb_data)
759{
a3508e33 760 const struct sr_dev_inst *sdi;
ae88b97b 761 struct sr_datafeed_packet packet;
3b533202 762 struct timeval tv;
269971dd 763 struct dev_context *devc;
a873c594 764 struct drv_context *drvc = di->priv;
a3508e33
BV
765 const struct libusb_pollfd **lupfd;
766 int num_probes, i;
6e6eeff4
BV
767 uint32_t trigger_offset;
768 uint8_t capturestate;
3b533202 769
3b533202
BV
770 (void)fd;
771 (void)revents;
772
269971dd
BV
773 sdi = cb_data;
774 devc = sdi->priv;
a3508e33
BV
775 if (devc->dev_state == STOPPING) {
776 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
777 sr_dbg("Stopping acquisition.");
778 /*
779 * TODO: Doesn't really cancel pending transfers so they might
780 * come in after SR_DF_END is sent.
781 */
d4abb463 782 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
783 for (i = 0; lupfd[i]; i++)
784 sr_source_remove(lupfd[i]->fd);
785 free(lupfd);
786
787 packet.type = SR_DF_END;
788 sr_session_send(sdi, &packet);
789
790 devc->dev_state = IDLE;
791
792 return TRUE;
793 }
794
3b533202
BV
795 /* Always handle pending libusb events. */
796 tv.tv_sec = tv.tv_usec = 0;
d4abb463 797 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 798
3b533202 799 /* TODO: ugh */
269971dd 800 if (devc->dev_state == NEW_CAPTURE) {
c118080b 801 if (dso_capture_start(sdi) != SR_OK)
3b533202 802 return TRUE;
c118080b 803 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 804 return TRUE;
c118080b 805// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 806// return TRUE;
e98b7f1b 807 sr_dbg("Successfully requested next chunk.");
269971dd 808 devc->dev_state = CAPTURE;
3b533202
BV
809 return TRUE;
810 }
269971dd 811 if (devc->dev_state != CAPTURE)
3b533202
BV
812 return TRUE;
813
c118080b 814 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 815 return TRUE;
3b533202 816
e98b7f1b
UH
817 sr_dbg("Capturestate %d.", capturestate);
818 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
819 switch (capturestate) {
820 case CAPTURE_EMPTY:
269971dd
BV
821 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
822 devc->capture_empty_count = 0;
c118080b 823 if (dso_capture_start(sdi) != SR_OK)
3b533202 824 break;
c118080b 825 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 826 break;
c118080b 827// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 828// break;
e98b7f1b 829 sr_dbg("Successfully requested next chunk.");
3b533202
BV
830 }
831 break;
832 case CAPTURE_FILLING:
e98b7f1b 833 /* No data yet. */
3b533202
BV
834 break;
835 case CAPTURE_READY_8BIT:
e749a8cb 836 /* Remember where in the captured frame the trigger is. */
269971dd 837 devc->trigger_offset = trigger_offset;
e749a8cb 838
269971dd 839 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 840 /* TODO: Check malloc return value. */
269971dd
BV
841 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
842 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 843
3b533202 844 /* Tell the scope to send us the first frame. */
69e19dd7 845 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 846 break;
ae88b97b 847
e98b7f1b
UH
848 /*
849 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
850 * the data we just told the scope to send.
851 */
269971dd 852 devc->dev_state = FETCH_DATA;
ae88b97b
BV
853
854 /* Tell the frontend a new frame is on the way. */
855 packet.type = SR_DF_FRAME_BEGIN;
269971dd 856 sr_session_send(sdi, &packet);
3b533202
BV
857 break;
858 case CAPTURE_READY_9BIT:
859 /* TODO */
e98b7f1b 860 sr_err("Not yet supported.");
3b533202
BV
861 break;
862 case CAPTURE_TIMEOUT:
863 /* Doesn't matter, we'll try again next time. */
864 break;
865 default:
e98b7f1b
UH
866 sr_dbg("Unknown capture state: %d.", capturestate);
867 break;
3b533202
BV
868 }
869
870 return TRUE;
871}
872
3ffb6964 873static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 874 void *cb_data)
3b533202
BV
875{
876 const struct libusb_pollfd **lupfd;
269971dd 877 struct dev_context *devc;
a873c594 878 struct drv_context *drvc = di->priv;
3b533202
BV
879 int i;
880
3b533202
BV
881 if (sdi->status != SR_ST_ACTIVE)
882 return SR_ERR;
883
269971dd
BV
884 devc = sdi->priv;
885 devc->cb_data = cb_data;
3b533202 886
014359e3 887 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 888 sr_err("Failed to configure probes.");
014359e3
BV
889 return SR_ERR;
890 }
891
c118080b 892 if (dso_init(sdi) != SR_OK)
3b533202
BV
893 return SR_ERR;
894
c118080b 895 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
896 return SR_ERR;
897
269971dd 898 devc->dev_state = CAPTURE;
d4abb463 899 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 900 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
901 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
902 handle_event, (void *)sdi);
3b533202
BV
903 free(lupfd);
904
905 /* Send header packet to the session bus. */
4afdfd46 906 std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
3b533202 907
3b533202
BV
908 return SR_OK;
909}
910
69b07d14 911static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 912{
269971dd
BV
913 struct dev_context *devc;
914
915 (void)cb_data;
3b533202 916
3b533202
BV
917 if (sdi->status != SR_ST_ACTIVE)
918 return SR_ERR;
919
a3508e33
BV
920 devc = sdi->priv;
921 devc->dev_state = STOPPING;
3b533202
BV
922
923 return SR_OK;
924}
925
62bb8840 926SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
927 .name = "hantek-dso",
928 .longname = "Hantek DSO",
929 .api_version = 1,
930 .init = hw_init,
931 .cleanup = hw_cleanup,
61136ea6 932 .scan = hw_scan,
811deee4
BV
933 .dev_list = hw_dev_list,
934 .dev_clear = clear_instances,
79917848 935 .config_get = config_get,
035a1078 936 .config_set = config_set,
a1c743fc 937 .config_list = config_list,
3b533202
BV
938 .dev_open = hw_dev_open,
939 .dev_close = hw_dev_close,
62bb8840
UH
940 .dev_acquisition_start = hw_dev_acquisition_start,
941 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 942 .priv = NULL,
3b533202 943};