]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-dso/api.c
Remove unnecessary dev_clear() callbacks
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
3b533202
BV
21#include <stdio.h>
22#include <stdint.h>
23#include <stdlib.h>
24#include <sys/types.h>
25#include <sys/stat.h>
26#include <fcntl.h>
27#include <unistd.h>
28#include <string.h>
29#include <sys/time.h>
30#include <inttypes.h>
3b533202
BV
31#include <glib.h>
32#include <libusb.h>
c1aae900 33#include <libsigrok/libsigrok.h>
45c59c8b 34#include "libsigrok-internal.h"
3b533202
BV
35#include "dso.h"
36
fc8fe3e3
BV
37/* Max time in ms before we want to check on USB events */
38/* TODO tune this properly */
e98b7f1b 39#define TICK 1
3b533202 40
79917848
BV
41#define NUM_TIMEBASE 10
42#define NUM_VDIV 8
43
07ffa5b3
UH
44#define NUM_BUFFER_SIZES 2
45
584560f1 46static const uint32_t scanopts[] = {
624f5b4c
BV
47 SR_CONF_CONN,
48};
49
5ecd9049 50static const uint32_t drvopts[] = {
1953564a 51 SR_CONF_OSCILLOSCOPE,
933defaa
BV
52};
53
5ecd9049
BV
54static const uint32_t devopts[] = {
55 SR_CONF_CONTINUOUS | SR_CONF_SET,
56 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
57 SR_CONF_CONN | SR_CONF_GET,
58 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
62 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 63 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 64 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
65};
66
933defaa
BV
67static const uint32_t devopts_cg[] = {
68 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
69 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
70 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
71};
72
ba7dd8bb 73static const char *channel_names[] = {
78693401 74 "CH1", "CH2",
3b533202
BV
75};
76
034accb5 77static const uint64_t buffersizes_32k[] = {
1a46cc62 78 (10 * 1024), (32 * 1024),
034accb5
BV
79};
80static const uint64_t buffersizes_512k[] = {
1a46cc62 81 (10 * 1024), (512 * 1024),
034accb5
BV
82};
83static const uint64_t buffersizes_14k[] = {
1a46cc62 84 (10 * 1024), (14 * 1024),
034accb5
BV
85};
86
62bb8840 87static const struct dso_profile dev_profiles[] = {
88a13f30 88 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 89 "Hantek", "DSO-2090",
034accb5 90 buffersizes_32k,
8e2d6c9d 91 "hantek-dso-2090.fw" },
88a13f30
BV
92 { 0x04b4, 0x2150, 0x04b5, 0x2150,
93 "Hantek", "DSO-2150",
034accb5 94 buffersizes_32k,
8e2d6c9d 95 "hantek-dso-2150.fw" },
88a13f30
BV
96 { 0x04b4, 0x2250, 0x04b5, 0x2250,
97 "Hantek", "DSO-2250",
034accb5 98 buffersizes_512k,
8e2d6c9d 99 "hantek-dso-2250.fw" },
88a13f30
BV
100 { 0x04b4, 0x5200, 0x04b5, 0x5200,
101 "Hantek", "DSO-5200",
034accb5 102 buffersizes_14k,
8e2d6c9d 103 "hantek-dso-5200.fw" },
88a13f30
BV
104 { 0x04b4, 0x520a, 0x04b5, 0x520a,
105 "Hantek", "DSO-5200A",
034accb5 106 buffersizes_512k,
8e2d6c9d 107 "hantek-dso-5200A.fw" },
1b4aedc0 108 ALL_ZERO
a370ef19
BV
109};
110
86bb3f4a 111static const uint64_t timebases[][2] = {
a370ef19
BV
112 /* microseconds */
113 { 10, 1000000 },
114 { 20, 1000000 },
115 { 40, 1000000 },
116 { 100, 1000000 },
117 { 200, 1000000 },
118 { 400, 1000000 },
119 /* milliseconds */
120 { 1, 1000 },
121 { 2, 1000 },
122 { 4, 1000 },
123 { 10, 1000 },
124 { 20, 1000 },
125 { 40, 1000 },
126 { 100, 1000 },
127 { 200, 1000 },
128 { 400, 1000 },
a370ef19
BV
129};
130
86bb3f4a 131static const uint64_t vdivs[][2] = {
313deed2
BV
132 /* millivolts */
133 { 10, 1000 },
134 { 20, 1000 },
135 { 50, 1000 },
136 { 100, 1000 },
137 { 200, 1000 },
138 { 500, 1000 },
139 /* volts */
140 { 1, 1 },
141 { 2, 1 },
142 { 5, 1 },
313deed2
BV
143};
144
62bb8840 145static const char *trigger_sources[] = {
a370ef19
BV
146 "CH1",
147 "CH2",
148 "EXT",
88a13f30 149 /* TODO: forced */
a370ef19 150};
3b533202 151
933defaa
BV
152static const char *trigger_slopes[] = {
153 "r",
154 "f",
ebb781a6
BV
155};
156
62bb8840 157static const char *coupling[] = {
b58fbd99
BV
158 "AC",
159 "DC",
160 "GND",
b58fbd99
BV
161};
162
982947f7 163SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
e98b7f1b 164
695dc859 165static int dev_acquisition_stop(struct sr_dev_inst *sdi);
3b533202 166
395206f4 167static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
168{
169 struct sr_dev_inst *sdi;
ba7dd8bb 170 struct sr_channel *ch;
933defaa 171 struct sr_channel_group *cg;
269971dd
BV
172 struct drv_context *drvc;
173 struct dev_context *devc;
dcd438ee 174 unsigned int i;
3b533202 175
aac29cc1 176 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
177 sdi->status = SR_ST_INITIALIZING;
178 sdi->vendor = g_strdup(prof->vendor);
179 sdi->model = g_strdup(prof->model);
4f840ce9 180 sdi->driver = &hantek_dso_driver_info;
3b533202 181
e98b7f1b 182 /*
ba7dd8bb 183 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
184 * a trigger source internal to the device.
185 */
0f34cb47 186 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 187 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
188 cg = g_malloc0(sizeof(struct sr_channel_group));
189 cg->name = g_strdup(channel_names[i]);
190 cg->channels = g_slist_append(cg->channels, ch);
191 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
192 }
193
933defaa 194 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
195 devc->profile = prof;
196 devc->dev_state = IDLE;
197 devc->timebase = DEFAULT_TIMEBASE;
198 devc->ch1_enabled = TRUE;
199 devc->ch2_enabled = TRUE;
933defaa
BV
200 devc->voltage[0] = DEFAULT_VOLTAGE;
201 devc->voltage[1] = DEFAULT_VOLTAGE;
202 devc->coupling[0] = DEFAULT_COUPLING;
203 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
204 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
205 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
206 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
207 devc->framesize = DEFAULT_FRAMESIZE;
208 devc->triggerslope = SLOPE_POSITIVE;
209 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
210 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
211 sdi->priv = devc;
41812aca 212 drvc = hantek_dso_driver_info.context;
269971dd 213 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
214
215 return sdi;
216}
217
ba7dd8bb 218static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 219{
014359e3 220 struct dev_context *devc;
ba7dd8bb 221 struct sr_channel *ch;
62bb8840 222 const GSList *l;
69e19dd7 223 int p;
3b533202 224
014359e3
BV
225 devc = sdi->priv;
226
ba7dd8bb 227 g_slist_free(devc->enabled_channels);
269971dd 228 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
229 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
230 ch = l->data;
69e19dd7 231 if (p == 0)
ba7dd8bb 232 devc->ch1_enabled = ch->enabled;
69e19dd7 233 else
ba7dd8bb
UH
234 devc->ch2_enabled = ch->enabled;
235 if (ch->enabled)
236 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
237 }
238
239 return SR_OK;
240}
241
949b3dc0 242static void clear_dev_context(void *priv)
39cfdd75 243{
269971dd 244 struct dev_context *devc;
39cfdd75 245
949b3dc0
BV
246 devc = priv;
247 g_free(devc->triggersource);
ba7dd8bb 248 g_slist_free(devc->enabled_channels);
39cfdd75 249
949b3dc0 250}
39cfdd75 251
4f840ce9 252static int dev_clear(const struct sr_dev_driver *di)
949b3dc0
BV
253{
254 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
255}
256
4f840ce9 257static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
61136ea6 258{
f6beaac5 259 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
260}
261
4f840ce9 262static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 263{
269971dd
BV
264 struct drv_context *drvc;
265 struct dev_context *devc;
294dbac7 266 struct sr_dev_inst *sdi;
46a743c1
BV
267 struct sr_usb_dev_inst *usb;
268 struct sr_config *src;
294dbac7
BV
269 const struct dso_profile *prof;
270 GSList *l, *devices, *conn_devices;
39cfdd75 271 struct libusb_device_descriptor des;
3b533202 272 libusb_device **devlist;
2a8f2d41 273 int i, j;
46a743c1 274 const char *conn;
395206f4 275 char connection_id[64];
e98b7f1b 276
41812aca 277 drvc = di->context;
39cfdd75 278
4b97c74e
UH
279 devices = 0;
280
294dbac7
BV
281 conn = NULL;
282 for (l = options; l; l = l->next) {
283 src = l->data;
284 if (src->key == SR_CONF_CONN) {
285 conn = g_variant_get_string(src->data, NULL);
286 break;
287 }
288 }
289 if (conn)
290 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
291 else
292 conn_devices = NULL;
293
39cfdd75 294 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 295 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 296 for (i = 0; devlist[i]; i++) {
46a743c1 297 if (conn) {
294dbac7
BV
298 usb = NULL;
299 for (l = conn_devices; l; l = l->next) {
300 usb = l->data;
301 if (usb->bus == libusb_get_bus_number(devlist[i])
302 && usb->address == libusb_get_device_address(devlist[i]))
303 break;
304 }
305 if (!l)
306 /* This device matched none of the ones that
307 * matched the conn specification. */
308 continue;
46a743c1 309 }
294dbac7 310
2a8f2d41 311 libusb_get_device_descriptor(devlist[i], &des);
3b533202 312
395206f4
SA
313 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
314
3b533202
BV
315 prof = NULL;
316 for (j = 0; dev_profiles[j].orig_vid; j++) {
317 if (des.idVendor == dev_profiles[j].orig_vid
318 && des.idProduct == dev_profiles[j].orig_pid) {
319 /* Device matches the pre-firmware profile. */
320 prof = &dev_profiles[j];
e98b7f1b 321 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
322 sdi = dso_dev_new(prof);
323 sdi->connection_id = g_strdup(connection_id);
39cfdd75 324 devices = g_slist_append(devices, sdi);
269971dd 325 devc = sdi->priv;
8e2d6c9d
DE
326 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
327 USB_CONFIGURATION, prof->firmware) == SR_OK)
3b533202 328 /* Remember when the firmware on this device was updated */
269971dd 329 devc->fw_updated = g_get_monotonic_time();
3b533202 330 else
395206f4 331 sr_err("Firmware upload failed");
3b533202 332 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 333 sdi->conn = sr_usb_dev_inst_new(
3b533202 334 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
335 break;
336 } else if (des.idVendor == dev_profiles[j].fw_vid
337 && des.idProduct == dev_profiles[j].fw_pid) {
338 /* Device matches the post-firmware profile. */
339 prof = &dev_profiles[j];
e98b7f1b 340 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
341 sdi = dso_dev_new(prof);
342 sdi->connection_id = g_strdup(connection_id);
3b533202 343 sdi->status = SR_ST_INACTIVE;
39cfdd75 344 devices = g_slist_append(devices, sdi);
d0eec1ee 345 sdi->inst_type = SR_INST_USB;
c118080b 346 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
347 libusb_get_bus_number(devlist[i]),
348 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
349 break;
350 }
351 }
352 if (!prof)
353 /* not a supported VID/PID */
354 continue;
355 }
356 libusb_free_device_list(devlist, 1);
357
39cfdd75 358 return devices;
3b533202
BV
359}
360
4f840ce9 361static GSList *dev_list(const struct sr_dev_driver *di)
811deee4 362{
41812aca 363 return ((struct drv_context *)(di->context))->instances;
811deee4
BV
364}
365
6078d2c9 366static int dev_open(struct sr_dev_inst *sdi)
3b533202 367{
269971dd 368 struct dev_context *devc;
c118080b 369 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
370 int64_t timediff_us, timediff_ms;
371 int err;
3b533202 372
269971dd 373 devc = sdi->priv;
c118080b 374 usb = sdi->conn;
3b533202
BV
375
376 /*
e98b7f1b
UH
377 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
378 * for the FX2 to renumerate.
3b533202 379 */
fc8fe3e3 380 err = SR_ERR;
269971dd 381 if (devc->fw_updated > 0) {
e98b7f1b
UH
382 sr_info("Waiting for device to reset.");
383 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 384 g_usleep(300 * 1000);
fc8fe3e3
BV
385 timediff_ms = 0;
386 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 387 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
388 break;
389 g_usleep(100 * 1000);
269971dd 390 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 391 timediff_ms = timediff_us / 1000;
e98b7f1b 392 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 393 }
6433156c 394 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 395 } else {
25a0f108 396 err = dso_open(sdi);
3b533202
BV
397 }
398
399 if (err != SR_OK) {
e98b7f1b 400 sr_err("Unable to open device.");
3b533202
BV
401 return SR_ERR;
402 }
403
c118080b 404 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 405 if (err != 0) {
d4928d71 406 sr_err("Unable to claim interface: %s.",
46a743c1 407 libusb_error_name(err));
3b533202
BV
408 return SR_ERR;
409 }
410
411 return SR_OK;
412}
413
6078d2c9 414static int dev_close(struct sr_dev_inst *sdi)
3b533202 415{
3b533202
BV
416 dso_close(sdi);
417
418 return SR_OK;
419}
420
584560f1 421static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 422 const struct sr_channel_group *cg)
79917848 423{
933defaa 424 struct dev_context *devc;
624f5b4c 425 struct sr_usb_dev_inst *usb;
2c240774
UH
426 char str[128];
427 const char *s;
933defaa
BV
428 const uint64_t *vdiv;
429 int ch_idx;
79917848 430
584560f1 431 switch (key) {
bf622e6d 432 case SR_CONF_NUM_HDIV:
79917848
BV
433 *data = g_variant_new_int32(NUM_TIMEBASE);
434 break;
435 case SR_CONF_NUM_VDIV:
436 *data = g_variant_new_int32(NUM_VDIV);
437 break;
933defaa
BV
438 }
439
440 if (!sdi)
441 return SR_ERR_ARG;
442
443 devc = sdi->priv;
444 if (!cg) {
445 switch (key) {
446 case SR_CONF_CONN:
447 if (!sdi->conn)
448 return SR_ERR_ARG;
449 usb = sdi->conn;
450 if (usb->address == 255)
451 /* Device still needs to re-enumerate after firmware
452 * upload, so we don't know its (future) address. */
453 return SR_ERR;
454 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
455 *data = g_variant_new_string(str);
456 break;
457 case SR_CONF_TIMEBASE:
458 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
459 timebases[devc->timebase][1]);
460 break;
461 case SR_CONF_BUFFERSIZE:
462 *data = g_variant_new_uint64(devc->framesize);
463 break;
464 case SR_CONF_TRIGGER_SOURCE:
465 *data = g_variant_new_string(devc->triggersource);
466 break;
467 case SR_CONF_TRIGGER_SLOPE:
c442ffda 468 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
469 *data = g_variant_new_string(s);
470 break;
471 case SR_CONF_HORIZ_TRIGGERPOS:
472 *data = g_variant_new_double(devc->triggerposition);
473 break;
474 default:
475 return SR_ERR_NA;
476 }
477 } else {
478 if (sdi->channel_groups->data == cg)
479 ch_idx = 0;
480 else if (sdi->channel_groups->next->data == cg)
481 ch_idx = 1;
482 else
483 return SR_ERR_ARG;
0c5f2abc 484 switch (key) {
933defaa
BV
485 case SR_CONF_FILTER:
486 *data = g_variant_new_boolean(devc->filter[ch_idx]);
487 break;
488 case SR_CONF_VDIV:
489 vdiv = vdivs[devc->voltage[ch_idx]];
490 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
491 break;
492 case SR_CONF_COUPLING:
493 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
494 break;
495 }
79917848
BV
496 }
497
498 return SR_OK;
499}
500
584560f1 501static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 502 const struct sr_channel_group *cg)
3b533202 503{
269971dd 504 struct dev_context *devc;
f627afd6 505 double tmp_double;
86bb3f4a 506 uint64_t tmp_u64, p, q;
933defaa 507 int tmp_int, ch_idx, ret;
f627afd6
BV
508 unsigned int i;
509 const char *tmp_str;
8f996b89 510
3b533202 511 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 512 return SR_ERR_DEV_CLOSED;
3b533202 513
a370ef19 514 ret = SR_OK;
269971dd 515 devc = sdi->priv;
933defaa
BV
516 if (!cg) {
517 switch (key) {
518 case SR_CONF_LIMIT_FRAMES:
519 devc->limit_frames = g_variant_get_uint64(data);
520 break;
521 case SR_CONF_TRIGGER_SLOPE:
522 tmp_str = g_variant_get_string(data, NULL);
523 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
524 return SR_ERR_ARG;
525 devc->triggerslope = (tmp_str[0] == 'r')
526 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
527 break;
528 case SR_CONF_HORIZ_TRIGGERPOS:
529 tmp_double = g_variant_get_double(data);
530 if (tmp_double < 0.0 || tmp_double > 1.0) {
531 sr_err("Trigger position should be between 0.0 and 1.0.");
532 ret = SR_ERR_ARG;
533 } else
534 devc->triggerposition = tmp_double;
535 break;
536 case SR_CONF_BUFFERSIZE:
537 tmp_u64 = g_variant_get_uint64(data);
07ffa5b3 538 for (i = 0; i < NUM_BUFFER_SIZES; i++) {
933defaa
BV
539 if (devc->profile->buffersizes[i] == tmp_u64) {
540 devc->framesize = tmp_u64;
541 break;
542 }
a370ef19 543 }
07ffa5b3 544 if (i == NUM_BUFFER_SIZES)
933defaa
BV
545 ret = SR_ERR_ARG;
546 break;
547 case SR_CONF_TIMEBASE:
548 g_variant_get(data, "(tt)", &p, &q);
549 tmp_int = -1;
550 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
551 if (timebases[i][0] == p && timebases[i][1] == q) {
552 tmp_int = i;
553 break;
554 }
a370ef19 555 }
933defaa
BV
556 if (tmp_int >= 0)
557 devc->timebase = tmp_int;
558 else
ebb781a6 559 ret = SR_ERR_ARG;
933defaa
BV
560 break;
561 case SR_CONF_TRIGGER_SOURCE:
562 tmp_str = g_variant_get_string(data, NULL);
563 for (i = 0; trigger_sources[i]; i++) {
564 if (!strcmp(tmp_str, trigger_sources[i])) {
565 devc->triggersource = g_strdup(tmp_str);
566 break;
567 }
ebb781a6 568 }
933defaa
BV
569 if (trigger_sources[i] == 0)
570 ret = SR_ERR_ARG;
571 break;
572 default:
573 ret = SR_ERR_NA;
574 break;
ebb781a6 575 }
933defaa
BV
576 } else {
577 if (sdi->channel_groups->data == cg)
578 ch_idx = 0;
579 else if (sdi->channel_groups->next->data == cg)
580 ch_idx = 1;
581 else
582 return SR_ERR_ARG;
583 switch (key) {
584 case SR_CONF_FILTER:
585 devc->filter[ch_idx] = g_variant_get_boolean(data);
586 break;
587 case SR_CONF_VDIV:
588 g_variant_get(data, "(tt)", &p, &q);
589 tmp_int = -1;
590 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
591 if (vdivs[i][0] == p && vdivs[i][1] == q) {
592 tmp_int = i;
593 break;
594 }
313deed2 595 }
933defaa
BV
596 if (tmp_int >= 0) {
597 devc->voltage[ch_idx] = tmp_int;
598 } else
599 ret = SR_ERR_ARG;
600 break;
601 case SR_CONF_COUPLING:
602 tmp_str = g_variant_get_string(data, NULL);
603 for (i = 0; coupling[i]; i++) {
604 if (!strcmp(tmp_str, coupling[i])) {
605 devc->coupling[ch_idx] = i;
606 break;
607 }
b58fbd99 608 }
933defaa
BV
609 if (coupling[i] == 0)
610 ret = SR_ERR_ARG;
611 break;
612 default:
613 ret = SR_ERR_NA;
614 break;
b58fbd99 615 }
3b533202
BV
616 }
617
618 return ret;
619}
620
584560f1 621static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 622 const struct sr_channel_group *cg)
a1c743fc 623{
034accb5 624 struct dev_context *devc;
3973ee26
BV
625 GVariant *tuple, *rational[2];
626 GVariantBuilder gvb;
627 unsigned int i;
a1c743fc 628
933defaa 629 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
630 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
631 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
632 return SR_OK;
633 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 634 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 635 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
636 return SR_OK;
637 }
638
639 if (!sdi)
640 return SR_ERR_ARG;
641
642 if (!cg) {
93b118da 643 switch (key) {
933defaa
BV
644 case SR_CONF_DEVICE_OPTIONS:
645 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 646 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
647 break;
648 case SR_CONF_BUFFERSIZE:
649 if (!sdi)
650 return SR_ERR_ARG;
651 devc = sdi->priv;
652 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
07ffa5b3 653 devc->profile->buffersizes, NUM_BUFFER_SIZES, sizeof(uint64_t));
933defaa
BV
654 break;
655 case SR_CONF_TIMEBASE:
656 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
657 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
658 rational[0] = g_variant_new_uint64(timebases[i][0]);
659 rational[1] = g_variant_new_uint64(timebases[i][1]);
660 tuple = g_variant_new_tuple(rational, 2);
661 g_variant_builder_add_value(&gvb, tuple);
662 }
663 *data = g_variant_builder_end(&gvb);
664 break;
665 case SR_CONF_TRIGGER_SOURCE:
666 *data = g_variant_new_strv(trigger_sources,
667 ARRAY_SIZE(trigger_sources));
668 break;
669 case SR_CONF_TRIGGER_SLOPE:
670 *data = g_variant_new_strv(trigger_slopes,
671 ARRAY_SIZE(trigger_slopes));
672 break;
673 default:
674 return SR_ERR_NA;
3973ee26 675 }
933defaa 676 } else {
93b118da 677 switch (key) {
933defaa
BV
678 case SR_CONF_DEVICE_OPTIONS:
679 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
680 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
681 break;
682 case SR_CONF_COUPLING:
683 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
684 break;
685 case SR_CONF_VDIV:
686 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
687 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
688 rational[0] = g_variant_new_uint64(vdivs[i][0]);
689 rational[1] = g_variant_new_uint64(vdivs[i][1]);
690 tuple = g_variant_new_tuple(rational, 2);
691 g_variant_builder_add_value(&gvb, tuple);
692 }
693 *data = g_variant_builder_end(&gvb);
694 break;
695 default:
696 return SR_ERR_NA;
3973ee26 697 }
a1c743fc
BV
698 }
699
700 return SR_OK;
701}
702
69e19dd7 703static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 704 int num_samples)
3b533202
BV
705{
706 struct sr_datafeed_packet packet;
5faebab2 707 struct sr_datafeed_analog_old analog;
69e19dd7 708 struct dev_context *devc;
c5841b28 709 float ch1, ch2, range;
ba7dd8bb 710 int num_channels, data_offset, i;
3b533202 711
69e19dd7 712 devc = sdi->priv;
ba7dd8bb 713 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
5faebab2 714 packet.type = SR_DF_ANALOG_OLD;
3b533202 715 packet.payload = &analog;
6e71ef3b 716 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 717 analog.channels = devc->enabled_channels;
e749a8cb 718 analog.num_samples = num_samples;
9956f285
UH
719 analog.mq = SR_MQ_VOLTAGE;
720 analog.unit = SR_UNIT_VOLT;
cf49d66b 721 analog.mqflags = 0;
886a52b6 722 /* TODO: Check malloc return value. */
ba7dd8bb 723 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 724 data_offset = 0;
3b533202 725 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
726 /*
727 * The device always sends data for both channels. If a channel
6e71ef3b 728 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
729 * data. However, we only send the requested channels to
730 * the bus.
c5841b28 731 *
e98b7f1b
UH
732 * Voltage values are encoded as a value 0-255 (0-512 on the
733 * DSO-5200*), where the value is a point in the range
734 * represented by the vdiv setting. There are 8 vertical divs,
735 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
736 * and 255 = +2V.
6e71ef3b 737 */
e98b7f1b 738 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 739 if (devc->ch1_enabled) {
933defaa 740 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 741 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
742 /* Value is centered around 0V. */
743 ch1 -= range / 2;
6e71ef3b
BV
744 analog.data[data_offset++] = ch1;
745 }
269971dd 746 if (devc->ch2_enabled) {
933defaa 747 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 748 ch2 = range / 255 * *(buf + i * 2);
c5841b28 749 ch2 -= range / 2;
6e71ef3b
BV
750 analog.data[data_offset++] = ch2;
751 }
3b533202 752 }
695dc859 753 sr_session_send(sdi, &packet);
1e6b5b93 754 g_free(analog.data);
e749a8cb
BV
755}
756
e98b7f1b
UH
757/*
758 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 759 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 760 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
761 * the libsigrok session bus.
762 */
55462b8b 763static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb
BV
764{
765 struct sr_datafeed_packet packet;
69e19dd7 766 struct sr_dev_inst *sdi;
269971dd 767 struct dev_context *devc;
e749a8cb
BV
768 int num_samples, pre;
769
69e19dd7
BV
770 sdi = transfer->user_data;
771 devc = sdi->priv;
eb8e6cd2
UH
772 sr_spew("receive_transfer(): status %s received %d bytes.",
773 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
774
775 if (transfer->actual_length == 0)
776 /* Nothing to send to the bus. */
777 return;
778
779 num_samples = transfer->actual_length / 2;
780
d4007311 781 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 782 devc->samp_received + num_samples, devc->framesize);
e749a8cb 783
e98b7f1b
UH
784 /*
785 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
786 * doesn't represent the trigger point. The offset at which the trigger
787 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
788 * from there up the session bus. The samples in the frame buffer
789 * before that trigger point came after the end of the device's frame
790 * buffer was reached, and it wrapped around to overwrite up until the
791 * trigger point.
e749a8cb 792 */
269971dd 793 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 794 /* Trigger point not yet reached. */
269971dd 795 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 796 /* The entire chunk is before the trigger point. */
269971dd 797 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 798 transfer->buffer, num_samples * 2);
269971dd 799 devc->samp_buffered += num_samples;
e749a8cb 800 } else {
e98b7f1b
UH
801 /*
802 * This chunk hits or overruns the trigger point.
e749a8cb 803 * Store the part before the trigger fired, and
e98b7f1b
UH
804 * send the rest up to the session bus.
805 */
269971dd
BV
806 pre = devc->trigger_offset - devc->samp_received;
807 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 808 transfer->buffer, pre * 2);
269971dd 809 devc->samp_buffered += pre;
e749a8cb
BV
810
811 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 812 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 813 devc->samp_buffered);
e749a8cb
BV
814
815 /* Avoid the corner case where the chunk ended at
816 * exactly the trigger point. */
817 if (num_samples > pre)
69e19dd7 818 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
819 num_samples - pre);
820 }
821 } else {
822 /* Already past the trigger point, just send it all out. */
a95f142e 823 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
824 }
825
269971dd 826 devc->samp_received += num_samples;
e749a8cb
BV
827
828 /* Everything in this transfer was either copied to the buffer or
829 * sent to the session bus. */
3b533202
BV
830 g_free(transfer->buffer);
831 libusb_free_transfer(transfer);
3b533202 832
269971dd 833 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
834 /* That was the last chunk in this frame. Send the buffered
835 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 836 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 837 devc->samp_buffered);
69e19dd7 838 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
839
840 /* Mark the end of this frame. */
ae88b97b 841 packet.type = SR_DF_FRAME_END;
695dc859 842 sr_session_send(sdi, &packet);
ae88b97b 843
269971dd 844 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 845 /* Terminate session */
a3508e33 846 devc->dev_state = STOPPING;
ae88b97b 847 } else {
269971dd 848 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
849 }
850 }
3b533202
BV
851}
852
853static int handle_event(int fd, int revents, void *cb_data)
854{
a3508e33 855 const struct sr_dev_inst *sdi;
ae88b97b 856 struct sr_datafeed_packet packet;
3b533202 857 struct timeval tv;
4f840ce9 858 struct sr_dev_driver *di;
269971dd 859 struct dev_context *devc;
4f840ce9 860 struct drv_context *drvc;
ba7dd8bb 861 int num_channels;
6e6eeff4
BV
862 uint32_t trigger_offset;
863 uint8_t capturestate;
3b533202 864
3b533202
BV
865 (void)fd;
866 (void)revents;
867
269971dd 868 sdi = cb_data;
4f840ce9 869 di = sdi->driver;
41812aca 870 drvc = di->context;
269971dd 871 devc = sdi->priv;
a3508e33
BV
872 if (devc->dev_state == STOPPING) {
873 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
874 sr_dbg("Stopping acquisition.");
875 /*
876 * TODO: Doesn't really cancel pending transfers so they might
877 * come in after SR_DF_END is sent.
878 */
102f1239 879 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 880
3be42bc2 881 std_session_send_df_end(sdi, LOG_PREFIX);
a3508e33
BV
882
883 devc->dev_state = IDLE;
884
885 return TRUE;
886 }
887
3b533202
BV
888 /* Always handle pending libusb events. */
889 tv.tv_sec = tv.tv_usec = 0;
d4abb463 890 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 891
3b533202 892 /* TODO: ugh */
269971dd 893 if (devc->dev_state == NEW_CAPTURE) {
c118080b 894 if (dso_capture_start(sdi) != SR_OK)
3b533202 895 return TRUE;
c118080b 896 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 897 return TRUE;
c118080b 898// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 899// return TRUE;
e98b7f1b 900 sr_dbg("Successfully requested next chunk.");
269971dd 901 devc->dev_state = CAPTURE;
3b533202
BV
902 return TRUE;
903 }
269971dd 904 if (devc->dev_state != CAPTURE)
3b533202
BV
905 return TRUE;
906
c118080b 907 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 908 return TRUE;
3b533202 909
e98b7f1b
UH
910 sr_dbg("Capturestate %d.", capturestate);
911 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
912 switch (capturestate) {
913 case CAPTURE_EMPTY:
269971dd
BV
914 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
915 devc->capture_empty_count = 0;
c118080b 916 if (dso_capture_start(sdi) != SR_OK)
3b533202 917 break;
c118080b 918 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 919 break;
c118080b 920// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 921// break;
e98b7f1b 922 sr_dbg("Successfully requested next chunk.");
3b533202
BV
923 }
924 break;
925 case CAPTURE_FILLING:
e98b7f1b 926 /* No data yet. */
3b533202
BV
927 break;
928 case CAPTURE_READY_8BIT:
e749a8cb 929 /* Remember where in the captured frame the trigger is. */
269971dd 930 devc->trigger_offset = trigger_offset;
e749a8cb 931
ba7dd8bb 932 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
a95f142e 933 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 934 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 935
3b533202 936 /* Tell the scope to send us the first frame. */
69e19dd7 937 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 938 break;
ae88b97b 939
e98b7f1b
UH
940 /*
941 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
942 * the data we just told the scope to send.
943 */
269971dd 944 devc->dev_state = FETCH_DATA;
ae88b97b
BV
945
946 /* Tell the frontend a new frame is on the way. */
947 packet.type = SR_DF_FRAME_BEGIN;
269971dd 948 sr_session_send(sdi, &packet);
3b533202
BV
949 break;
950 case CAPTURE_READY_9BIT:
951 /* TODO */
e98b7f1b 952 sr_err("Not yet supported.");
3b533202
BV
953 break;
954 case CAPTURE_TIMEOUT:
955 /* Doesn't matter, we'll try again next time. */
956 break;
957 default:
e98b7f1b
UH
958 sr_dbg("Unknown capture state: %d.", capturestate);
959 break;
3b533202
BV
960 }
961
962 return TRUE;
963}
964
695dc859 965static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 966{
269971dd 967 struct dev_context *devc;
4f840ce9 968 struct sr_dev_driver *di = sdi->driver;
41812aca 969 struct drv_context *drvc = di->context;
3b533202 970
3b533202 971 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 972 return SR_ERR_DEV_CLOSED;
3b533202 973
269971dd 974 devc = sdi->priv;
3b533202 975
ba7dd8bb
UH
976 if (configure_channels(sdi) != SR_OK) {
977 sr_err("Failed to configure channels.");
014359e3
BV
978 return SR_ERR;
979 }
980
c118080b 981 if (dso_init(sdi) != SR_OK)
3b533202
BV
982 return SR_ERR;
983
c118080b 984 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
985 return SR_ERR;
986
269971dd 987 devc->dev_state = CAPTURE;
102f1239 988 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 989
695dc859 990 std_session_send_df_header(sdi, LOG_PREFIX);
3b533202 991
3b533202
BV
992 return SR_OK;
993}
994
695dc859 995static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 996{
269971dd
BV
997 struct dev_context *devc;
998
3b533202
BV
999 if (sdi->status != SR_ST_ACTIVE)
1000 return SR_ERR;
1001
a3508e33
BV
1002 devc = sdi->priv;
1003 devc->dev_state = STOPPING;
3b533202
BV
1004
1005 return SR_OK;
1006}
1007
62bb8840 1008SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1009 .name = "hantek-dso",
1010 .longname = "Hantek DSO",
1011 .api_version = 1,
6078d2c9 1012 .init = init,
700d6b64 1013 .cleanup = std_cleanup,
6078d2c9
UH
1014 .scan = scan,
1015 .dev_list = dev_list,
3b412e3a 1016 .dev_clear = dev_clear,
79917848 1017 .config_get = config_get,
035a1078 1018 .config_set = config_set,
a1c743fc 1019 .config_list = config_list,
6078d2c9
UH
1020 .dev_open = dev_open,
1021 .dev_close = dev_close,
1022 .dev_acquisition_start = dev_acquisition_start,
1023 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 1024 .context = NULL,
3b533202 1025};