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3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
417412c8 21#include <math.h>
3b533202
BV
22#include <stdio.h>
23#include <stdint.h>
24#include <stdlib.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <fcntl.h>
28#include <unistd.h>
29#include <string.h>
30#include <sys/time.h>
31#include <inttypes.h>
3b533202
BV
32#include <glib.h>
33#include <libusb.h>
c1aae900 34#include <libsigrok/libsigrok.h>
45c59c8b 35#include "libsigrok-internal.h"
caeb8d7a 36#include "protocol.h"
3b533202 37
fc8fe3e3
BV
38/* Max time in ms before we want to check on USB events */
39/* TODO tune this properly */
e98b7f1b 40#define TICK 1
3b533202 41
d9251a2c
UH
42#define NUM_TIMEBASE 10
43#define NUM_VDIV 8
79917848 44
07ffa5b3
UH
45#define NUM_BUFFER_SIZES 2
46
584560f1 47static const uint32_t scanopts[] = {
624f5b4c
BV
48 SR_CONF_CONN,
49};
50
5ecd9049 51static const uint32_t drvopts[] = {
1953564a 52 SR_CONF_OSCILLOSCOPE,
933defaa
BV
53};
54
5ecd9049 55static const uint32_t devopts[] = {
e91bb0a6 56 SR_CONF_CONTINUOUS,
933defaa 57 SR_CONF_CONN | SR_CONF_GET,
50bc52f3 58 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
933defaa 59 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
95983cc3 61 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
933defaa
BV
62 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
86621306 64 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3b2b7031 65 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 66 SR_CONF_NUM_VDIV | SR_CONF_GET,
12f62ce6 67 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
3b533202
BV
68};
69
933defaa 70static const uint32_t devopts_cg[] = {
933defaa
BV
71 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
72 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 73 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
933defaa
BV
74};
75
ba7dd8bb 76static const char *channel_names[] = {
78693401 77 "CH1", "CH2",
3b533202
BV
78};
79
034accb5 80static const uint64_t buffersizes_32k[] = {
1a46cc62 81 (10 * 1024), (32 * 1024),
034accb5
BV
82};
83static const uint64_t buffersizes_512k[] = {
1a46cc62 84 (10 * 1024), (512 * 1024),
034accb5
BV
85};
86static const uint64_t buffersizes_14k[] = {
1a46cc62 87 (10 * 1024), (14 * 1024),
034accb5
BV
88};
89
62bb8840 90static const struct dso_profile dev_profiles[] = {
88a13f30 91 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 92 "Hantek", "DSO-2090",
034accb5 93 buffersizes_32k,
8e2d6c9d 94 "hantek-dso-2090.fw" },
88a13f30
BV
95 { 0x04b4, 0x2150, 0x04b5, 0x2150,
96 "Hantek", "DSO-2150",
034accb5 97 buffersizes_32k,
8e2d6c9d 98 "hantek-dso-2150.fw" },
88a13f30
BV
99 { 0x04b4, 0x2250, 0x04b5, 0x2250,
100 "Hantek", "DSO-2250",
034accb5 101 buffersizes_512k,
8e2d6c9d 102 "hantek-dso-2250.fw" },
88a13f30
BV
103 { 0x04b4, 0x5200, 0x04b5, 0x5200,
104 "Hantek", "DSO-5200",
034accb5 105 buffersizes_14k,
8e2d6c9d 106 "hantek-dso-5200.fw" },
88a13f30
BV
107 { 0x04b4, 0x520a, 0x04b5, 0x520a,
108 "Hantek", "DSO-5200A",
034accb5 109 buffersizes_512k,
8e2d6c9d 110 "hantek-dso-5200A.fw" },
1b4aedc0 111 ALL_ZERO
a370ef19
BV
112};
113
86bb3f4a 114static const uint64_t timebases[][2] = {
a370ef19
BV
115 /* microseconds */
116 { 10, 1000000 },
117 { 20, 1000000 },
118 { 40, 1000000 },
119 { 100, 1000000 },
120 { 200, 1000000 },
121 { 400, 1000000 },
122 /* milliseconds */
123 { 1, 1000 },
124 { 2, 1000 },
125 { 4, 1000 },
126 { 10, 1000 },
127 { 20, 1000 },
128 { 40, 1000 },
129 { 100, 1000 },
130 { 200, 1000 },
131 { 400, 1000 },
a370ef19
BV
132};
133
11e33196
PM
134static const uint64_t samplerates[] = {
135 SR_KHZ(20),
136 SR_KHZ(25),
137 SR_KHZ(50),
138 SR_KHZ(100),
139 SR_KHZ(200),
140 SR_KHZ(250),
141 SR_KHZ(500),
142 SR_MHZ(1),
143 SR_MHZ(2),
144 SR_MHZ(5),
145 SR_MHZ(10),
146 SR_MHZ(20),
147 SR_MHZ(25),
148 SR_MHZ(50),
149 SR_MHZ(100),
150 SR_MHZ(125),
ab8df2b1 151 /* Fast mode not supported yet.
11e33196
PM
152 SR_MHZ(200),
153 SR_MHZ(250), */
154};
155
86bb3f4a 156static const uint64_t vdivs[][2] = {
313deed2
BV
157 /* millivolts */
158 { 10, 1000 },
159 { 20, 1000 },
160 { 50, 1000 },
161 { 100, 1000 },
162 { 200, 1000 },
163 { 500, 1000 },
164 /* volts */
165 { 1, 1 },
166 { 2, 1 },
167 { 5, 1 },
313deed2
BV
168};
169
62bb8840 170static const char *trigger_sources[] = {
f8195cb2 171 "CH1", "CH2", "EXT",
88a13f30 172 /* TODO: forced */
a370ef19 173};
3b533202 174
933defaa 175static const char *trigger_slopes[] = {
f8195cb2 176 "r", "f",
ebb781a6
BV
177};
178
62bb8840 179static const char *coupling[] = {
f8195cb2 180 "AC", "DC", "GND",
b58fbd99
BV
181};
182
15a5bfe4 183static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
184{
185 struct sr_dev_inst *sdi;
ba7dd8bb 186 struct sr_channel *ch;
933defaa 187 struct sr_channel_group *cg;
269971dd 188 struct dev_context *devc;
dcd438ee 189 unsigned int i;
3b533202 190
aac29cc1 191 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
192 sdi->status = SR_ST_INITIALIZING;
193 sdi->vendor = g_strdup(prof->vendor);
194 sdi->model = g_strdup(prof->model);
3b533202 195
e98b7f1b 196 /*
ba7dd8bb 197 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
198 * a trigger source internal to the device.
199 */
0f34cb47 200 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 201 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
202 cg = g_malloc0(sizeof(struct sr_channel_group));
203 cg->name = g_strdup(channel_names[i]);
204 cg->channels = g_slist_append(cg->channels, ch);
205 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
206 }
207
933defaa 208 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
209 devc->profile = prof;
210 devc->dev_state = IDLE;
211 devc->timebase = DEFAULT_TIMEBASE;
11e33196 212 devc->samplerate = DEFAULT_SAMPLERATE;
417412c8
AJ
213 devc->ch_enabled[0] = TRUE;
214 devc->ch_enabled[1] = TRUE;
933defaa
BV
215 devc->voltage[0] = DEFAULT_VOLTAGE;
216 devc->voltage[1] = DEFAULT_VOLTAGE;
217 devc->coupling[0] = DEFAULT_COUPLING;
218 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
219 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
220 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
221 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
222 devc->framesize = DEFAULT_FRAMESIZE;
223 devc->triggerslope = SLOPE_POSITIVE;
224 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
95983cc3 225 devc->capture_ratio = DEFAULT_CAPTURE_RATIO;
269971dd 226 sdi->priv = devc;
3b533202
BV
227
228 return sdi;
229}
230
ba7dd8bb 231static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 232{
014359e3 233 struct dev_context *devc;
ba7dd8bb 234 struct sr_channel *ch;
62bb8840 235 const GSList *l;
69e19dd7 236 int p;
3b533202 237
014359e3
BV
238 devc = sdi->priv;
239
ba7dd8bb 240 g_slist_free(devc->enabled_channels);
be10b96d 241 devc->enabled_channels = NULL;
417412c8 242 devc->ch_enabled[0] = devc->ch_enabled[1] = FALSE;
ba7dd8bb
UH
243 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
244 ch = l->data;
69e19dd7 245 if (p == 0)
417412c8 246 devc->ch_enabled[0] = ch->enabled;
69e19dd7 247 else
417412c8 248 devc->ch_enabled[1] = ch->enabled;
ba7dd8bb
UH
249 if (ch->enabled)
250 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
251 }
252
253 return SR_OK;
254}
255
3553451f 256static void clear_helper(struct dev_context *devc)
39cfdd75 257{
949b3dc0 258 g_free(devc->triggersource);
ba7dd8bb 259 g_slist_free(devc->enabled_channels);
949b3dc0 260}
39cfdd75 261
4f840ce9 262static int dev_clear(const struct sr_dev_driver *di)
949b3dc0 263{
3553451f 264 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
39cfdd75
BV
265}
266
4f840ce9 267static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 268{
269971dd
BV
269 struct drv_context *drvc;
270 struct dev_context *devc;
294dbac7 271 struct sr_dev_inst *sdi;
46a743c1
BV
272 struct sr_usb_dev_inst *usb;
273 struct sr_config *src;
294dbac7
BV
274 const struct dso_profile *prof;
275 GSList *l, *devices, *conn_devices;
39cfdd75 276 struct libusb_device_descriptor des;
3b533202 277 libusb_device **devlist;
2a8f2d41 278 int i, j;
46a743c1 279 const char *conn;
395206f4 280 char connection_id[64];
e98b7f1b 281
41812aca 282 drvc = di->context;
39cfdd75 283
4b97c74e
UH
284 devices = 0;
285
294dbac7
BV
286 conn = NULL;
287 for (l = options; l; l = l->next) {
288 src = l->data;
289 if (src->key == SR_CONF_CONN) {
290 conn = g_variant_get_string(src->data, NULL);
291 break;
292 }
293 }
294 if (conn)
295 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
296 else
297 conn_devices = NULL;
298
39cfdd75 299 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 300 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 301 for (i = 0; devlist[i]; i++) {
46a743c1 302 if (conn) {
294dbac7
BV
303 usb = NULL;
304 for (l = conn_devices; l; l = l->next) {
305 usb = l->data;
306 if (usb->bus == libusb_get_bus_number(devlist[i])
307 && usb->address == libusb_get_device_address(devlist[i]))
308 break;
309 }
310 if (!l)
311 /* This device matched none of the ones that
312 * matched the conn specification. */
313 continue;
46a743c1 314 }
294dbac7 315
2a8f2d41 316 libusb_get_device_descriptor(devlist[i], &des);
3b533202 317
6c1a76d1
RT
318 if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
319 continue;
395206f4 320
3b533202
BV
321 prof = NULL;
322 for (j = 0; dev_profiles[j].orig_vid; j++) {
323 if (des.idVendor == dev_profiles[j].orig_vid
324 && des.idProduct == dev_profiles[j].orig_pid) {
325 /* Device matches the pre-firmware profile. */
326 prof = &dev_profiles[j];
e98b7f1b 327 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 328 sdi = dso_dev_new(prof);
395206f4 329 sdi->connection_id = g_strdup(connection_id);
39cfdd75 330 devices = g_slist_append(devices, sdi);
269971dd 331 devc = sdi->priv;
8e2d6c9d 332 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
1372bdcd 333 USB_CONFIGURATION, prof->firmware) == SR_OK) {
3b533202 334 /* Remember when the firmware on this device was updated */
269971dd 335 devc->fw_updated = g_get_monotonic_time();
1372bdcd
GS
336 } else {
337 sr_err("Firmware upload failed, name %s", prof->firmware);
338 }
3b533202 339 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 340 sdi->conn = sr_usb_dev_inst_new(
3b533202 341 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
342 break;
343 } else if (des.idVendor == dev_profiles[j].fw_vid
344 && des.idProduct == dev_profiles[j].fw_pid) {
345 /* Device matches the post-firmware profile. */
346 prof = &dev_profiles[j];
e98b7f1b 347 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 348 sdi = dso_dev_new(prof);
395206f4 349 sdi->connection_id = g_strdup(connection_id);
3b533202 350 sdi->status = SR_ST_INACTIVE;
39cfdd75 351 devices = g_slist_append(devices, sdi);
d0eec1ee 352 sdi->inst_type = SR_INST_USB;
c118080b 353 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
354 libusb_get_bus_number(devlist[i]),
355 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
356 break;
357 }
358 }
359 if (!prof)
360 /* not a supported VID/PID */
361 continue;
362 }
363 libusb_free_device_list(devlist, 1);
364
15a5bfe4 365 return std_scan_complete(di, devices);
3b533202
BV
366}
367
6078d2c9 368static int dev_open(struct sr_dev_inst *sdi)
3b533202 369{
269971dd 370 struct dev_context *devc;
c118080b 371 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
372 int64_t timediff_us, timediff_ms;
373 int err;
3b533202 374
269971dd 375 devc = sdi->priv;
c118080b 376 usb = sdi->conn;
3b533202
BV
377
378 /*
e98b7f1b
UH
379 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
380 * for the FX2 to renumerate.
3b533202 381 */
fc8fe3e3 382 err = SR_ERR;
269971dd 383 if (devc->fw_updated > 0) {
e98b7f1b
UH
384 sr_info("Waiting for device to reset.");
385 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 386 g_usleep(300 * 1000);
fc8fe3e3
BV
387 timediff_ms = 0;
388 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 389 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
390 break;
391 g_usleep(100 * 1000);
269971dd 392 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 393 timediff_ms = timediff_us / 1000;
e98b7f1b 394 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 395 }
6433156c 396 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 397 } else {
25a0f108 398 err = dso_open(sdi);
3b533202
BV
399 }
400
401 if (err != SR_OK) {
e98b7f1b 402 sr_err("Unable to open device.");
3b533202
BV
403 return SR_ERR;
404 }
405
c118080b 406 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 407 if (err != 0) {
d4928d71 408 sr_err("Unable to claim interface: %s.",
d9251a2c 409 libusb_error_name(err));
3b533202
BV
410 return SR_ERR;
411 }
412
413 return SR_OK;
414}
415
6078d2c9 416static int dev_close(struct sr_dev_inst *sdi)
3b533202 417{
3b533202
BV
418 dso_close(sdi);
419
420 return SR_OK;
421}
422
dd7a72ea
UH
423static int config_get(uint32_t key, GVariant **data,
424 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
79917848 425{
933defaa 426 struct dev_context *devc;
624f5b4c 427 struct sr_usb_dev_inst *usb;
2c240774 428 const char *s;
933defaa
BV
429 const uint64_t *vdiv;
430 int ch_idx;
79917848 431
584560f1 432 switch (key) {
bf622e6d 433 case SR_CONF_NUM_HDIV:
79917848
BV
434 *data = g_variant_new_int32(NUM_TIMEBASE);
435 break;
436 case SR_CONF_NUM_VDIV:
437 *data = g_variant_new_int32(NUM_VDIV);
438 break;
933defaa
BV
439 }
440
441 if (!sdi)
442 return SR_ERR_ARG;
443
444 devc = sdi->priv;
445 if (!cg) {
446 switch (key) {
12f62ce6
PM
447 case SR_CONF_TRIGGER_LEVEL:
448 *data = g_variant_new_double(devc->voffset_trigger);
449 break;
933defaa
BV
450 case SR_CONF_CONN:
451 if (!sdi->conn)
452 return SR_ERR_ARG;
453 usb = sdi->conn;
454 if (usb->address == 255)
455 /* Device still needs to re-enumerate after firmware
456 * upload, so we don't know its (future) address. */
457 return SR_ERR;
95c1fe62 458 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
933defaa
BV
459 break;
460 case SR_CONF_TIMEBASE:
461 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
462 timebases[devc->timebase][1]);
463 break;
3b2b7031 464 case SR_CONF_SAMPLERATE:
11e33196 465 *data = g_variant_new_uint64(devc->samplerate);
3b2b7031 466 break;
933defaa
BV
467 case SR_CONF_BUFFERSIZE:
468 *data = g_variant_new_uint64(devc->framesize);
469 break;
470 case SR_CONF_TRIGGER_SOURCE:
471 *data = g_variant_new_string(devc->triggersource);
472 break;
473 case SR_CONF_TRIGGER_SLOPE:
c442ffda 474 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
475 *data = g_variant_new_string(s);
476 break;
95983cc3
PM
477 case SR_CONF_CAPTURE_RATIO:
478 *data = g_variant_new_uint64(devc->capture_ratio);
933defaa 479 break;
50bc52f3
VO
480 case SR_CONF_LIMIT_FRAMES:
481 *data = g_variant_new_uint64(devc->limit_frames);
482 break;
933defaa
BV
483 default:
484 return SR_ERR_NA;
485 }
486 } else {
487 if (sdi->channel_groups->data == cg)
488 ch_idx = 0;
489 else if (sdi->channel_groups->next->data == cg)
490 ch_idx = 1;
491 else
492 return SR_ERR_ARG;
0c5f2abc 493 switch (key) {
933defaa
BV
494 case SR_CONF_FILTER:
495 *data = g_variant_new_boolean(devc->filter[ch_idx]);
496 break;
497 case SR_CONF_VDIV:
498 vdiv = vdivs[devc->voltage[ch_idx]];
499 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
500 break;
501 case SR_CONF_COUPLING:
502 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
503 break;
504 }
79917848
BV
505 }
506
507 return SR_OK;
508}
509
dd7a72ea
UH
510static int config_set(uint32_t key, GVariant *data,
511 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
3b533202 512{
269971dd 513 struct dev_context *devc;
697fb6dd 514 int ch_idx, idx;
12f62ce6 515 float flt;
8f996b89 516
269971dd 517 devc = sdi->priv;
933defaa
BV
518 if (!cg) {
519 switch (key) {
520 case SR_CONF_LIMIT_FRAMES:
521 devc->limit_frames = g_variant_get_uint64(data);
522 break;
12f62ce6
PM
523 case SR_CONF_TRIGGER_LEVEL:
524 flt = g_variant_get_double(data);
525 if (flt < 0.0 || flt > 1.0) {
526 sr_err("Trigger level must be in [0.0,1.0].");
527 return SR_ERR_ARG;
528 }
12f62ce6 529 devc->voffset_trigger = flt;
ab8df2b1
UH
530 if (dso_set_voffsets(sdi) != SR_OK)
531 return SR_ERR;
12f62ce6 532 break;
933defaa 533 case SR_CONF_TRIGGER_SLOPE:
697fb6dd 534 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
933defaa 535 return SR_ERR_ARG;
db85496e 536 devc->triggerslope = idx;
933defaa 537 break;
95983cc3 538 case SR_CONF_CAPTURE_RATIO:
04069272 539 devc->capture_ratio = g_variant_get_uint64(data);
933defaa
BV
540 break;
541 case SR_CONF_BUFFERSIZE:
697fb6dd 542 if ((idx = std_u64_idx(data, devc->profile->buffersizes, NUM_BUFFER_SIZES)) < 0)
a9010323 543 return SR_ERR_ARG;
697fb6dd 544 devc->framesize = devc->profile->buffersizes[idx];
933defaa
BV
545 break;
546 case SR_CONF_TIMEBASE:
697fb6dd 547 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(timebases))) < 0)
a9010323 548 return SR_ERR_ARG;
697fb6dd 549 devc->timebase = idx;
933defaa 550 break;
11e33196
PM
551 case SR_CONF_SAMPLERATE:
552 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(samplerates))) < 0)
553 return SR_ERR_ARG;
554 devc->samplerate = samplerates[idx];
555 if (dso_set_trigger_samplerate(sdi) != SR_OK)
556 return SR_ERR;
557 break;
933defaa 558 case SR_CONF_TRIGGER_SOURCE:
697fb6dd 559 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_sources))) < 0)
a9010323 560 return SR_ERR_ARG;
697fb6dd 561 devc->triggersource = g_strdup(trigger_sources[idx]);
933defaa
BV
562 break;
563 default:
a9010323 564 return SR_ERR_NA;
ebb781a6 565 }
933defaa
BV
566 } else {
567 if (sdi->channel_groups->data == cg)
568 ch_idx = 0;
569 else if (sdi->channel_groups->next->data == cg)
570 ch_idx = 1;
571 else
572 return SR_ERR_ARG;
573 switch (key) {
574 case SR_CONF_FILTER:
575 devc->filter[ch_idx] = g_variant_get_boolean(data);
576 break;
577 case SR_CONF_VDIV:
697fb6dd 578 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
a9010323 579 return SR_ERR_ARG;
697fb6dd 580 devc->voltage[ch_idx] = idx;
933defaa
BV
581 break;
582 case SR_CONF_COUPLING:
697fb6dd 583 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
a9010323 584 return SR_ERR_ARG;
697fb6dd 585 devc->coupling[ch_idx] = idx;
933defaa
BV
586 break;
587 default:
a9010323 588 return SR_ERR_NA;
b58fbd99 589 }
3b533202
BV
590 }
591
a9010323 592 return SR_OK;
3b533202
BV
593}
594
dd7a72ea
UH
595static int config_list(uint32_t key, GVariant **data,
596 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 597{
034accb5 598 struct dev_context *devc;
a1c743fc 599
933defaa 600 if (!cg) {
93b118da 601 switch (key) {
e66d1892 602 case SR_CONF_SCAN_OPTIONS:
933defaa 603 case SR_CONF_DEVICE_OPTIONS:
e66d1892 604 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
933defaa
BV
605 case SR_CONF_BUFFERSIZE:
606 if (!sdi)
607 return SR_ERR_ARG;
608 devc = sdi->priv;
105df674 609 *data = std_gvar_array_u64(devc->profile->buffersizes, NUM_BUFFER_SIZES);
933defaa 610 break;
11e33196
PM
611 case SR_CONF_SAMPLERATE:
612 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
613 break;
933defaa 614 case SR_CONF_TIMEBASE:
58ffcf97 615 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(timebases));
933defaa
BV
616 break;
617 case SR_CONF_TRIGGER_SOURCE:
53012da6 618 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_sources));
933defaa
BV
619 break;
620 case SR_CONF_TRIGGER_SLOPE:
53012da6 621 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
933defaa
BV
622 break;
623 default:
624 return SR_ERR_NA;
3973ee26 625 }
933defaa 626 } else {
93b118da 627 switch (key) {
933defaa 628 case SR_CONF_DEVICE_OPTIONS:
53012da6 629 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
933defaa
BV
630 break;
631 case SR_CONF_COUPLING:
53012da6 632 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
933defaa
BV
633 break;
634 case SR_CONF_VDIV:
58ffcf97 635 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(vdivs));
933defaa
BV
636 break;
637 default:
638 return SR_ERR_NA;
3973ee26 639 }
a1c743fc
BV
640 }
641
642 return SR_OK;
643}
644
69e19dd7 645static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 646 int num_samples)
3b533202
BV
647{
648 struct sr_datafeed_packet packet;
ae7d8a58
UH
649 struct sr_datafeed_analog analog;
650 struct sr_analog_encoding encoding;
651 struct sr_analog_meaning meaning;
652 struct sr_analog_spec spec;
417412c8
AJ
653 struct dev_context *devc = sdi->priv;
654 GSList *channels = devc->enabled_channels;
3b533202 655
ae7d8a58 656 packet.type = SR_DF_ANALOG;
3b533202 657 packet.payload = &analog;
6e71ef3b 658 /* TODO: support for 5xxx series 9-bit samples */
ae7d8a58 659 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
e749a8cb 660 analog.num_samples = num_samples;
ae7d8a58
UH
661 analog.meaning->mq = SR_MQ_VOLTAGE;
662 analog.meaning->unit = SR_UNIT_VOLT;
663 analog.meaning->mqflags = 0;
886a52b6 664 /* TODO: Check malloc return value. */
417412c8
AJ
665 analog.data = g_try_malloc(num_samples * sizeof(float));
666
b3fd0993 667 for (int ch = 0; ch < NUM_CHANNELS; ch++) {
417412c8
AJ
668 if (!devc->ch_enabled[ch])
669 continue;
670
671 float range = ((float)vdivs[devc->voltage[ch]][0] / vdivs[devc->voltage[ch]][1]) * 8;
672 float vdivlog = log10f(range / 255);
673 int digits = -(int)vdivlog + (vdivlog < 0.0);
674 analog.encoding->digits = digits;
675 analog.spec->spec_digits = digits;
676 analog.meaning->channels = g_slist_append(NULL, channels->data);
677
678 for (int i = 0; i < num_samples; i++) {
679 /*
680 * The device always sends data for both channels. If a channel
681 * is disabled, it contains a copy of the enabled channel's
682 * data. However, we only send the requested channels to
683 * the bus.
684 *
685 * Voltage values are encoded as a value 0-255 (0-512 on the
686 * DSO-5200*), where the value is a point in the range
687 * represented by the vdiv setting. There are 8 vertical divs,
688 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
689 * and 255 = +2V.
690 */
691 /* TODO: Support for DSO-5xxx series 9-bit samples. */
692 ((float *)analog.data)[i] = range / 255 * *(buf + i * 2 + 1 - ch) - range / 2;
6e71ef3b 693 }
417412c8
AJ
694 sr_session_send(sdi, &packet);
695 g_slist_free(analog.meaning->channels);
696
697 channels = channels->next;
3b533202 698 }
1e6b5b93 699 g_free(analog.data);
e749a8cb
BV
700}
701
e98b7f1b
UH
702/*
703 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 704 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 705 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
706 * the libsigrok session bus.
707 */
55462b8b 708static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb 709{
69e19dd7 710 struct sr_dev_inst *sdi;
269971dd 711 struct dev_context *devc;
e749a8cb
BV
712 int num_samples, pre;
713
69e19dd7
BV
714 sdi = transfer->user_data;
715 devc = sdi->priv;
eb8e6cd2
UH
716 sr_spew("receive_transfer(): status %s received %d bytes.",
717 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
718
719 if (transfer->actual_length == 0)
720 /* Nothing to send to the bus. */
721 return;
722
723 num_samples = transfer->actual_length / 2;
724
d4007311 725 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
d9251a2c 726 devc->samp_received + num_samples, devc->framesize);
e749a8cb 727
e98b7f1b
UH
728 /*
729 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
730 * doesn't represent the trigger point. The offset at which the trigger
731 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
732 * from there up the session bus. The samples in the frame buffer
733 * before that trigger point came after the end of the device's frame
734 * buffer was reached, and it wrapped around to overwrite up until the
735 * trigger point.
e749a8cb 736 */
269971dd 737 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 738 /* Trigger point not yet reached. */
269971dd 739 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 740 /* The entire chunk is before the trigger point. */
269971dd 741 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 742 transfer->buffer, num_samples * 2);
269971dd 743 devc->samp_buffered += num_samples;
e749a8cb 744 } else {
e98b7f1b
UH
745 /*
746 * This chunk hits or overruns the trigger point.
e749a8cb 747 * Store the part before the trigger fired, and
e98b7f1b
UH
748 * send the rest up to the session bus.
749 */
269971dd
BV
750 pre = devc->trigger_offset - devc->samp_received;
751 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 752 transfer->buffer, pre * 2);
269971dd 753 devc->samp_buffered += pre;
e749a8cb
BV
754
755 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 756 sr_dbg("Reached trigger point, %d samples buffered.",
d9251a2c 757 devc->samp_buffered);
e749a8cb
BV
758
759 /* Avoid the corner case where the chunk ended at
760 * exactly the trigger point. */
761 if (num_samples > pre)
69e19dd7 762 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
763 num_samples - pre);
764 }
765 } else {
766 /* Already past the trigger point, just send it all out. */
a95f142e 767 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
768 }
769
269971dd 770 devc->samp_received += num_samples;
e749a8cb
BV
771
772 /* Everything in this transfer was either copied to the buffer or
773 * sent to the session bus. */
3b533202
BV
774 g_free(transfer->buffer);
775 libusb_free_transfer(transfer);
3b533202 776
269971dd 777 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
778 /* That was the last chunk in this frame. Send the buffered
779 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 780 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
d9251a2c 781 devc->samp_buffered);
69e19dd7 782 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
16a1dca4
PM
783 g_free(devc->framebuf);
784 devc->framebuf = NULL;
e749a8cb
BV
785
786 /* Mark the end of this frame. */
4c5f7006 787 std_session_send_df_frame_end(sdi);
ae88b97b 788
8f484ca7 789 if (devc->limit_frames && ++devc->num_frames >= devc->limit_frames) {
ae88b97b 790 /* Terminate session */
a3508e33 791 devc->dev_state = STOPPING;
ae88b97b 792 } else {
269971dd 793 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
794 }
795 }
3b533202
BV
796}
797
798static int handle_event(int fd, int revents, void *cb_data)
799{
a3508e33 800 const struct sr_dev_inst *sdi;
3b533202 801 struct timeval tv;
4f840ce9 802 struct sr_dev_driver *di;
269971dd 803 struct dev_context *devc;
4f840ce9 804 struct drv_context *drvc;
ba7dd8bb 805 int num_channels;
6e6eeff4
BV
806 uint32_t trigger_offset;
807 uint8_t capturestate;
3b533202 808
3b533202
BV
809 (void)fd;
810 (void)revents;
811
269971dd 812 sdi = cb_data;
4f840ce9 813 di = sdi->driver;
41812aca 814 drvc = di->context;
269971dd 815 devc = sdi->priv;
a3508e33
BV
816 if (devc->dev_state == STOPPING) {
817 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
818 sr_dbg("Stopping acquisition.");
819 /*
820 * TODO: Doesn't really cancel pending transfers so they might
821 * come in after SR_DF_END is sent.
822 */
102f1239 823 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 824
bee2b016 825 std_session_send_df_end(sdi);
a3508e33
BV
826
827 devc->dev_state = IDLE;
828
829 return TRUE;
830 }
831
3b533202
BV
832 /* Always handle pending libusb events. */
833 tv.tv_sec = tv.tv_usec = 0;
d4abb463 834 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 835
3b533202 836 /* TODO: ugh */
269971dd 837 if (devc->dev_state == NEW_CAPTURE) {
c118080b 838 if (dso_capture_start(sdi) != SR_OK)
3b533202 839 return TRUE;
c118080b 840 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 841 return TRUE;
c118080b 842// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 843// return TRUE;
e98b7f1b 844 sr_dbg("Successfully requested next chunk.");
269971dd 845 devc->dev_state = CAPTURE;
3b533202
BV
846 return TRUE;
847 }
269971dd 848 if (devc->dev_state != CAPTURE)
3b533202
BV
849 return TRUE;
850
c118080b 851 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 852 return TRUE;
3b533202 853
e98b7f1b
UH
854 sr_dbg("Capturestate %d.", capturestate);
855 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
856 switch (capturestate) {
857 case CAPTURE_EMPTY:
269971dd
BV
858 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
859 devc->capture_empty_count = 0;
c118080b 860 if (dso_capture_start(sdi) != SR_OK)
3b533202 861 break;
c118080b 862 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 863 break;
c118080b 864// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 865// break;
e98b7f1b 866 sr_dbg("Successfully requested next chunk.");
3b533202
BV
867 }
868 break;
869 case CAPTURE_FILLING:
e98b7f1b 870 /* No data yet. */
3b533202
BV
871 break;
872 case CAPTURE_READY_8BIT:
ab8df2b1 873 case CAPTURE_READY_2250:
e749a8cb 874 /* Remember where in the captured frame the trigger is. */
269971dd 875 devc->trigger_offset = trigger_offset;
e749a8cb 876
417412c8 877 num_channels = (devc->ch_enabled[0] && devc->ch_enabled[1]) ? 2 : 1;
a95f142e 878 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 879 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 880
3b533202 881 /* Tell the scope to send us the first frame. */
69e19dd7 882 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 883 break;
ae88b97b 884
e98b7f1b
UH
885 /*
886 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
887 * the data we just told the scope to send.
888 */
269971dd 889 devc->dev_state = FETCH_DATA;
ae88b97b
BV
890
891 /* Tell the frontend a new frame is on the way. */
4c5f7006 892 std_session_send_df_frame_begin(sdi);
3b533202
BV
893 break;
894 case CAPTURE_READY_9BIT:
895 /* TODO */
e98b7f1b 896 sr_err("Not yet supported.");
3b533202
BV
897 break;
898 case CAPTURE_TIMEOUT:
899 /* Doesn't matter, we'll try again next time. */
900 break;
901 default:
e98b7f1b
UH
902 sr_dbg("Unknown capture state: %d.", capturestate);
903 break;
3b533202
BV
904 }
905
906 return TRUE;
907}
908
695dc859 909static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 910{
269971dd 911 struct dev_context *devc;
4f840ce9 912 struct sr_dev_driver *di = sdi->driver;
41812aca 913 struct drv_context *drvc = di->context;
3b533202 914
269971dd 915 devc = sdi->priv;
3b533202 916
ba7dd8bb
UH
917 if (configure_channels(sdi) != SR_OK) {
918 sr_err("Failed to configure channels.");
014359e3
BV
919 return SR_ERR;
920 }
921
c118080b 922 if (dso_init(sdi) != SR_OK)
3b533202
BV
923 return SR_ERR;
924
c118080b 925 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
926 return SR_ERR;
927
269971dd 928 devc->dev_state = CAPTURE;
102f1239 929 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 930
bee2b016 931 std_session_send_df_header(sdi);
3b533202 932
3b533202
BV
933 return SR_OK;
934}
935
695dc859 936static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 937{
269971dd
BV
938 struct dev_context *devc;
939
a3508e33
BV
940 devc = sdi->priv;
941 devc->dev_state = STOPPING;
8f484ca7 942 devc->num_frames = 0;
3b533202
BV
943
944 return SR_OK;
945}
946
dd5c48a6 947static struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
948 .name = "hantek-dso",
949 .longname = "Hantek DSO",
950 .api_version = 1,
c2fdcc25 951 .init = std_init,
700d6b64 952 .cleanup = std_cleanup,
6078d2c9 953 .scan = scan,
c01bf34c 954 .dev_list = std_dev_list,
3b412e3a 955 .dev_clear = dev_clear,
79917848 956 .config_get = config_get,
035a1078 957 .config_set = config_set,
a1c743fc 958 .config_list = config_list,
6078d2c9
UH
959 .dev_open = dev_open,
960 .dev_close = dev_close,
961 .dev_acquisition_start = dev_acquisition_start,
962 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 963 .context = NULL,
3b533202 964};
dd5c48a6 965SR_REGISTER_DEV_DRIVER(hantek_dso_driver_info);