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Consistency and whitespace fixes for switch statements.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
584560f1 43static const uint32_t scanopts[] = {
624f5b4c
BV
44 SR_CONF_CONN,
45};
46
5ecd9049 47static const uint32_t drvopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
933defaa
BV
49};
50
5ecd9049
BV
51static const uint32_t devopts[] = {
52 SR_CONF_CONTINUOUS | SR_CONF_SET,
53 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
54 SR_CONF_CONN | SR_CONF_GET,
55 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
57 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
58 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 61 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
62};
63
933defaa
BV
64static const uint32_t devopts_cg[] = {
65 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
66 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
67 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
68};
69
ba7dd8bb 70static const char *channel_names[] = {
78693401 71 "CH1", "CH2",
3b533202
BV
72 NULL,
73};
74
034accb5
BV
75static const uint64_t buffersizes_32k[] = {
76 10240, 32768,
77};
78static const uint64_t buffersizes_512k[] = {
79 10240, 524288,
80};
81static const uint64_t buffersizes_14k[] = {
82 10240, 14336,
83};
84
62bb8840 85static const struct dso_profile dev_profiles[] = {
88a13f30 86 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 87 "Hantek", "DSO-2090",
034accb5 88 buffersizes_32k,
7b78b2f7 89 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
90 { 0x04b4, 0x2150, 0x04b5, 0x2150,
91 "Hantek", "DSO-2150",
034accb5 92 buffersizes_32k,
7b78b2f7 93 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
94 { 0x04b4, 0x2250, 0x04b5, 0x2250,
95 "Hantek", "DSO-2250",
034accb5 96 buffersizes_512k,
7b78b2f7 97 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
98 { 0x04b4, 0x5200, 0x04b5, 0x5200,
99 "Hantek", "DSO-5200",
034accb5 100 buffersizes_14k,
7b78b2f7 101 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
102 { 0x04b4, 0x520a, 0x04b5, 0x520a,
103 "Hantek", "DSO-5200A",
034accb5 104 buffersizes_512k,
7b78b2f7 105 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 106 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
107};
108
86bb3f4a 109static const uint64_t timebases[][2] = {
a370ef19
BV
110 /* microseconds */
111 { 10, 1000000 },
112 { 20, 1000000 },
113 { 40, 1000000 },
114 { 100, 1000000 },
115 { 200, 1000000 },
116 { 400, 1000000 },
117 /* milliseconds */
118 { 1, 1000 },
119 { 2, 1000 },
120 { 4, 1000 },
121 { 10, 1000 },
122 { 20, 1000 },
123 { 40, 1000 },
124 { 100, 1000 },
125 { 200, 1000 },
126 { 400, 1000 },
a370ef19
BV
127};
128
86bb3f4a 129static const uint64_t vdivs[][2] = {
313deed2
BV
130 /* millivolts */
131 { 10, 1000 },
132 { 20, 1000 },
133 { 50, 1000 },
134 { 100, 1000 },
135 { 200, 1000 },
136 { 500, 1000 },
137 /* volts */
138 { 1, 1 },
139 { 2, 1 },
140 { 5, 1 },
313deed2
BV
141};
142
62bb8840 143static const char *trigger_sources[] = {
a370ef19
BV
144 "CH1",
145 "CH2",
146 "EXT",
88a13f30 147 /* TODO: forced */
a370ef19 148};
3b533202 149
933defaa
BV
150static const char *trigger_slopes[] = {
151 "r",
152 "f",
ebb781a6
BV
153};
154
62bb8840 155static const char *coupling[] = {
b58fbd99
BV
156 "AC",
157 "DC",
158 "GND",
b58fbd99
BV
159};
160
982947f7 161SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
e98b7f1b 162
6078d2c9 163static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 164
395206f4 165static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
166{
167 struct sr_dev_inst *sdi;
ba7dd8bb 168 struct sr_channel *ch;
933defaa 169 struct sr_channel_group *cg;
269971dd
BV
170 struct drv_context *drvc;
171 struct dev_context *devc;
dcd438ee 172 unsigned int i;
3b533202 173
aac29cc1 174 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
175 sdi->status = SR_ST_INITIALIZING;
176 sdi->vendor = g_strdup(prof->vendor);
177 sdi->model = g_strdup(prof->model);
4f840ce9 178 sdi->driver = &hantek_dso_driver_info;
3b533202 179
e98b7f1b 180 /*
ba7dd8bb 181 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
182 * a trigger source internal to the device.
183 */
ba7dd8bb 184 for (i = 0; channel_names[i]; i++) {
5e23fcab 185 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
186 cg = g_malloc0(sizeof(struct sr_channel_group));
187 cg->name = g_strdup(channel_names[i]);
188 cg->channels = g_slist_append(cg->channels, ch);
189 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
190 }
191
933defaa 192 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
193 devc->profile = prof;
194 devc->dev_state = IDLE;
195 devc->timebase = DEFAULT_TIMEBASE;
196 devc->ch1_enabled = TRUE;
197 devc->ch2_enabled = TRUE;
933defaa
BV
198 devc->voltage[0] = DEFAULT_VOLTAGE;
199 devc->voltage[1] = DEFAULT_VOLTAGE;
200 devc->coupling[0] = DEFAULT_COUPLING;
201 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
202 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
203 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
204 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
205 devc->framesize = DEFAULT_FRAMESIZE;
206 devc->triggerslope = SLOPE_POSITIVE;
207 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
208 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
209 sdi->priv = devc;
4f840ce9 210 drvc = hantek_dso_driver_info.priv;
269971dd 211 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
212
213 return sdi;
214}
215
ba7dd8bb 216static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 217{
014359e3 218 struct dev_context *devc;
ba7dd8bb 219 struct sr_channel *ch;
62bb8840 220 const GSList *l;
69e19dd7 221 int p;
3b533202 222
014359e3
BV
223 devc = sdi->priv;
224
ba7dd8bb 225 g_slist_free(devc->enabled_channels);
269971dd 226 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
227 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
228 ch = l->data;
69e19dd7 229 if (p == 0)
ba7dd8bb 230 devc->ch1_enabled = ch->enabled;
69e19dd7 231 else
ba7dd8bb
UH
232 devc->ch2_enabled = ch->enabled;
233 if (ch->enabled)
234 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
235 }
236
237 return SR_OK;
238}
239
949b3dc0 240static void clear_dev_context(void *priv)
39cfdd75 241{
269971dd 242 struct dev_context *devc;
39cfdd75 243
949b3dc0
BV
244 devc = priv;
245 g_free(devc->triggersource);
ba7dd8bb 246 g_slist_free(devc->enabled_channels);
39cfdd75 247
949b3dc0 248}
39cfdd75 249
4f840ce9 250static int dev_clear(const struct sr_dev_driver *di)
949b3dc0
BV
251{
252 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
253}
254
4f840ce9 255static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
61136ea6 256{
f6beaac5 257 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
258}
259
4f840ce9 260static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 261{
269971dd
BV
262 struct drv_context *drvc;
263 struct dev_context *devc;
294dbac7 264 struct sr_dev_inst *sdi;
46a743c1
BV
265 struct sr_usb_dev_inst *usb;
266 struct sr_config *src;
294dbac7
BV
267 const struct dso_profile *prof;
268 GSList *l, *devices, *conn_devices;
39cfdd75 269 struct libusb_device_descriptor des;
3b533202 270 libusb_device **devlist;
395206f4 271 int ret, i, j;
46a743c1 272 const char *conn;
395206f4 273 char connection_id[64];
e98b7f1b 274
a873c594 275 drvc = di->priv;
39cfdd75 276
4b97c74e
UH
277 devices = 0;
278
294dbac7
BV
279 conn = NULL;
280 for (l = options; l; l = l->next) {
281 src = l->data;
282 if (src->key == SR_CONF_CONN) {
283 conn = g_variant_get_string(src->data, NULL);
284 break;
285 }
286 }
287 if (conn)
288 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
289 else
290 conn_devices = NULL;
291
39cfdd75 292 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 293 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 294 for (i = 0; devlist[i]; i++) {
46a743c1 295 if (conn) {
294dbac7
BV
296 usb = NULL;
297 for (l = conn_devices; l; l = l->next) {
298 usb = l->data;
299 if (usb->bus == libusb_get_bus_number(devlist[i])
300 && usb->address == libusb_get_device_address(devlist[i]))
301 break;
302 }
303 if (!l)
304 /* This device matched none of the ones that
305 * matched the conn specification. */
306 continue;
46a743c1 307 }
294dbac7 308
61136ea6 309 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71 310 sr_err("Failed to get device descriptor: %s.",
46a743c1 311 libusb_error_name(ret));
3b533202
BV
312 continue;
313 }
314
395206f4
SA
315 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
316
3b533202
BV
317 prof = NULL;
318 for (j = 0; dev_profiles[j].orig_vid; j++) {
319 if (des.idVendor == dev_profiles[j].orig_vid
320 && des.idProduct == dev_profiles[j].orig_pid) {
321 /* Device matches the pre-firmware profile. */
322 prof = &dev_profiles[j];
e98b7f1b 323 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
324 sdi = dso_dev_new(prof);
325 sdi->connection_id = g_strdup(connection_id);
39cfdd75 326 devices = g_slist_append(devices, sdi);
269971dd 327 devc = sdi->priv;
3b533202
BV
328 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
329 prof->firmware) == SR_OK)
330 /* Remember when the firmware on this device was updated */
269971dd 331 devc->fw_updated = g_get_monotonic_time();
3b533202 332 else
395206f4 333 sr_err("Firmware upload failed");
3b533202 334 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 335 sdi->conn = sr_usb_dev_inst_new(
3b533202 336 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
337 break;
338 } else if (des.idVendor == dev_profiles[j].fw_vid
339 && des.idProduct == dev_profiles[j].fw_pid) {
340 /* Device matches the post-firmware profile. */
341 prof = &dev_profiles[j];
e98b7f1b 342 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
343 sdi = dso_dev_new(prof);
344 sdi->connection_id = g_strdup(connection_id);
3b533202 345 sdi->status = SR_ST_INACTIVE;
39cfdd75 346 devices = g_slist_append(devices, sdi);
d0eec1ee 347 sdi->inst_type = SR_INST_USB;
c118080b 348 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
349 libusb_get_bus_number(devlist[i]),
350 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
351 break;
352 }
353 }
354 if (!prof)
355 /* not a supported VID/PID */
356 continue;
357 }
358 libusb_free_device_list(devlist, 1);
359
39cfdd75 360 return devices;
3b533202
BV
361}
362
4f840ce9 363static GSList *dev_list(const struct sr_dev_driver *di)
811deee4 364{
0e94d524 365 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
366}
367
6078d2c9 368static int dev_open(struct sr_dev_inst *sdi)
3b533202 369{
269971dd 370 struct dev_context *devc;
c118080b 371 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
372 int64_t timediff_us, timediff_ms;
373 int err;
3b533202 374
269971dd 375 devc = sdi->priv;
c118080b 376 usb = sdi->conn;
3b533202
BV
377
378 /*
e98b7f1b
UH
379 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
380 * for the FX2 to renumerate.
3b533202 381 */
fc8fe3e3 382 err = SR_ERR;
269971dd 383 if (devc->fw_updated > 0) {
e98b7f1b
UH
384 sr_info("Waiting for device to reset.");
385 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 386 g_usleep(300 * 1000);
fc8fe3e3
BV
387 timediff_ms = 0;
388 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 389 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
390 break;
391 g_usleep(100 * 1000);
269971dd 392 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 393 timediff_ms = timediff_us / 1000;
e98b7f1b 394 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 395 }
e98b7f1b 396 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 397 } else {
25a0f108 398 err = dso_open(sdi);
3b533202
BV
399 }
400
401 if (err != SR_OK) {
e98b7f1b 402 sr_err("Unable to open device.");
3b533202
BV
403 return SR_ERR;
404 }
405
c118080b 406 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 407 if (err != 0) {
d4928d71 408 sr_err("Unable to claim interface: %s.",
46a743c1 409 libusb_error_name(err));
3b533202
BV
410 return SR_ERR;
411 }
412
413 return SR_OK;
414}
415
6078d2c9 416static int dev_close(struct sr_dev_inst *sdi)
3b533202 417{
3b533202
BV
418 dso_close(sdi);
419
420 return SR_OK;
421}
422
4f840ce9 423static int cleanup(const struct sr_dev_driver *di)
3b533202 424{
4f840ce9 425 return dev_clear(di);
3b533202
BV
426}
427
584560f1 428static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 429 const struct sr_channel_group *cg)
79917848 430{
933defaa 431 struct dev_context *devc;
624f5b4c 432 struct sr_usb_dev_inst *usb;
933defaa
BV
433 char str[128], *s;
434 const uint64_t *vdiv;
435 int ch_idx;
79917848 436
584560f1 437 switch (key) {
bf622e6d 438 case SR_CONF_NUM_HDIV:
79917848
BV
439 *data = g_variant_new_int32(NUM_TIMEBASE);
440 break;
441 case SR_CONF_NUM_VDIV:
442 *data = g_variant_new_int32(NUM_VDIV);
443 break;
933defaa
BV
444 }
445
446 if (!sdi)
447 return SR_ERR_ARG;
448
449 devc = sdi->priv;
450 if (!cg) {
451 switch (key) {
452 case SR_CONF_CONN:
453 if (!sdi->conn)
454 return SR_ERR_ARG;
455 usb = sdi->conn;
456 if (usb->address == 255)
457 /* Device still needs to re-enumerate after firmware
458 * upload, so we don't know its (future) address. */
459 return SR_ERR;
460 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
461 *data = g_variant_new_string(str);
462 break;
463 case SR_CONF_TIMEBASE:
464 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
465 timebases[devc->timebase][1]);
466 break;
467 case SR_CONF_BUFFERSIZE:
468 *data = g_variant_new_uint64(devc->framesize);
469 break;
470 case SR_CONF_TRIGGER_SOURCE:
471 *data = g_variant_new_string(devc->triggersource);
472 break;
473 case SR_CONF_TRIGGER_SLOPE:
474 if (devc->triggerslope == SLOPE_POSITIVE)
475 s = "r";
476 else
477 s = "f";
478 *data = g_variant_new_string(s);
479 break;
480 case SR_CONF_HORIZ_TRIGGERPOS:
481 *data = g_variant_new_double(devc->triggerposition);
482 break;
483 default:
484 return SR_ERR_NA;
485 }
486 } else {
487 if (sdi->channel_groups->data == cg)
488 ch_idx = 0;
489 else if (sdi->channel_groups->next->data == cg)
490 ch_idx = 1;
491 else
492 return SR_ERR_ARG;
0c5f2abc 493 switch (key) {
933defaa
BV
494 case SR_CONF_FILTER:
495 *data = g_variant_new_boolean(devc->filter[ch_idx]);
496 break;
497 case SR_CONF_VDIV:
498 vdiv = vdivs[devc->voltage[ch_idx]];
499 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
500 break;
501 case SR_CONF_COUPLING:
502 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
503 break;
504 }
79917848
BV
505 }
506
507 return SR_OK;
508}
509
584560f1 510static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 511 const struct sr_channel_group *cg)
3b533202 512{
269971dd 513 struct dev_context *devc;
f627afd6 514 double tmp_double;
86bb3f4a 515 uint64_t tmp_u64, p, q;
933defaa 516 int tmp_int, ch_idx, ret;
f627afd6
BV
517 unsigned int i;
518 const char *tmp_str;
8f996b89 519
3b533202 520 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 521 return SR_ERR_DEV_CLOSED;
3b533202 522
a370ef19 523 ret = SR_OK;
269971dd 524 devc = sdi->priv;
933defaa
BV
525 if (!cg) {
526 switch (key) {
527 case SR_CONF_LIMIT_FRAMES:
528 devc->limit_frames = g_variant_get_uint64(data);
529 break;
530 case SR_CONF_TRIGGER_SLOPE:
531 tmp_str = g_variant_get_string(data, NULL);
532 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
533 return SR_ERR_ARG;
534 devc->triggerslope = (tmp_str[0] == 'r')
535 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
536 break;
537 case SR_CONF_HORIZ_TRIGGERPOS:
538 tmp_double = g_variant_get_double(data);
539 if (tmp_double < 0.0 || tmp_double > 1.0) {
540 sr_err("Trigger position should be between 0.0 and 1.0.");
541 ret = SR_ERR_ARG;
542 } else
543 devc->triggerposition = tmp_double;
544 break;
545 case SR_CONF_BUFFERSIZE:
546 tmp_u64 = g_variant_get_uint64(data);
547 for (i = 0; i < 2; i++) {
548 if (devc->profile->buffersizes[i] == tmp_u64) {
549 devc->framesize = tmp_u64;
550 break;
551 }
a370ef19 552 }
933defaa
BV
553 if (i == 2)
554 ret = SR_ERR_ARG;
555 break;
556 case SR_CONF_TIMEBASE:
557 g_variant_get(data, "(tt)", &p, &q);
558 tmp_int = -1;
559 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
560 if (timebases[i][0] == p && timebases[i][1] == q) {
561 tmp_int = i;
562 break;
563 }
a370ef19 564 }
933defaa
BV
565 if (tmp_int >= 0)
566 devc->timebase = tmp_int;
567 else
ebb781a6 568 ret = SR_ERR_ARG;
933defaa
BV
569 break;
570 case SR_CONF_TRIGGER_SOURCE:
571 tmp_str = g_variant_get_string(data, NULL);
572 for (i = 0; trigger_sources[i]; i++) {
573 if (!strcmp(tmp_str, trigger_sources[i])) {
574 devc->triggersource = g_strdup(tmp_str);
575 break;
576 }
ebb781a6 577 }
933defaa
BV
578 if (trigger_sources[i] == 0)
579 ret = SR_ERR_ARG;
580 break;
581 default:
582 ret = SR_ERR_NA;
583 break;
ebb781a6 584 }
933defaa
BV
585 } else {
586 if (sdi->channel_groups->data == cg)
587 ch_idx = 0;
588 else if (sdi->channel_groups->next->data == cg)
589 ch_idx = 1;
590 else
591 return SR_ERR_ARG;
592 switch (key) {
593 case SR_CONF_FILTER:
594 devc->filter[ch_idx] = g_variant_get_boolean(data);
595 break;
596 case SR_CONF_VDIV:
597 g_variant_get(data, "(tt)", &p, &q);
598 tmp_int = -1;
599 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
600 if (vdivs[i][0] == p && vdivs[i][1] == q) {
601 tmp_int = i;
602 break;
603 }
313deed2 604 }
933defaa
BV
605 if (tmp_int >= 0) {
606 devc->voltage[ch_idx] = tmp_int;
607 } else
608 ret = SR_ERR_ARG;
609 break;
610 case SR_CONF_COUPLING:
611 tmp_str = g_variant_get_string(data, NULL);
612 for (i = 0; coupling[i]; i++) {
613 if (!strcmp(tmp_str, coupling[i])) {
614 devc->coupling[ch_idx] = i;
615 break;
616 }
b58fbd99 617 }
933defaa
BV
618 if (coupling[i] == 0)
619 ret = SR_ERR_ARG;
620 break;
621 default:
622 ret = SR_ERR_NA;
623 break;
b58fbd99 624 }
3b533202
BV
625 }
626
627 return ret;
628}
629
584560f1 630static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 631 const struct sr_channel_group *cg)
a1c743fc 632{
034accb5 633 struct dev_context *devc;
3973ee26
BV
634 GVariant *tuple, *rational[2];
635 GVariantBuilder gvb;
636 unsigned int i;
a1c743fc 637
933defaa 638 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
639 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
640 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
641 return SR_OK;
642 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 643 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 644 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
645 return SR_OK;
646 }
647
648 if (!sdi)
649 return SR_ERR_ARG;
650
651 if (!cg) {
93b118da 652 switch (key) {
933defaa
BV
653 case SR_CONF_DEVICE_OPTIONS:
654 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 655 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
656 break;
657 case SR_CONF_BUFFERSIZE:
658 if (!sdi)
659 return SR_ERR_ARG;
660 devc = sdi->priv;
661 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
662 devc->profile->buffersizes, 2, sizeof(uint64_t));
663 break;
664 case SR_CONF_TIMEBASE:
665 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
666 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
667 rational[0] = g_variant_new_uint64(timebases[i][0]);
668 rational[1] = g_variant_new_uint64(timebases[i][1]);
669 tuple = g_variant_new_tuple(rational, 2);
670 g_variant_builder_add_value(&gvb, tuple);
671 }
672 *data = g_variant_builder_end(&gvb);
673 break;
674 case SR_CONF_TRIGGER_SOURCE:
675 *data = g_variant_new_strv(trigger_sources,
676 ARRAY_SIZE(trigger_sources));
677 break;
678 case SR_CONF_TRIGGER_SLOPE:
679 *data = g_variant_new_strv(trigger_slopes,
680 ARRAY_SIZE(trigger_slopes));
681 break;
682 default:
683 return SR_ERR_NA;
3973ee26 684 }
933defaa 685 } else {
93b118da 686 switch (key) {
933defaa
BV
687 case SR_CONF_DEVICE_OPTIONS:
688 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
689 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
690 break;
691 case SR_CONF_COUPLING:
692 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
693 break;
694 case SR_CONF_VDIV:
695 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
696 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
697 rational[0] = g_variant_new_uint64(vdivs[i][0]);
698 rational[1] = g_variant_new_uint64(vdivs[i][1]);
699 tuple = g_variant_new_tuple(rational, 2);
700 g_variant_builder_add_value(&gvb, tuple);
701 }
702 *data = g_variant_builder_end(&gvb);
703 break;
704 default:
705 return SR_ERR_NA;
3973ee26 706 }
a1c743fc
BV
707 }
708
709 return SR_OK;
710}
711
69e19dd7 712static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 713 int num_samples)
3b533202
BV
714{
715 struct sr_datafeed_packet packet;
716 struct sr_datafeed_analog analog;
69e19dd7 717 struct dev_context *devc;
c5841b28 718 float ch1, ch2, range;
ba7dd8bb 719 int num_channels, data_offset, i;
3b533202 720
69e19dd7 721 devc = sdi->priv;
ba7dd8bb 722 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
723 packet.type = SR_DF_ANALOG;
724 packet.payload = &analog;
6e71ef3b 725 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 726 analog.channels = devc->enabled_channels;
e749a8cb 727 analog.num_samples = num_samples;
9956f285
UH
728 analog.mq = SR_MQ_VOLTAGE;
729 analog.unit = SR_UNIT_VOLT;
cf49d66b 730 analog.mqflags = 0;
886a52b6 731 /* TODO: Check malloc return value. */
ba7dd8bb 732 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 733 data_offset = 0;
3b533202 734 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
735 /*
736 * The device always sends data for both channels. If a channel
6e71ef3b 737 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
738 * data. However, we only send the requested channels to
739 * the bus.
c5841b28 740 *
e98b7f1b
UH
741 * Voltage values are encoded as a value 0-255 (0-512 on the
742 * DSO-5200*), where the value is a point in the range
743 * represented by the vdiv setting. There are 8 vertical divs,
744 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
745 * and 255 = +2V.
6e71ef3b 746 */
e98b7f1b 747 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 748 if (devc->ch1_enabled) {
933defaa 749 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 750 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
751 /* Value is centered around 0V. */
752 ch1 -= range / 2;
6e71ef3b
BV
753 analog.data[data_offset++] = ch1;
754 }
269971dd 755 if (devc->ch2_enabled) {
933defaa 756 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 757 ch2 = range / 255 * *(buf + i * 2);
c5841b28 758 ch2 -= range / 2;
6e71ef3b
BV
759 analog.data[data_offset++] = ch2;
760 }
3b533202 761 }
269971dd 762 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
763}
764
e98b7f1b
UH
765/*
766 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 767 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 768 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
769 * the libsigrok session bus.
770 */
771static void receive_transfer(struct libusb_transfer *transfer)
772{
773 struct sr_datafeed_packet packet;
69e19dd7 774 struct sr_dev_inst *sdi;
269971dd 775 struct dev_context *devc;
e749a8cb
BV
776 int num_samples, pre;
777
69e19dd7
BV
778 sdi = transfer->user_data;
779 devc = sdi->priv;
d4007311 780 sr_spew("receive_transfer(): status %d received %d bytes.",
46a743c1 781 transfer->status, transfer->actual_length);
e749a8cb
BV
782
783 if (transfer->actual_length == 0)
784 /* Nothing to send to the bus. */
785 return;
786
787 num_samples = transfer->actual_length / 2;
788
d4007311 789 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 790 devc->samp_received + num_samples, devc->framesize);
e749a8cb 791
e98b7f1b
UH
792 /*
793 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
794 * doesn't represent the trigger point. The offset at which the trigger
795 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
796 * from there up the session bus. The samples in the frame buffer
797 * before that trigger point came after the end of the device's frame
798 * buffer was reached, and it wrapped around to overwrite up until the
799 * trigger point.
e749a8cb 800 */
269971dd 801 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 802 /* Trigger point not yet reached. */
269971dd 803 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 804 /* The entire chunk is before the trigger point. */
269971dd 805 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 806 transfer->buffer, num_samples * 2);
269971dd 807 devc->samp_buffered += num_samples;
e749a8cb 808 } else {
e98b7f1b
UH
809 /*
810 * This chunk hits or overruns the trigger point.
e749a8cb 811 * Store the part before the trigger fired, and
e98b7f1b
UH
812 * send the rest up to the session bus.
813 */
269971dd
BV
814 pre = devc->trigger_offset - devc->samp_received;
815 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 816 transfer->buffer, pre * 2);
269971dd 817 devc->samp_buffered += pre;
e749a8cb
BV
818
819 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 820 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 821 devc->samp_buffered);
e749a8cb
BV
822
823 /* Avoid the corner case where the chunk ended at
824 * exactly the trigger point. */
825 if (num_samples > pre)
69e19dd7 826 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
827 num_samples - pre);
828 }
829 } else {
830 /* Already past the trigger point, just send it all out. */
69e19dd7 831 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
832 num_samples);
833 }
834
269971dd 835 devc->samp_received += num_samples;
e749a8cb
BV
836
837 /* Everything in this transfer was either copied to the buffer or
838 * sent to the session bus. */
3b533202
BV
839 g_free(transfer->buffer);
840 libusb_free_transfer(transfer);
3b533202 841
269971dd 842 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
843 /* That was the last chunk in this frame. Send the buffered
844 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 845 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 846 devc->samp_buffered);
69e19dd7 847 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
848
849 /* Mark the end of this frame. */
ae88b97b 850 packet.type = SR_DF_FRAME_END;
269971dd 851 sr_session_send(devc->cb_data, &packet);
ae88b97b 852
269971dd 853 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 854 /* Terminate session */
a3508e33 855 devc->dev_state = STOPPING;
ae88b97b 856 } else {
269971dd 857 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
858 }
859 }
3b533202
BV
860}
861
862static int handle_event(int fd, int revents, void *cb_data)
863{
a3508e33 864 const struct sr_dev_inst *sdi;
ae88b97b 865 struct sr_datafeed_packet packet;
3b533202 866 struct timeval tv;
4f840ce9 867 struct sr_dev_driver *di;
269971dd 868 struct dev_context *devc;
4f840ce9 869 struct drv_context *drvc;
ba7dd8bb 870 int num_channels;
6e6eeff4
BV
871 uint32_t trigger_offset;
872 uint8_t capturestate;
3b533202 873
3b533202
BV
874 (void)fd;
875 (void)revents;
876
269971dd 877 sdi = cb_data;
4f840ce9
ML
878 di = sdi->driver;
879 drvc = di->priv;
269971dd 880 devc = sdi->priv;
a3508e33
BV
881 if (devc->dev_state == STOPPING) {
882 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
883 sr_dbg("Stopping acquisition.");
884 /*
885 * TODO: Doesn't really cancel pending transfers so they might
886 * come in after SR_DF_END is sent.
887 */
102f1239 888 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33
BV
889
890 packet.type = SR_DF_END;
891 sr_session_send(sdi, &packet);
892
893 devc->dev_state = IDLE;
894
895 return TRUE;
896 }
897
3b533202
BV
898 /* Always handle pending libusb events. */
899 tv.tv_sec = tv.tv_usec = 0;
d4abb463 900 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 901
3b533202 902 /* TODO: ugh */
269971dd 903 if (devc->dev_state == NEW_CAPTURE) {
c118080b 904 if (dso_capture_start(sdi) != SR_OK)
3b533202 905 return TRUE;
c118080b 906 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 907 return TRUE;
c118080b 908// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 909// return TRUE;
e98b7f1b 910 sr_dbg("Successfully requested next chunk.");
269971dd 911 devc->dev_state = CAPTURE;
3b533202
BV
912 return TRUE;
913 }
269971dd 914 if (devc->dev_state != CAPTURE)
3b533202
BV
915 return TRUE;
916
c118080b 917 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 918 return TRUE;
3b533202 919
e98b7f1b
UH
920 sr_dbg("Capturestate %d.", capturestate);
921 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
922 switch (capturestate) {
923 case CAPTURE_EMPTY:
269971dd
BV
924 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
925 devc->capture_empty_count = 0;
c118080b 926 if (dso_capture_start(sdi) != SR_OK)
3b533202 927 break;
c118080b 928 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 929 break;
c118080b 930// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 931// break;
e98b7f1b 932 sr_dbg("Successfully requested next chunk.");
3b533202
BV
933 }
934 break;
935 case CAPTURE_FILLING:
e98b7f1b 936 /* No data yet. */
3b533202
BV
937 break;
938 case CAPTURE_READY_8BIT:
e749a8cb 939 /* Remember where in the captured frame the trigger is. */
269971dd 940 devc->trigger_offset = trigger_offset;
e749a8cb 941
ba7dd8bb 942 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 943 /* TODO: Check malloc return value. */
ba7dd8bb 944 devc->framebuf = g_try_malloc(devc->framesize * num_channels * 2);
269971dd 945 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 946
3b533202 947 /* Tell the scope to send us the first frame. */
69e19dd7 948 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 949 break;
ae88b97b 950
e98b7f1b
UH
951 /*
952 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
953 * the data we just told the scope to send.
954 */
269971dd 955 devc->dev_state = FETCH_DATA;
ae88b97b
BV
956
957 /* Tell the frontend a new frame is on the way. */
958 packet.type = SR_DF_FRAME_BEGIN;
269971dd 959 sr_session_send(sdi, &packet);
3b533202
BV
960 break;
961 case CAPTURE_READY_9BIT:
962 /* TODO */
e98b7f1b 963 sr_err("Not yet supported.");
3b533202
BV
964 break;
965 case CAPTURE_TIMEOUT:
966 /* Doesn't matter, we'll try again next time. */
967 break;
968 default:
e98b7f1b
UH
969 sr_dbg("Unknown capture state: %d.", capturestate);
970 break;
3b533202
BV
971 }
972
973 return TRUE;
974}
975
6078d2c9 976static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 977{
269971dd 978 struct dev_context *devc;
4f840ce9 979 struct sr_dev_driver *di = sdi->driver;
a873c594 980 struct drv_context *drvc = di->priv;
3b533202 981
3b533202 982 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 983 return SR_ERR_DEV_CLOSED;
3b533202 984
269971dd
BV
985 devc = sdi->priv;
986 devc->cb_data = cb_data;
3b533202 987
ba7dd8bb
UH
988 if (configure_channels(sdi) != SR_OK) {
989 sr_err("Failed to configure channels.");
014359e3
BV
990 return SR_ERR;
991 }
992
c118080b 993 if (dso_init(sdi) != SR_OK)
3b533202
BV
994 return SR_ERR;
995
c118080b 996 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
997 return SR_ERR;
998
269971dd 999 devc->dev_state = CAPTURE;
102f1239 1000 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202
BV
1001
1002 /* Send header packet to the session bus. */
29a27196 1003 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 1004
3b533202
BV
1005 return SR_OK;
1006}
1007
6078d2c9 1008static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 1009{
269971dd
BV
1010 struct dev_context *devc;
1011
1012 (void)cb_data;
3b533202 1013
3b533202
BV
1014 if (sdi->status != SR_ST_ACTIVE)
1015 return SR_ERR;
1016
a3508e33
BV
1017 devc = sdi->priv;
1018 devc->dev_state = STOPPING;
3b533202
BV
1019
1020 return SR_OK;
1021}
1022
62bb8840 1023SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1024 .name = "hantek-dso",
1025 .longname = "Hantek DSO",
1026 .api_version = 1,
6078d2c9
UH
1027 .init = init,
1028 .cleanup = cleanup,
1029 .scan = scan,
1030 .dev_list = dev_list,
3b412e3a 1031 .dev_clear = dev_clear,
79917848 1032 .config_get = config_get,
035a1078 1033 .config_set = config_set,
a1c743fc 1034 .config_list = config_list,
6078d2c9
UH
1035 .dev_open = dev_open,
1036 .dev_close = dev_close,
1037 .dev_acquisition_start = dev_acquisition_start,
1038 .dev_acquisition_stop = dev_acquisition_stop,
269971dd 1039 .priv = NULL,
3b533202 1040};