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[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
62bb8840 40static const int hwcaps[] = {
1953564a
BV
41 SR_CONF_OSCILLOSCOPE,
42 SR_CONF_LIMIT_SAMPLES,
43 SR_CONF_CONTINUOUS,
44 SR_CONF_TIMEBASE,
45 SR_CONF_BUFFERSIZE,
46 SR_CONF_TRIGGER_SOURCE,
47 SR_CONF_TRIGGER_SLOPE,
48 SR_CONF_HORIZ_TRIGGERPOS,
49 SR_CONF_FILTER,
50 SR_CONF_VDIV,
51 SR_CONF_COUPLING,
3b533202
BV
52 0,
53};
54
55static const char *probe_names[] = {
78693401 56 "CH1", "CH2",
3b533202
BV
57 NULL,
58};
59
62bb8840 60static const struct dso_profile dev_profiles[] = {
88a13f30 61 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 62 "Hantek", "DSO-2090",
88a13f30
BV
63 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
64 { 0x04b4, 0x2150, 0x04b5, 0x2150,
65 "Hantek", "DSO-2150",
66 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
67 { 0x04b4, 0x2250, 0x04b5, 0x2250,
68 "Hantek", "DSO-2250",
69 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
70 { 0x04b4, 0x5200, 0x04b5, 0x5200,
71 "Hantek", "DSO-5200",
72 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
73 { 0x04b4, 0x520a, 0x04b5, 0x520a,
74 "Hantek", "DSO-5200A",
75 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
76 { 0, 0, 0, 0, 0, 0, 0 },
3b533202
BV
77};
78
62bb8840 79static const uint64_t buffersizes[] = {
a370ef19
BV
80 10240,
81 32768,
82 /* TODO: 65535 */
62bb8840 83 0,
a370ef19
BV
84};
85
62bb8840 86static const struct sr_rational timebases[] = {
a370ef19
BV
87 /* microseconds */
88 { 10, 1000000 },
89 { 20, 1000000 },
90 { 40, 1000000 },
91 { 100, 1000000 },
92 { 200, 1000000 },
93 { 400, 1000000 },
94 /* milliseconds */
95 { 1, 1000 },
96 { 2, 1000 },
97 { 4, 1000 },
98 { 10, 1000 },
99 { 20, 1000 },
100 { 40, 1000 },
101 { 100, 1000 },
102 { 200, 1000 },
103 { 400, 1000 },
62bb8840 104 { 0, 0},
a370ef19
BV
105};
106
62bb8840 107static const struct sr_rational vdivs[] = {
313deed2
BV
108 /* millivolts */
109 { 10, 1000 },
110 { 20, 1000 },
111 { 50, 1000 },
112 { 100, 1000 },
113 { 200, 1000 },
114 { 500, 1000 },
115 /* volts */
116 { 1, 1 },
117 { 2, 1 },
118 { 5, 1 },
62bb8840 119 { 0, 0 },
313deed2
BV
120};
121
62bb8840 122static const char *trigger_sources[] = {
a370ef19
BV
123 "CH1",
124 "CH2",
125 "EXT",
88a13f30 126 /* TODO: forced */
62bb8840 127 NULL,
a370ef19 128};
3b533202 129
62bb8840 130static const char *filter_targets[] = {
ebb781a6
BV
131 "CH1",
132 "CH2",
133 /* TODO: "TRIGGER", */
62bb8840 134 NULL,
ebb781a6
BV
135};
136
62bb8840 137static const char *coupling[] = {
b58fbd99
BV
138 "AC",
139 "DC",
140 "GND",
62bb8840 141 NULL,
b58fbd99
BV
142};
143
982947f7 144SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 145static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 146
69b07d14 147static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 148
62bb8840 149static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
150{
151 struct sr_dev_inst *sdi;
87ca93c5 152 struct sr_probe *probe;
269971dd
BV
153 struct drv_context *drvc;
154 struct dev_context *devc;
87ca93c5 155 int i;
3b533202
BV
156
157 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 158 prof->vendor, prof->model, NULL);
3b533202
BV
159 if (!sdi)
160 return NULL;
a873c594 161 sdi->driver = di;
3b533202 162
e98b7f1b
UH
163 /*
164 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
165 * a trigger source internal to the device.
166 */
167 for (i = 0; probe_names[i]; i++) {
168 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
169 probe_names[i])))
170 return NULL;
171 sdi->probes = g_slist_append(sdi->probes, probe);
172 }
173
269971dd 174 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 175 sr_err("Device context malloc failed.");
3b533202
BV
176 return NULL;
177 }
e98b7f1b 178
269971dd
BV
179 devc->profile = prof;
180 devc->dev_state = IDLE;
181 devc->timebase = DEFAULT_TIMEBASE;
182 devc->ch1_enabled = TRUE;
183 devc->ch2_enabled = TRUE;
184 devc->voltage_ch1 = DEFAULT_VOLTAGE;
185 devc->voltage_ch2 = DEFAULT_VOLTAGE;
186 devc->coupling_ch1 = DEFAULT_COUPLING;
187 devc->coupling_ch2 = DEFAULT_COUPLING;
188 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
189 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
190 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
191 devc->framesize = DEFAULT_FRAMESIZE;
192 devc->triggerslope = SLOPE_POSITIVE;
193 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
194 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
195 sdi->priv = devc;
a873c594 196 drvc = di->priv;
269971dd 197 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
198
199 return sdi;
200}
201
014359e3 202static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 203{
014359e3 204 struct dev_context *devc;
69e19dd7 205 struct sr_probe *probe;
62bb8840 206 const GSList *l;
69e19dd7 207 int p;
3b533202 208
014359e3
BV
209 devc = sdi->priv;
210
69e19dd7 211 g_slist_free(devc->enabled_probes);
269971dd 212 devc->ch1_enabled = devc->ch2_enabled = FALSE;
69e19dd7
BV
213 for (l = sdi->probes, p = 0; l; l = l->next, p++) {
214 probe = l->data;
215 if (p == 0)
269971dd 216 devc->ch1_enabled = probe->enabled;
69e19dd7 217 else
269971dd 218 devc->ch2_enabled = probe->enabled;
69e19dd7
BV
219 if (probe->enabled)
220 devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
3b533202
BV
221 }
222
223 return SR_OK;
224}
225
39cfdd75 226/* Properly close and free all devices. */
811deee4 227static int clear_instances(void)
39cfdd75
BV
228{
229 struct sr_dev_inst *sdi;
269971dd
BV
230 struct drv_context *drvc;
231 struct dev_context *devc;
39cfdd75
BV
232 GSList *l;
233
a873c594 234 drvc = di->priv;
269971dd 235 for (l = drvc->instances; l; l = l->next) {
39cfdd75
BV
236 if (!(sdi = l->data)) {
237 /* Log error, but continue cleaning up the rest. */
e98b7f1b 238 sr_err("%s: sdi was NULL, continuing", __func__);
39cfdd75
BV
239 continue;
240 }
269971dd 241 if (!(devc = sdi->priv)) {
39cfdd75 242 /* Log error, but continue cleaning up the rest. */
e98b7f1b 243 sr_err("%s: sdi->priv was NULL, continuing", __func__);
39cfdd75
BV
244 continue;
245 }
246 dso_close(sdi);
269971dd
BV
247 sr_usb_dev_inst_free(devc->usb);
248 g_free(devc->triggersource);
69e19dd7 249 g_slist_free(devc->enabled_probes);
39cfdd75
BV
250
251 sr_dev_inst_free(sdi);
252 }
253
269971dd
BV
254 g_slist_free(drvc->instances);
255 drvc->instances = NULL;
39cfdd75 256
811deee4 257 return SR_OK;
39cfdd75
BV
258}
259
34f06b90 260static int hw_init(struct sr_context *sr_ctx)
61136ea6 261{
063e7aef 262 return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
61136ea6
BV
263}
264
39cfdd75 265static GSList *hw_scan(GSList *options)
3b533202
BV
266{
267 struct sr_dev_inst *sdi;
62bb8840 268 const struct dso_profile *prof;
269971dd
BV
269 struct drv_context *drvc;
270 struct dev_context *devc;
39cfdd75
BV
271 GSList *devices;
272 struct libusb_device_descriptor des;
3b533202 273 libusb_device **devlist;
61136ea6 274 int devcnt, ret, i, j;
3b533202 275
39cfdd75 276 (void)options;
e98b7f1b 277
a873c594 278 drvc = di->priv;
269971dd 279 drvc->instances = NULL;
39cfdd75 280
4b97c74e
UH
281 devcnt = 0;
282 devices = 0;
283
39cfdd75
BV
284 clear_instances();
285
286 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 287 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 288 for (i = 0; devlist[i]; i++) {
61136ea6 289 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71
PS
290 sr_err("Failed to get device descriptor: %s.",
291 libusb_error_name(ret));
3b533202
BV
292 continue;
293 }
294
295 prof = NULL;
296 for (j = 0; dev_profiles[j].orig_vid; j++) {
297 if (des.idVendor == dev_profiles[j].orig_vid
298 && des.idProduct == dev_profiles[j].orig_pid) {
299 /* Device matches the pre-firmware profile. */
300 prof = &dev_profiles[j];
e98b7f1b 301 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 302 sdi = dso_dev_new(devcnt, prof);
39cfdd75 303 devices = g_slist_append(devices, sdi);
269971dd 304 devc = sdi->priv;
3b533202
BV
305 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
306 prof->firmware) == SR_OK)
307 /* Remember when the firmware on this device was updated */
269971dd 308 devc->fw_updated = g_get_monotonic_time();
3b533202 309 else
e98b7f1b
UH
310 sr_err("Firmware upload failed for "
311 "device %d.", devcnt);
3b533202 312 /* Dummy USB address of 0xff will get overwritten later. */
269971dd 313 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
314 libusb_get_bus_number(devlist[i]), 0xff, NULL);
315 devcnt++;
316 break;
317 } else if (des.idVendor == dev_profiles[j].fw_vid
318 && des.idProduct == dev_profiles[j].fw_pid) {
319 /* Device matches the post-firmware profile. */
320 prof = &dev_profiles[j];
e98b7f1b 321 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
322 sdi = dso_dev_new(devcnt, prof);
323 sdi->status = SR_ST_INACTIVE;
39cfdd75 324 devices = g_slist_append(devices, sdi);
269971dd
BV
325 devc = sdi->priv;
326 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
327 libusb_get_bus_number(devlist[i]),
328 libusb_get_device_address(devlist[i]), NULL);
329 devcnt++;
330 break;
331 }
332 }
333 if (!prof)
334 /* not a supported VID/PID */
335 continue;
336 }
337 libusb_free_device_list(devlist, 1);
338
39cfdd75 339 return devices;
3b533202
BV
340}
341
811deee4
BV
342static GSList *hw_dev_list(void)
343{
344 struct drv_context *drvc;
345
a873c594 346 drvc = di->priv;
811deee4
BV
347
348 return drvc->instances;
349}
350
25a0f108 351static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 352{
269971dd 353 struct dev_context *devc;
fc8fe3e3
BV
354 int64_t timediff_us, timediff_ms;
355 int err;
3b533202 356
269971dd 357 devc = sdi->priv;
3b533202
BV
358
359 /*
e98b7f1b
UH
360 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
361 * for the FX2 to renumerate.
3b533202 362 */
fc8fe3e3 363 err = SR_ERR;
269971dd 364 if (devc->fw_updated > 0) {
e98b7f1b
UH
365 sr_info("Waiting for device to reset.");
366 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 367 g_usleep(300 * 1000);
fc8fe3e3
BV
368 timediff_ms = 0;
369 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 370 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
371 break;
372 g_usleep(100 * 1000);
269971dd 373 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 374 timediff_ms = timediff_us / 1000;
e98b7f1b 375 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 376 }
e98b7f1b 377 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 378 } else {
25a0f108 379 err = dso_open(sdi);
3b533202
BV
380 }
381
382 if (err != SR_OK) {
e98b7f1b 383 sr_err("Unable to open device.");
3b533202
BV
384 return SR_ERR;
385 }
386
269971dd 387 err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE);
3b533202 388 if (err != 0) {
d4928d71
PS
389 sr_err("Unable to claim interface: %s.",
390 libusb_error_name(err));
3b533202
BV
391 return SR_ERR;
392 }
393
394 return SR_OK;
395}
396
25a0f108 397static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 398{
3b533202
BV
399 dso_close(sdi);
400
401 return SR_OK;
402}
403
404static int hw_cleanup(void)
405{
269971dd
BV
406 struct drv_context *drvc;
407
a873c594 408 if (!(drvc = di->priv))
269971dd 409 return SR_OK;
3b533202 410
39cfdd75 411 clear_instances();
3b533202 412
3b533202
BV
413 return SR_OK;
414}
415
035a1078 416static int config_set(int id, const void *value, const struct sr_dev_inst *sdi)
3b533202 417{
269971dd 418 struct dev_context *devc;
a370ef19
BV
419 struct sr_rational tmp_rat;
420 float tmp_float;
421 uint64_t tmp_u64;
422 int ret, i;
4a090d72 423 char **targets;
3b533202 424
3b533202
BV
425 if (sdi->status != SR_ST_ACTIVE)
426 return SR_ERR;
427
a370ef19 428 ret = SR_OK;
269971dd 429 devc = sdi->priv;
035a1078 430 switch (id) {
1953564a 431 case SR_CONF_LIMIT_FRAMES:
269971dd 432 devc->limit_frames = *(const uint64_t *)value;
ae88b97b 433 break;
1953564a 434 case SR_CONF_TRIGGER_SLOPE:
62bb8840 435 tmp_u64 = *(const int *)value;
a370ef19
BV
436 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
437 ret = SR_ERR_ARG;
269971dd 438 devc->triggerslope = tmp_u64;
a370ef19 439 break;
1953564a 440 case SR_CONF_HORIZ_TRIGGERPOS:
62bb8840 441 tmp_float = *(const float *)value;
a370ef19 442 if (tmp_float < 0.0 || tmp_float > 1.0) {
e98b7f1b 443 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 444 ret = SR_ERR_ARG;
a370ef19 445 } else
269971dd 446 devc->triggerposition = tmp_float;
a370ef19 447 break;
1953564a 448 case SR_CONF_BUFFERSIZE:
62bb8840 449 tmp_u64 = *(const int *)value;
a370ef19
BV
450 for (i = 0; buffersizes[i]; i++) {
451 if (buffersizes[i] == tmp_u64) {
269971dd 452 devc->framesize = tmp_u64;
a370ef19
BV
453 break;
454 }
455 }
456 if (buffersizes[i] == 0)
457 ret = SR_ERR_ARG;
458 break;
1953564a 459 case SR_CONF_TIMEBASE:
62bb8840 460 tmp_rat = *(const struct sr_rational *)value;
a370ef19
BV
461 for (i = 0; timebases[i].p && timebases[i].q; i++) {
462 if (timebases[i].p == tmp_rat.p
463 && timebases[i].q == tmp_rat.q) {
269971dd 464 devc->timebase = i;
a370ef19
BV
465 break;
466 }
467 }
468 if (timebases[i].p == 0 && timebases[i].q == 0)
469 ret = SR_ERR_ARG;
470 break;
1953564a 471 case SR_CONF_TRIGGER_SOURCE:
a370ef19 472 for (i = 0; trigger_sources[i]; i++) {
4a090d72 473 if (!strcmp(value, trigger_sources[i])) {
269971dd 474 devc->triggersource = g_strdup(value);
a370ef19
BV
475 break;
476 }
477 }
478 if (trigger_sources[i] == 0)
479 ret = SR_ERR_ARG;
480 break;
1953564a 481 case SR_CONF_FILTER:
269971dd 482 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
ebb781a6
BV
483 targets = g_strsplit(value, ",", 0);
484 for (i = 0; targets[i]; i++) {
485 if (targets[i] == '\0')
486 /* Empty filter string can be used to clear them all. */
487 ;
488 else if (!strcmp(targets[i], "CH1"))
269971dd 489 devc->filter_ch1 = TRUE;
ebb781a6 490 else if (!strcmp(targets[i], "CH2"))
269971dd 491 devc->filter_ch2 = TRUE;
ebb781a6 492 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 493 devc->filter_trigger = TRUE;
ebb781a6 494 else {
e98b7f1b 495 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
496 ret = SR_ERR_ARG;
497 }
498 }
499 g_strfreev(targets);
500 break;
1953564a 501 case SR_CONF_VDIV:
e98b7f1b 502 /* TODO: Not supporting vdiv per channel yet. */
62bb8840 503 tmp_rat = *(const struct sr_rational *)value;
313deed2
BV
504 for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
505 if (vdivs[i].p == tmp_rat.p
506 && vdivs[i].q == tmp_rat.q) {
269971dd
BV
507 devc->voltage_ch1 = i;
508 devc->voltage_ch2 = i;
313deed2
BV
509 break;
510 }
511 }
512 if (vdivs[i].p == 0 && vdivs[i].q == 0)
513 ret = SR_ERR_ARG;
514 break;
1953564a 515 case SR_CONF_COUPLING:
e98b7f1b 516 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 517 for (i = 0; coupling[i]; i++) {
4a090d72 518 if (!strcmp(value, coupling[i])) {
269971dd
BV
519 devc->coupling_ch1 = i;
520 devc->coupling_ch2 = i;
b58fbd99
BV
521 break;
522 }
523 }
524 if (coupling[i] == 0)
525 ret = SR_ERR_ARG;
526 break;
3b533202
BV
527 default:
528 ret = SR_ERR_ARG;
e98b7f1b 529 break;
3b533202
BV
530 }
531
532 return ret;
533}
534
a1c743fc
BV
535static int config_list(int key, const void **data, const struct sr_dev_inst *sdi)
536{
537
538 (void)sdi;
539
540 switch (key) {
9a6517d1
BV
541 case SR_CONF_DEVICE_OPTIONS:
542 *data = hwcaps;
543 break;
6d1ceffa
BV
544 case SR_CONF_BUFFERSIZE:
545 *data = buffersizes;
546 break;
2a7b113d
BV
547 case SR_CONF_COUPLING:
548 *data = coupling;
549 break;
e4f2b2ad
BV
550 case SR_CONF_VDIV:
551 *data = vdivs;
552 break;
6e1fbcc4
BV
553 case SR_CONF_FILTER:
554 *data = filter_targets;
555 break;
41f5bd09
BV
556 case SR_CONF_TIMEBASE:
557 *data = timebases;
558 break;
328bafab
BV
559 case SR_CONF_TRIGGER_SOURCE:
560 *data = trigger_sources;
561 break;
a1c743fc
BV
562 default:
563 return SR_ERR_ARG;
564 }
565
566 return SR_OK;
567}
568
69e19dd7 569static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 570 int num_samples)
3b533202
BV
571{
572 struct sr_datafeed_packet packet;
573 struct sr_datafeed_analog analog;
69e19dd7 574 struct dev_context *devc;
c5841b28 575 float ch1, ch2, range;
6e71ef3b 576 int num_probes, data_offset, i;
3b533202 577
69e19dd7 578 devc = sdi->priv;
269971dd 579 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
580 packet.type = SR_DF_ANALOG;
581 packet.payload = &analog;
6e71ef3b 582 /* TODO: support for 5xxx series 9-bit samples */
69e19dd7 583 analog.probes = devc->enabled_probes;
e749a8cb 584 analog.num_samples = num_samples;
9956f285
UH
585 analog.mq = SR_MQ_VOLTAGE;
586 analog.unit = SR_UNIT_VOLT;
886a52b6 587 /* TODO: Check malloc return value. */
6e71ef3b
BV
588 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
589 data_offset = 0;
3b533202 590 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
591 /*
592 * The device always sends data for both channels. If a channel
6e71ef3b 593 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
594 * data. However, we only send the requested channels to
595 * the bus.
c5841b28 596 *
e98b7f1b
UH
597 * Voltage values are encoded as a value 0-255 (0-512 on the
598 * DSO-5200*), where the value is a point in the range
599 * represented by the vdiv setting. There are 8 vertical divs,
600 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
601 * and 255 = +2V.
6e71ef3b 602 */
e98b7f1b 603 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd
BV
604 if (devc->ch1_enabled) {
605 range = ((float)vdivs[devc->voltage_ch1].p / vdivs[devc->voltage_ch1].q) * 8;
e749a8cb 606 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
607 /* Value is centered around 0V. */
608 ch1 -= range / 2;
6e71ef3b
BV
609 analog.data[data_offset++] = ch1;
610 }
269971dd
BV
611 if (devc->ch2_enabled) {
612 range = ((float)vdivs[devc->voltage_ch2].p / vdivs[devc->voltage_ch2].q) * 8;
e749a8cb 613 ch2 = range / 255 * *(buf + i * 2);
c5841b28 614 ch2 -= range / 2;
6e71ef3b
BV
615 analog.data[data_offset++] = ch2;
616 }
3b533202 617 }
269971dd 618 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
619}
620
e98b7f1b
UH
621/*
622 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 623 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 624 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
625 * the libsigrok session bus.
626 */
627static void receive_transfer(struct libusb_transfer *transfer)
628{
629 struct sr_datafeed_packet packet;
69e19dd7 630 struct sr_dev_inst *sdi;
269971dd 631 struct dev_context *devc;
e749a8cb
BV
632 int num_samples, pre;
633
69e19dd7
BV
634 sdi = transfer->user_data;
635 devc = sdi->priv;
e98b7f1b
UH
636 sr_dbg("receive_transfer(): status %d received %d bytes.",
637 transfer->status, transfer->actual_length);
e749a8cb
BV
638
639 if (transfer->actual_length == 0)
640 /* Nothing to send to the bus. */
641 return;
642
643 num_samples = transfer->actual_length / 2;
644
e98b7f1b
UH
645 sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
646 devc->samp_received + num_samples, devc->framesize);
e749a8cb 647
e98b7f1b
UH
648 /*
649 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
650 * doesn't represent the trigger point. The offset at which the trigger
651 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
652 * from there up the session bus. The samples in the frame buffer
653 * before that trigger point came after the end of the device's frame
654 * buffer was reached, and it wrapped around to overwrite up until the
655 * trigger point.
e749a8cb 656 */
269971dd 657 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 658 /* Trigger point not yet reached. */
269971dd 659 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 660 /* The entire chunk is before the trigger point. */
269971dd 661 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 662 transfer->buffer, num_samples * 2);
269971dd 663 devc->samp_buffered += num_samples;
e749a8cb 664 } else {
e98b7f1b
UH
665 /*
666 * This chunk hits or overruns the trigger point.
e749a8cb 667 * Store the part before the trigger fired, and
e98b7f1b
UH
668 * send the rest up to the session bus.
669 */
269971dd
BV
670 pre = devc->trigger_offset - devc->samp_received;
671 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 672 transfer->buffer, pre * 2);
269971dd 673 devc->samp_buffered += pre;
e749a8cb
BV
674
675 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
676 sr_dbg("Reached trigger point, %d samples buffered.",
677 devc->samp_buffered);
e749a8cb
BV
678
679 /* Avoid the corner case where the chunk ended at
680 * exactly the trigger point. */
681 if (num_samples > pre)
69e19dd7 682 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
683 num_samples - pre);
684 }
685 } else {
686 /* Already past the trigger point, just send it all out. */
69e19dd7 687 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
688 num_samples);
689 }
690
269971dd 691 devc->samp_received += num_samples;
e749a8cb
BV
692
693 /* Everything in this transfer was either copied to the buffer or
694 * sent to the session bus. */
3b533202
BV
695 g_free(transfer->buffer);
696 libusb_free_transfer(transfer);
3b533202 697
269971dd 698 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
699 /* That was the last chunk in this frame. Send the buffered
700 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
701 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
702 devc->samp_buffered);
69e19dd7 703 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
704
705 /* Mark the end of this frame. */
ae88b97b 706 packet.type = SR_DF_FRAME_END;
269971dd 707 sr_session_send(devc->cb_data, &packet);
ae88b97b 708
269971dd 709 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 710 /* Terminate session */
a3508e33 711 devc->dev_state = STOPPING;
ae88b97b 712 } else {
269971dd 713 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
714 }
715 }
3b533202
BV
716}
717
718static int handle_event(int fd, int revents, void *cb_data)
719{
a3508e33 720 const struct sr_dev_inst *sdi;
ae88b97b 721 struct sr_datafeed_packet packet;
3b533202 722 struct timeval tv;
269971dd 723 struct dev_context *devc;
a873c594 724 struct drv_context *drvc = di->priv;
a3508e33
BV
725 const struct libusb_pollfd **lupfd;
726 int num_probes, i;
6e6eeff4
BV
727 uint32_t trigger_offset;
728 uint8_t capturestate;
3b533202 729
3b533202
BV
730 (void)fd;
731 (void)revents;
732
269971dd
BV
733 sdi = cb_data;
734 devc = sdi->priv;
a3508e33
BV
735 if (devc->dev_state == STOPPING) {
736 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
737 sr_dbg("Stopping acquisition.");
738 /*
739 * TODO: Doesn't really cancel pending transfers so they might
740 * come in after SR_DF_END is sent.
741 */
d4abb463 742 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
743 for (i = 0; lupfd[i]; i++)
744 sr_source_remove(lupfd[i]->fd);
745 free(lupfd);
746
747 packet.type = SR_DF_END;
748 sr_session_send(sdi, &packet);
749
750 devc->dev_state = IDLE;
751
752 return TRUE;
753 }
754
3b533202
BV
755 /* Always handle pending libusb events. */
756 tv.tv_sec = tv.tv_usec = 0;
d4abb463 757 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 758
3b533202 759 /* TODO: ugh */
269971dd
BV
760 if (devc->dev_state == NEW_CAPTURE) {
761 if (dso_capture_start(devc) != SR_OK)
3b533202 762 return TRUE;
269971dd 763 if (dso_enable_trigger(devc) != SR_OK)
3b533202 764 return TRUE;
269971dd 765// if (dso_force_trigger(devc) != SR_OK)
a370ef19 766// return TRUE;
e98b7f1b 767 sr_dbg("Successfully requested next chunk.");
269971dd 768 devc->dev_state = CAPTURE;
3b533202
BV
769 return TRUE;
770 }
269971dd 771 if (devc->dev_state != CAPTURE)
3b533202
BV
772 return TRUE;
773
269971dd 774 if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK)
3b533202 775 return TRUE;
3b533202 776
e98b7f1b
UH
777 sr_dbg("Capturestate %d.", capturestate);
778 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
779 switch (capturestate) {
780 case CAPTURE_EMPTY:
269971dd
BV
781 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
782 devc->capture_empty_count = 0;
783 if (dso_capture_start(devc) != SR_OK)
3b533202 784 break;
269971dd 785 if (dso_enable_trigger(devc) != SR_OK)
3b533202 786 break;
269971dd 787// if (dso_force_trigger(devc) != SR_OK)
a370ef19 788// break;
e98b7f1b 789 sr_dbg("Successfully requested next chunk.");
3b533202
BV
790 }
791 break;
792 case CAPTURE_FILLING:
e98b7f1b 793 /* No data yet. */
3b533202
BV
794 break;
795 case CAPTURE_READY_8BIT:
e749a8cb 796 /* Remember where in the captured frame the trigger is. */
269971dd 797 devc->trigger_offset = trigger_offset;
e749a8cb 798
269971dd 799 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 800 /* TODO: Check malloc return value. */
269971dd
BV
801 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
802 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 803
3b533202 804 /* Tell the scope to send us the first frame. */
69e19dd7 805 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 806 break;
ae88b97b 807
e98b7f1b
UH
808 /*
809 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
810 * the data we just told the scope to send.
811 */
269971dd 812 devc->dev_state = FETCH_DATA;
ae88b97b
BV
813
814 /* Tell the frontend a new frame is on the way. */
815 packet.type = SR_DF_FRAME_BEGIN;
269971dd 816 sr_session_send(sdi, &packet);
3b533202
BV
817 break;
818 case CAPTURE_READY_9BIT:
819 /* TODO */
e98b7f1b 820 sr_err("Not yet supported.");
3b533202
BV
821 break;
822 case CAPTURE_TIMEOUT:
823 /* Doesn't matter, we'll try again next time. */
824 break;
825 default:
e98b7f1b
UH
826 sr_dbg("Unknown capture state: %d.", capturestate);
827 break;
3b533202
BV
828 }
829
830 return TRUE;
831}
832
3ffb6964 833static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 834 void *cb_data)
3b533202
BV
835{
836 const struct libusb_pollfd **lupfd;
837 struct sr_datafeed_packet packet;
838 struct sr_datafeed_header header;
269971dd 839 struct dev_context *devc;
a873c594 840 struct drv_context *drvc = di->priv;
3b533202
BV
841 int i;
842
3b533202
BV
843 if (sdi->status != SR_ST_ACTIVE)
844 return SR_ERR;
845
269971dd
BV
846 devc = sdi->priv;
847 devc->cb_data = cb_data;
3b533202 848
014359e3 849 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 850 sr_err("Failed to configure probes.");
014359e3
BV
851 return SR_ERR;
852 }
853
269971dd 854 if (dso_init(devc) != SR_OK)
3b533202
BV
855 return SR_ERR;
856
269971dd 857 if (dso_capture_start(devc) != SR_OK)
3b533202
BV
858 return SR_ERR;
859
269971dd 860 devc->dev_state = CAPTURE;
d4abb463 861 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 862 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
863 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
864 handle_event, (void *)sdi);
3b533202
BV
865 free(lupfd);
866
867 /* Send header packet to the session bus. */
868 packet.type = SR_DF_HEADER;
869 packet.payload = (unsigned char *)&header;
870 header.feed_version = 1;
871 gettimeofday(&header.starttime, NULL);
872 sr_session_send(cb_data, &packet);
873
3b533202
BV
874 return SR_OK;
875}
876
69b07d14 877static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 878{
269971dd
BV
879 struct dev_context *devc;
880
881 (void)cb_data;
3b533202 882
3b533202
BV
883 if (sdi->status != SR_ST_ACTIVE)
884 return SR_ERR;
885
a3508e33
BV
886 devc = sdi->priv;
887 devc->dev_state = STOPPING;
3b533202
BV
888
889 return SR_OK;
890}
891
62bb8840 892SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
893 .name = "hantek-dso",
894 .longname = "Hantek DSO",
895 .api_version = 1,
896 .init = hw_init,
897 .cleanup = hw_cleanup,
61136ea6 898 .scan = hw_scan,
811deee4
BV
899 .dev_list = hw_dev_list,
900 .dev_clear = clear_instances,
035a1078 901 .config_set = config_set,
a1c743fc 902 .config_list = config_list,
3b533202
BV
903 .dev_open = hw_dev_open,
904 .dev_close = hw_dev_close,
62bb8840
UH
905 .dev_acquisition_start = hw_dev_acquisition_start,
906 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 907 .priv = NULL,
3b533202 908};