]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-dso/api.c
Channel names consistency fixes and simplifications.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
584560f1 43static const uint32_t scanopts[] = {
624f5b4c
BV
44 SR_CONF_CONN,
45};
46
5ecd9049 47static const uint32_t drvopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
933defaa
BV
49};
50
5ecd9049
BV
51static const uint32_t devopts[] = {
52 SR_CONF_CONTINUOUS | SR_CONF_SET,
53 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
54 SR_CONF_CONN | SR_CONF_GET,
55 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
57 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
58 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 61 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
62};
63
933defaa
BV
64static const uint32_t devopts_cg[] = {
65 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
66 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
67 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
68};
69
ba7dd8bb 70static const char *channel_names[] = {
78693401 71 "CH1", "CH2",
3b533202
BV
72};
73
034accb5
BV
74static const uint64_t buffersizes_32k[] = {
75 10240, 32768,
76};
77static const uint64_t buffersizes_512k[] = {
78 10240, 524288,
79};
80static const uint64_t buffersizes_14k[] = {
81 10240, 14336,
82};
83
62bb8840 84static const struct dso_profile dev_profiles[] = {
88a13f30 85 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 86 "Hantek", "DSO-2090",
034accb5 87 buffersizes_32k,
7b78b2f7 88 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
89 { 0x04b4, 0x2150, 0x04b5, 0x2150,
90 "Hantek", "DSO-2150",
034accb5 91 buffersizes_32k,
7b78b2f7 92 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
93 { 0x04b4, 0x2250, 0x04b5, 0x2250,
94 "Hantek", "DSO-2250",
034accb5 95 buffersizes_512k,
7b78b2f7 96 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
97 { 0x04b4, 0x5200, 0x04b5, 0x5200,
98 "Hantek", "DSO-5200",
034accb5 99 buffersizes_14k,
7b78b2f7 100 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
101 { 0x04b4, 0x520a, 0x04b5, 0x520a,
102 "Hantek", "DSO-5200A",
034accb5 103 buffersizes_512k,
7b78b2f7 104 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 105 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
106};
107
86bb3f4a 108static const uint64_t timebases[][2] = {
a370ef19
BV
109 /* microseconds */
110 { 10, 1000000 },
111 { 20, 1000000 },
112 { 40, 1000000 },
113 { 100, 1000000 },
114 { 200, 1000000 },
115 { 400, 1000000 },
116 /* milliseconds */
117 { 1, 1000 },
118 { 2, 1000 },
119 { 4, 1000 },
120 { 10, 1000 },
121 { 20, 1000 },
122 { 40, 1000 },
123 { 100, 1000 },
124 { 200, 1000 },
125 { 400, 1000 },
a370ef19
BV
126};
127
86bb3f4a 128static const uint64_t vdivs[][2] = {
313deed2
BV
129 /* millivolts */
130 { 10, 1000 },
131 { 20, 1000 },
132 { 50, 1000 },
133 { 100, 1000 },
134 { 200, 1000 },
135 { 500, 1000 },
136 /* volts */
137 { 1, 1 },
138 { 2, 1 },
139 { 5, 1 },
313deed2
BV
140};
141
62bb8840 142static const char *trigger_sources[] = {
a370ef19
BV
143 "CH1",
144 "CH2",
145 "EXT",
88a13f30 146 /* TODO: forced */
a370ef19 147};
3b533202 148
933defaa
BV
149static const char *trigger_slopes[] = {
150 "r",
151 "f",
ebb781a6
BV
152};
153
62bb8840 154static const char *coupling[] = {
b58fbd99
BV
155 "AC",
156 "DC",
157 "GND",
b58fbd99
BV
158};
159
982947f7 160SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
e98b7f1b 161
6078d2c9 162static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 163
395206f4 164static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
165{
166 struct sr_dev_inst *sdi;
ba7dd8bb 167 struct sr_channel *ch;
933defaa 168 struct sr_channel_group *cg;
269971dd
BV
169 struct drv_context *drvc;
170 struct dev_context *devc;
dcd438ee 171 unsigned int i;
3b533202 172
aac29cc1 173 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
174 sdi->status = SR_ST_INITIALIZING;
175 sdi->vendor = g_strdup(prof->vendor);
176 sdi->model = g_strdup(prof->model);
4f840ce9 177 sdi->driver = &hantek_dso_driver_info;
3b533202 178
e98b7f1b 179 /*
ba7dd8bb 180 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
181 * a trigger source internal to the device.
182 */
0f34cb47 183 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 184 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
185 cg = g_malloc0(sizeof(struct sr_channel_group));
186 cg->name = g_strdup(channel_names[i]);
187 cg->channels = g_slist_append(cg->channels, ch);
188 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
189 }
190
933defaa 191 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
192 devc->profile = prof;
193 devc->dev_state = IDLE;
194 devc->timebase = DEFAULT_TIMEBASE;
195 devc->ch1_enabled = TRUE;
196 devc->ch2_enabled = TRUE;
933defaa
BV
197 devc->voltage[0] = DEFAULT_VOLTAGE;
198 devc->voltage[1] = DEFAULT_VOLTAGE;
199 devc->coupling[0] = DEFAULT_COUPLING;
200 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
201 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
202 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
203 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
204 devc->framesize = DEFAULT_FRAMESIZE;
205 devc->triggerslope = SLOPE_POSITIVE;
206 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
207 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
208 sdi->priv = devc;
4f840ce9 209 drvc = hantek_dso_driver_info.priv;
269971dd 210 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
211
212 return sdi;
213}
214
ba7dd8bb 215static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 216{
014359e3 217 struct dev_context *devc;
ba7dd8bb 218 struct sr_channel *ch;
62bb8840 219 const GSList *l;
69e19dd7 220 int p;
3b533202 221
014359e3
BV
222 devc = sdi->priv;
223
ba7dd8bb 224 g_slist_free(devc->enabled_channels);
269971dd 225 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
226 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
227 ch = l->data;
69e19dd7 228 if (p == 0)
ba7dd8bb 229 devc->ch1_enabled = ch->enabled;
69e19dd7 230 else
ba7dd8bb
UH
231 devc->ch2_enabled = ch->enabled;
232 if (ch->enabled)
233 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
234 }
235
236 return SR_OK;
237}
238
949b3dc0 239static void clear_dev_context(void *priv)
39cfdd75 240{
269971dd 241 struct dev_context *devc;
39cfdd75 242
949b3dc0
BV
243 devc = priv;
244 g_free(devc->triggersource);
ba7dd8bb 245 g_slist_free(devc->enabled_channels);
39cfdd75 246
949b3dc0 247}
39cfdd75 248
4f840ce9 249static int dev_clear(const struct sr_dev_driver *di)
949b3dc0
BV
250{
251 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
252}
253
4f840ce9 254static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
61136ea6 255{
f6beaac5 256 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
257}
258
4f840ce9 259static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 260{
269971dd
BV
261 struct drv_context *drvc;
262 struct dev_context *devc;
294dbac7 263 struct sr_dev_inst *sdi;
46a743c1
BV
264 struct sr_usb_dev_inst *usb;
265 struct sr_config *src;
294dbac7
BV
266 const struct dso_profile *prof;
267 GSList *l, *devices, *conn_devices;
39cfdd75 268 struct libusb_device_descriptor des;
3b533202 269 libusb_device **devlist;
395206f4 270 int ret, i, j;
46a743c1 271 const char *conn;
395206f4 272 char connection_id[64];
e98b7f1b 273
a873c594 274 drvc = di->priv;
39cfdd75 275
4b97c74e
UH
276 devices = 0;
277
294dbac7
BV
278 conn = NULL;
279 for (l = options; l; l = l->next) {
280 src = l->data;
281 if (src->key == SR_CONF_CONN) {
282 conn = g_variant_get_string(src->data, NULL);
283 break;
284 }
285 }
286 if (conn)
287 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
288 else
289 conn_devices = NULL;
290
39cfdd75 291 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 292 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 293 for (i = 0; devlist[i]; i++) {
46a743c1 294 if (conn) {
294dbac7
BV
295 usb = NULL;
296 for (l = conn_devices; l; l = l->next) {
297 usb = l->data;
298 if (usb->bus == libusb_get_bus_number(devlist[i])
299 && usb->address == libusb_get_device_address(devlist[i]))
300 break;
301 }
302 if (!l)
303 /* This device matched none of the ones that
304 * matched the conn specification. */
305 continue;
46a743c1 306 }
294dbac7 307
61136ea6 308 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71 309 sr_err("Failed to get device descriptor: %s.",
46a743c1 310 libusb_error_name(ret));
3b533202
BV
311 continue;
312 }
313
395206f4
SA
314 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
315
3b533202
BV
316 prof = NULL;
317 for (j = 0; dev_profiles[j].orig_vid; j++) {
318 if (des.idVendor == dev_profiles[j].orig_vid
319 && des.idProduct == dev_profiles[j].orig_pid) {
320 /* Device matches the pre-firmware profile. */
321 prof = &dev_profiles[j];
e98b7f1b 322 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
323 sdi = dso_dev_new(prof);
324 sdi->connection_id = g_strdup(connection_id);
39cfdd75 325 devices = g_slist_append(devices, sdi);
269971dd 326 devc = sdi->priv;
3b533202
BV
327 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
328 prof->firmware) == SR_OK)
329 /* Remember when the firmware on this device was updated */
269971dd 330 devc->fw_updated = g_get_monotonic_time();
3b533202 331 else
395206f4 332 sr_err("Firmware upload failed");
3b533202 333 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 334 sdi->conn = sr_usb_dev_inst_new(
3b533202 335 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
336 break;
337 } else if (des.idVendor == dev_profiles[j].fw_vid
338 && des.idProduct == dev_profiles[j].fw_pid) {
339 /* Device matches the post-firmware profile. */
340 prof = &dev_profiles[j];
e98b7f1b 341 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
342 sdi = dso_dev_new(prof);
343 sdi->connection_id = g_strdup(connection_id);
3b533202 344 sdi->status = SR_ST_INACTIVE;
39cfdd75 345 devices = g_slist_append(devices, sdi);
d0eec1ee 346 sdi->inst_type = SR_INST_USB;
c118080b 347 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
348 libusb_get_bus_number(devlist[i]),
349 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
350 break;
351 }
352 }
353 if (!prof)
354 /* not a supported VID/PID */
355 continue;
356 }
357 libusb_free_device_list(devlist, 1);
358
39cfdd75 359 return devices;
3b533202
BV
360}
361
4f840ce9 362static GSList *dev_list(const struct sr_dev_driver *di)
811deee4 363{
0e94d524 364 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
365}
366
6078d2c9 367static int dev_open(struct sr_dev_inst *sdi)
3b533202 368{
269971dd 369 struct dev_context *devc;
c118080b 370 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
371 int64_t timediff_us, timediff_ms;
372 int err;
3b533202 373
269971dd 374 devc = sdi->priv;
c118080b 375 usb = sdi->conn;
3b533202
BV
376
377 /*
e98b7f1b
UH
378 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
379 * for the FX2 to renumerate.
3b533202 380 */
fc8fe3e3 381 err = SR_ERR;
269971dd 382 if (devc->fw_updated > 0) {
e98b7f1b
UH
383 sr_info("Waiting for device to reset.");
384 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 385 g_usleep(300 * 1000);
fc8fe3e3
BV
386 timediff_ms = 0;
387 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 388 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
389 break;
390 g_usleep(100 * 1000);
269971dd 391 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 392 timediff_ms = timediff_us / 1000;
e98b7f1b 393 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 394 }
e98b7f1b 395 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 396 } else {
25a0f108 397 err = dso_open(sdi);
3b533202
BV
398 }
399
400 if (err != SR_OK) {
e98b7f1b 401 sr_err("Unable to open device.");
3b533202
BV
402 return SR_ERR;
403 }
404
c118080b 405 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 406 if (err != 0) {
d4928d71 407 sr_err("Unable to claim interface: %s.",
46a743c1 408 libusb_error_name(err));
3b533202
BV
409 return SR_ERR;
410 }
411
412 return SR_OK;
413}
414
6078d2c9 415static int dev_close(struct sr_dev_inst *sdi)
3b533202 416{
3b533202
BV
417 dso_close(sdi);
418
419 return SR_OK;
420}
421
4f840ce9 422static int cleanup(const struct sr_dev_driver *di)
3b533202 423{
4f840ce9 424 return dev_clear(di);
3b533202
BV
425}
426
584560f1 427static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 428 const struct sr_channel_group *cg)
79917848 429{
933defaa 430 struct dev_context *devc;
624f5b4c 431 struct sr_usb_dev_inst *usb;
933defaa
BV
432 char str[128], *s;
433 const uint64_t *vdiv;
434 int ch_idx;
79917848 435
584560f1 436 switch (key) {
bf622e6d 437 case SR_CONF_NUM_HDIV:
79917848
BV
438 *data = g_variant_new_int32(NUM_TIMEBASE);
439 break;
440 case SR_CONF_NUM_VDIV:
441 *data = g_variant_new_int32(NUM_VDIV);
442 break;
933defaa
BV
443 }
444
445 if (!sdi)
446 return SR_ERR_ARG;
447
448 devc = sdi->priv;
449 if (!cg) {
450 switch (key) {
451 case SR_CONF_CONN:
452 if (!sdi->conn)
453 return SR_ERR_ARG;
454 usb = sdi->conn;
455 if (usb->address == 255)
456 /* Device still needs to re-enumerate after firmware
457 * upload, so we don't know its (future) address. */
458 return SR_ERR;
459 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
460 *data = g_variant_new_string(str);
461 break;
462 case SR_CONF_TIMEBASE:
463 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
464 timebases[devc->timebase][1]);
465 break;
466 case SR_CONF_BUFFERSIZE:
467 *data = g_variant_new_uint64(devc->framesize);
468 break;
469 case SR_CONF_TRIGGER_SOURCE:
470 *data = g_variant_new_string(devc->triggersource);
471 break;
472 case SR_CONF_TRIGGER_SLOPE:
473 if (devc->triggerslope == SLOPE_POSITIVE)
474 s = "r";
475 else
476 s = "f";
477 *data = g_variant_new_string(s);
478 break;
479 case SR_CONF_HORIZ_TRIGGERPOS:
480 *data = g_variant_new_double(devc->triggerposition);
481 break;
482 default:
483 return SR_ERR_NA;
484 }
485 } else {
486 if (sdi->channel_groups->data == cg)
487 ch_idx = 0;
488 else if (sdi->channel_groups->next->data == cg)
489 ch_idx = 1;
490 else
491 return SR_ERR_ARG;
0c5f2abc 492 switch (key) {
933defaa
BV
493 case SR_CONF_FILTER:
494 *data = g_variant_new_boolean(devc->filter[ch_idx]);
495 break;
496 case SR_CONF_VDIV:
497 vdiv = vdivs[devc->voltage[ch_idx]];
498 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
499 break;
500 case SR_CONF_COUPLING:
501 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
502 break;
503 }
79917848
BV
504 }
505
506 return SR_OK;
507}
508
584560f1 509static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 510 const struct sr_channel_group *cg)
3b533202 511{
269971dd 512 struct dev_context *devc;
f627afd6 513 double tmp_double;
86bb3f4a 514 uint64_t tmp_u64, p, q;
933defaa 515 int tmp_int, ch_idx, ret;
f627afd6
BV
516 unsigned int i;
517 const char *tmp_str;
8f996b89 518
3b533202 519 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 520 return SR_ERR_DEV_CLOSED;
3b533202 521
a370ef19 522 ret = SR_OK;
269971dd 523 devc = sdi->priv;
933defaa
BV
524 if (!cg) {
525 switch (key) {
526 case SR_CONF_LIMIT_FRAMES:
527 devc->limit_frames = g_variant_get_uint64(data);
528 break;
529 case SR_CONF_TRIGGER_SLOPE:
530 tmp_str = g_variant_get_string(data, NULL);
531 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
532 return SR_ERR_ARG;
533 devc->triggerslope = (tmp_str[0] == 'r')
534 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
535 break;
536 case SR_CONF_HORIZ_TRIGGERPOS:
537 tmp_double = g_variant_get_double(data);
538 if (tmp_double < 0.0 || tmp_double > 1.0) {
539 sr_err("Trigger position should be between 0.0 and 1.0.");
540 ret = SR_ERR_ARG;
541 } else
542 devc->triggerposition = tmp_double;
543 break;
544 case SR_CONF_BUFFERSIZE:
545 tmp_u64 = g_variant_get_uint64(data);
546 for (i = 0; i < 2; i++) {
547 if (devc->profile->buffersizes[i] == tmp_u64) {
548 devc->framesize = tmp_u64;
549 break;
550 }
a370ef19 551 }
933defaa
BV
552 if (i == 2)
553 ret = SR_ERR_ARG;
554 break;
555 case SR_CONF_TIMEBASE:
556 g_variant_get(data, "(tt)", &p, &q);
557 tmp_int = -1;
558 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
559 if (timebases[i][0] == p && timebases[i][1] == q) {
560 tmp_int = i;
561 break;
562 }
a370ef19 563 }
933defaa
BV
564 if (tmp_int >= 0)
565 devc->timebase = tmp_int;
566 else
ebb781a6 567 ret = SR_ERR_ARG;
933defaa
BV
568 break;
569 case SR_CONF_TRIGGER_SOURCE:
570 tmp_str = g_variant_get_string(data, NULL);
571 for (i = 0; trigger_sources[i]; i++) {
572 if (!strcmp(tmp_str, trigger_sources[i])) {
573 devc->triggersource = g_strdup(tmp_str);
574 break;
575 }
ebb781a6 576 }
933defaa
BV
577 if (trigger_sources[i] == 0)
578 ret = SR_ERR_ARG;
579 break;
580 default:
581 ret = SR_ERR_NA;
582 break;
ebb781a6 583 }
933defaa
BV
584 } else {
585 if (sdi->channel_groups->data == cg)
586 ch_idx = 0;
587 else if (sdi->channel_groups->next->data == cg)
588 ch_idx = 1;
589 else
590 return SR_ERR_ARG;
591 switch (key) {
592 case SR_CONF_FILTER:
593 devc->filter[ch_idx] = g_variant_get_boolean(data);
594 break;
595 case SR_CONF_VDIV:
596 g_variant_get(data, "(tt)", &p, &q);
597 tmp_int = -1;
598 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
599 if (vdivs[i][0] == p && vdivs[i][1] == q) {
600 tmp_int = i;
601 break;
602 }
313deed2 603 }
933defaa
BV
604 if (tmp_int >= 0) {
605 devc->voltage[ch_idx] = tmp_int;
606 } else
607 ret = SR_ERR_ARG;
608 break;
609 case SR_CONF_COUPLING:
610 tmp_str = g_variant_get_string(data, NULL);
611 for (i = 0; coupling[i]; i++) {
612 if (!strcmp(tmp_str, coupling[i])) {
613 devc->coupling[ch_idx] = i;
614 break;
615 }
b58fbd99 616 }
933defaa
BV
617 if (coupling[i] == 0)
618 ret = SR_ERR_ARG;
619 break;
620 default:
621 ret = SR_ERR_NA;
622 break;
b58fbd99 623 }
3b533202
BV
624 }
625
626 return ret;
627}
628
584560f1 629static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 630 const struct sr_channel_group *cg)
a1c743fc 631{
034accb5 632 struct dev_context *devc;
3973ee26
BV
633 GVariant *tuple, *rational[2];
634 GVariantBuilder gvb;
635 unsigned int i;
a1c743fc 636
933defaa 637 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
638 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
639 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
640 return SR_OK;
641 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 642 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 643 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
644 return SR_OK;
645 }
646
647 if (!sdi)
648 return SR_ERR_ARG;
649
650 if (!cg) {
93b118da 651 switch (key) {
933defaa
BV
652 case SR_CONF_DEVICE_OPTIONS:
653 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 654 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
655 break;
656 case SR_CONF_BUFFERSIZE:
657 if (!sdi)
658 return SR_ERR_ARG;
659 devc = sdi->priv;
660 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
661 devc->profile->buffersizes, 2, sizeof(uint64_t));
662 break;
663 case SR_CONF_TIMEBASE:
664 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
665 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
666 rational[0] = g_variant_new_uint64(timebases[i][0]);
667 rational[1] = g_variant_new_uint64(timebases[i][1]);
668 tuple = g_variant_new_tuple(rational, 2);
669 g_variant_builder_add_value(&gvb, tuple);
670 }
671 *data = g_variant_builder_end(&gvb);
672 break;
673 case SR_CONF_TRIGGER_SOURCE:
674 *data = g_variant_new_strv(trigger_sources,
675 ARRAY_SIZE(trigger_sources));
676 break;
677 case SR_CONF_TRIGGER_SLOPE:
678 *data = g_variant_new_strv(trigger_slopes,
679 ARRAY_SIZE(trigger_slopes));
680 break;
681 default:
682 return SR_ERR_NA;
3973ee26 683 }
933defaa 684 } else {
93b118da 685 switch (key) {
933defaa
BV
686 case SR_CONF_DEVICE_OPTIONS:
687 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
688 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
689 break;
690 case SR_CONF_COUPLING:
691 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
692 break;
693 case SR_CONF_VDIV:
694 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
695 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
696 rational[0] = g_variant_new_uint64(vdivs[i][0]);
697 rational[1] = g_variant_new_uint64(vdivs[i][1]);
698 tuple = g_variant_new_tuple(rational, 2);
699 g_variant_builder_add_value(&gvb, tuple);
700 }
701 *data = g_variant_builder_end(&gvb);
702 break;
703 default:
704 return SR_ERR_NA;
3973ee26 705 }
a1c743fc
BV
706 }
707
708 return SR_OK;
709}
710
69e19dd7 711static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 712 int num_samples)
3b533202
BV
713{
714 struct sr_datafeed_packet packet;
715 struct sr_datafeed_analog analog;
69e19dd7 716 struct dev_context *devc;
c5841b28 717 float ch1, ch2, range;
ba7dd8bb 718 int num_channels, data_offset, i;
3b533202 719
69e19dd7 720 devc = sdi->priv;
ba7dd8bb 721 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
722 packet.type = SR_DF_ANALOG;
723 packet.payload = &analog;
6e71ef3b 724 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 725 analog.channels = devc->enabled_channels;
e749a8cb 726 analog.num_samples = num_samples;
9956f285
UH
727 analog.mq = SR_MQ_VOLTAGE;
728 analog.unit = SR_UNIT_VOLT;
cf49d66b 729 analog.mqflags = 0;
886a52b6 730 /* TODO: Check malloc return value. */
ba7dd8bb 731 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 732 data_offset = 0;
3b533202 733 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
734 /*
735 * The device always sends data for both channels. If a channel
6e71ef3b 736 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
737 * data. However, we only send the requested channels to
738 * the bus.
c5841b28 739 *
e98b7f1b
UH
740 * Voltage values are encoded as a value 0-255 (0-512 on the
741 * DSO-5200*), where the value is a point in the range
742 * represented by the vdiv setting. There are 8 vertical divs,
743 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
744 * and 255 = +2V.
6e71ef3b 745 */
e98b7f1b 746 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 747 if (devc->ch1_enabled) {
933defaa 748 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 749 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
750 /* Value is centered around 0V. */
751 ch1 -= range / 2;
6e71ef3b
BV
752 analog.data[data_offset++] = ch1;
753 }
269971dd 754 if (devc->ch2_enabled) {
933defaa 755 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 756 ch2 = range / 255 * *(buf + i * 2);
c5841b28 757 ch2 -= range / 2;
6e71ef3b
BV
758 analog.data[data_offset++] = ch2;
759 }
3b533202 760 }
269971dd 761 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
762}
763
e98b7f1b
UH
764/*
765 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 766 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 767 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
768 * the libsigrok session bus.
769 */
770static void receive_transfer(struct libusb_transfer *transfer)
771{
772 struct sr_datafeed_packet packet;
69e19dd7 773 struct sr_dev_inst *sdi;
269971dd 774 struct dev_context *devc;
e749a8cb
BV
775 int num_samples, pre;
776
69e19dd7
BV
777 sdi = transfer->user_data;
778 devc = sdi->priv;
d4007311 779 sr_spew("receive_transfer(): status %d received %d bytes.",
46a743c1 780 transfer->status, transfer->actual_length);
e749a8cb
BV
781
782 if (transfer->actual_length == 0)
783 /* Nothing to send to the bus. */
784 return;
785
786 num_samples = transfer->actual_length / 2;
787
d4007311 788 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 789 devc->samp_received + num_samples, devc->framesize);
e749a8cb 790
e98b7f1b
UH
791 /*
792 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
793 * doesn't represent the trigger point. The offset at which the trigger
794 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
795 * from there up the session bus. The samples in the frame buffer
796 * before that trigger point came after the end of the device's frame
797 * buffer was reached, and it wrapped around to overwrite up until the
798 * trigger point.
e749a8cb 799 */
269971dd 800 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 801 /* Trigger point not yet reached. */
269971dd 802 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 803 /* The entire chunk is before the trigger point. */
269971dd 804 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 805 transfer->buffer, num_samples * 2);
269971dd 806 devc->samp_buffered += num_samples;
e749a8cb 807 } else {
e98b7f1b
UH
808 /*
809 * This chunk hits or overruns the trigger point.
e749a8cb 810 * Store the part before the trigger fired, and
e98b7f1b
UH
811 * send the rest up to the session bus.
812 */
269971dd
BV
813 pre = devc->trigger_offset - devc->samp_received;
814 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 815 transfer->buffer, pre * 2);
269971dd 816 devc->samp_buffered += pre;
e749a8cb
BV
817
818 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 819 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 820 devc->samp_buffered);
e749a8cb
BV
821
822 /* Avoid the corner case where the chunk ended at
823 * exactly the trigger point. */
824 if (num_samples > pre)
69e19dd7 825 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
826 num_samples - pre);
827 }
828 } else {
829 /* Already past the trigger point, just send it all out. */
69e19dd7 830 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
831 num_samples);
832 }
833
269971dd 834 devc->samp_received += num_samples;
e749a8cb
BV
835
836 /* Everything in this transfer was either copied to the buffer or
837 * sent to the session bus. */
3b533202
BV
838 g_free(transfer->buffer);
839 libusb_free_transfer(transfer);
3b533202 840
269971dd 841 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
842 /* That was the last chunk in this frame. Send the buffered
843 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 844 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 845 devc->samp_buffered);
69e19dd7 846 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
847
848 /* Mark the end of this frame. */
ae88b97b 849 packet.type = SR_DF_FRAME_END;
269971dd 850 sr_session_send(devc->cb_data, &packet);
ae88b97b 851
269971dd 852 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 853 /* Terminate session */
a3508e33 854 devc->dev_state = STOPPING;
ae88b97b 855 } else {
269971dd 856 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
857 }
858 }
3b533202
BV
859}
860
861static int handle_event(int fd, int revents, void *cb_data)
862{
a3508e33 863 const struct sr_dev_inst *sdi;
ae88b97b 864 struct sr_datafeed_packet packet;
3b533202 865 struct timeval tv;
4f840ce9 866 struct sr_dev_driver *di;
269971dd 867 struct dev_context *devc;
4f840ce9 868 struct drv_context *drvc;
ba7dd8bb 869 int num_channels;
6e6eeff4
BV
870 uint32_t trigger_offset;
871 uint8_t capturestate;
3b533202 872
3b533202
BV
873 (void)fd;
874 (void)revents;
875
269971dd 876 sdi = cb_data;
4f840ce9
ML
877 di = sdi->driver;
878 drvc = di->priv;
269971dd 879 devc = sdi->priv;
a3508e33
BV
880 if (devc->dev_state == STOPPING) {
881 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
882 sr_dbg("Stopping acquisition.");
883 /*
884 * TODO: Doesn't really cancel pending transfers so they might
885 * come in after SR_DF_END is sent.
886 */
102f1239 887 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33
BV
888
889 packet.type = SR_DF_END;
890 sr_session_send(sdi, &packet);
891
892 devc->dev_state = IDLE;
893
894 return TRUE;
895 }
896
3b533202
BV
897 /* Always handle pending libusb events. */
898 tv.tv_sec = tv.tv_usec = 0;
d4abb463 899 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 900
3b533202 901 /* TODO: ugh */
269971dd 902 if (devc->dev_state == NEW_CAPTURE) {
c118080b 903 if (dso_capture_start(sdi) != SR_OK)
3b533202 904 return TRUE;
c118080b 905 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 906 return TRUE;
c118080b 907// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 908// return TRUE;
e98b7f1b 909 sr_dbg("Successfully requested next chunk.");
269971dd 910 devc->dev_state = CAPTURE;
3b533202
BV
911 return TRUE;
912 }
269971dd 913 if (devc->dev_state != CAPTURE)
3b533202
BV
914 return TRUE;
915
c118080b 916 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 917 return TRUE;
3b533202 918
e98b7f1b
UH
919 sr_dbg("Capturestate %d.", capturestate);
920 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
921 switch (capturestate) {
922 case CAPTURE_EMPTY:
269971dd
BV
923 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
924 devc->capture_empty_count = 0;
c118080b 925 if (dso_capture_start(sdi) != SR_OK)
3b533202 926 break;
c118080b 927 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 928 break;
c118080b 929// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 930// break;
e98b7f1b 931 sr_dbg("Successfully requested next chunk.");
3b533202
BV
932 }
933 break;
934 case CAPTURE_FILLING:
e98b7f1b 935 /* No data yet. */
3b533202
BV
936 break;
937 case CAPTURE_READY_8BIT:
e749a8cb 938 /* Remember where in the captured frame the trigger is. */
269971dd 939 devc->trigger_offset = trigger_offset;
e749a8cb 940
ba7dd8bb 941 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 942 /* TODO: Check malloc return value. */
ba7dd8bb 943 devc->framebuf = g_try_malloc(devc->framesize * num_channels * 2);
269971dd 944 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 945
3b533202 946 /* Tell the scope to send us the first frame. */
69e19dd7 947 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 948 break;
ae88b97b 949
e98b7f1b
UH
950 /*
951 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
952 * the data we just told the scope to send.
953 */
269971dd 954 devc->dev_state = FETCH_DATA;
ae88b97b
BV
955
956 /* Tell the frontend a new frame is on the way. */
957 packet.type = SR_DF_FRAME_BEGIN;
269971dd 958 sr_session_send(sdi, &packet);
3b533202
BV
959 break;
960 case CAPTURE_READY_9BIT:
961 /* TODO */
e98b7f1b 962 sr_err("Not yet supported.");
3b533202
BV
963 break;
964 case CAPTURE_TIMEOUT:
965 /* Doesn't matter, we'll try again next time. */
966 break;
967 default:
e98b7f1b
UH
968 sr_dbg("Unknown capture state: %d.", capturestate);
969 break;
3b533202
BV
970 }
971
972 return TRUE;
973}
974
6078d2c9 975static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 976{
269971dd 977 struct dev_context *devc;
4f840ce9 978 struct sr_dev_driver *di = sdi->driver;
a873c594 979 struct drv_context *drvc = di->priv;
3b533202 980
3b533202 981 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 982 return SR_ERR_DEV_CLOSED;
3b533202 983
269971dd
BV
984 devc = sdi->priv;
985 devc->cb_data = cb_data;
3b533202 986
ba7dd8bb
UH
987 if (configure_channels(sdi) != SR_OK) {
988 sr_err("Failed to configure channels.");
014359e3
BV
989 return SR_ERR;
990 }
991
c118080b 992 if (dso_init(sdi) != SR_OK)
3b533202
BV
993 return SR_ERR;
994
c118080b 995 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
996 return SR_ERR;
997
269971dd 998 devc->dev_state = CAPTURE;
102f1239 999 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202
BV
1000
1001 /* Send header packet to the session bus. */
29a27196 1002 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 1003
3b533202
BV
1004 return SR_OK;
1005}
1006
6078d2c9 1007static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 1008{
269971dd
BV
1009 struct dev_context *devc;
1010
1011 (void)cb_data;
3b533202 1012
3b533202
BV
1013 if (sdi->status != SR_ST_ACTIVE)
1014 return SR_ERR;
1015
a3508e33
BV
1016 devc = sdi->priv;
1017 devc->dev_state = STOPPING;
3b533202
BV
1018
1019 return SR_OK;
1020}
1021
62bb8840 1022SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1023 .name = "hantek-dso",
1024 .longname = "Hantek DSO",
1025 .api_version = 1,
6078d2c9
UH
1026 .init = init,
1027 .cleanup = cleanup,
1028 .scan = scan,
1029 .dev_list = dev_list,
3b412e3a 1030 .dev_clear = dev_clear,
79917848 1031 .config_get = config_get,
035a1078 1032 .config_set = config_set,
a1c743fc 1033 .config_list = config_list,
6078d2c9
UH
1034 .dev_open = dev_open,
1035 .dev_close = dev_close,
1036 .dev_acquisition_start = dev_acquisition_start,
1037 .dev_acquisition_stop = dev_acquisition_stop,
269971dd 1038 .priv = NULL,
3b533202 1039};