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Pass driver struct pointer to driver callbacks.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
584560f1 43static const uint32_t scanopts[] = {
624f5b4c
BV
44 SR_CONF_CONN,
45};
46
5ecd9049 47static const uint32_t drvopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
933defaa
BV
49};
50
5ecd9049
BV
51static const uint32_t devopts[] = {
52 SR_CONF_CONTINUOUS | SR_CONF_SET,
53 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
54 SR_CONF_CONN | SR_CONF_GET,
55 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
57 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
58 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 61 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
62};
63
933defaa
BV
64static const uint32_t devopts_cg[] = {
65 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
66 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
67 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
68};
69
ba7dd8bb 70static const char *channel_names[] = {
78693401 71 "CH1", "CH2",
3b533202
BV
72 NULL,
73};
74
034accb5
BV
75static const uint64_t buffersizes_32k[] = {
76 10240, 32768,
77};
78static const uint64_t buffersizes_512k[] = {
79 10240, 524288,
80};
81static const uint64_t buffersizes_14k[] = {
82 10240, 14336,
83};
84
62bb8840 85static const struct dso_profile dev_profiles[] = {
88a13f30 86 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 87 "Hantek", "DSO-2090",
034accb5 88 buffersizes_32k,
7b78b2f7 89 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
90 { 0x04b4, 0x2150, 0x04b5, 0x2150,
91 "Hantek", "DSO-2150",
034accb5 92 buffersizes_32k,
7b78b2f7 93 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
94 { 0x04b4, 0x2250, 0x04b5, 0x2250,
95 "Hantek", "DSO-2250",
034accb5 96 buffersizes_512k,
7b78b2f7 97 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
98 { 0x04b4, 0x5200, 0x04b5, 0x5200,
99 "Hantek", "DSO-5200",
034accb5 100 buffersizes_14k,
7b78b2f7 101 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
102 { 0x04b4, 0x520a, 0x04b5, 0x520a,
103 "Hantek", "DSO-5200A",
034accb5 104 buffersizes_512k,
7b78b2f7 105 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 106 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
107};
108
86bb3f4a 109static const uint64_t timebases[][2] = {
a370ef19
BV
110 /* microseconds */
111 { 10, 1000000 },
112 { 20, 1000000 },
113 { 40, 1000000 },
114 { 100, 1000000 },
115 { 200, 1000000 },
116 { 400, 1000000 },
117 /* milliseconds */
118 { 1, 1000 },
119 { 2, 1000 },
120 { 4, 1000 },
121 { 10, 1000 },
122 { 20, 1000 },
123 { 40, 1000 },
124 { 100, 1000 },
125 { 200, 1000 },
126 { 400, 1000 },
a370ef19
BV
127};
128
86bb3f4a 129static const uint64_t vdivs[][2] = {
313deed2
BV
130 /* millivolts */
131 { 10, 1000 },
132 { 20, 1000 },
133 { 50, 1000 },
134 { 100, 1000 },
135 { 200, 1000 },
136 { 500, 1000 },
137 /* volts */
138 { 1, 1 },
139 { 2, 1 },
140 { 5, 1 },
313deed2
BV
141};
142
62bb8840 143static const char *trigger_sources[] = {
a370ef19
BV
144 "CH1",
145 "CH2",
146 "EXT",
88a13f30 147 /* TODO: forced */
a370ef19 148};
3b533202 149
933defaa
BV
150static const char *trigger_slopes[] = {
151 "r",
152 "f",
ebb781a6
BV
153};
154
62bb8840 155static const char *coupling[] = {
b58fbd99
BV
156 "AC",
157 "DC",
158 "GND",
b58fbd99
BV
159};
160
982947f7 161SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
e98b7f1b 162
6078d2c9 163static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 164
395206f4 165static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
166{
167 struct sr_dev_inst *sdi;
ba7dd8bb 168 struct sr_channel *ch;
933defaa 169 struct sr_channel_group *cg;
269971dd
BV
170 struct drv_context *drvc;
171 struct dev_context *devc;
87ca93c5 172 int i;
3b533202 173
aac29cc1 174 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
175 sdi->status = SR_ST_INITIALIZING;
176 sdi->vendor = g_strdup(prof->vendor);
177 sdi->model = g_strdup(prof->model);
4f840ce9 178 sdi->driver = &hantek_dso_driver_info;
3b533202 179
e98b7f1b 180 /*
ba7dd8bb 181 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
182 * a trigger source internal to the device.
183 */
ba7dd8bb 184 for (i = 0; channel_names[i]; i++) {
5e23fcab 185 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
186 cg = g_malloc0(sizeof(struct sr_channel_group));
187 cg->name = g_strdup(channel_names[i]);
188 cg->channels = g_slist_append(cg->channels, ch);
189 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
190 }
191
933defaa 192 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
193 devc->profile = prof;
194 devc->dev_state = IDLE;
195 devc->timebase = DEFAULT_TIMEBASE;
196 devc->ch1_enabled = TRUE;
197 devc->ch2_enabled = TRUE;
933defaa
BV
198 devc->voltage[0] = DEFAULT_VOLTAGE;
199 devc->voltage[1] = DEFAULT_VOLTAGE;
200 devc->coupling[0] = DEFAULT_COUPLING;
201 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
202 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
203 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
204 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
205 devc->framesize = DEFAULT_FRAMESIZE;
206 devc->triggerslope = SLOPE_POSITIVE;
207 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
208 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
209 sdi->priv = devc;
4f840ce9 210 drvc = hantek_dso_driver_info.priv;
269971dd 211 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
212
213 return sdi;
214}
215
ba7dd8bb 216static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 217{
014359e3 218 struct dev_context *devc;
ba7dd8bb 219 struct sr_channel *ch;
62bb8840 220 const GSList *l;
69e19dd7 221 int p;
3b533202 222
014359e3
BV
223 devc = sdi->priv;
224
ba7dd8bb 225 g_slist_free(devc->enabled_channels);
269971dd 226 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
227 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
228 ch = l->data;
69e19dd7 229 if (p == 0)
ba7dd8bb 230 devc->ch1_enabled = ch->enabled;
69e19dd7 231 else
ba7dd8bb
UH
232 devc->ch2_enabled = ch->enabled;
233 if (ch->enabled)
234 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
235 }
236
237 return SR_OK;
238}
239
949b3dc0 240static void clear_dev_context(void *priv)
39cfdd75 241{
269971dd 242 struct dev_context *devc;
39cfdd75 243
949b3dc0
BV
244 devc = priv;
245 g_free(devc->triggersource);
ba7dd8bb 246 g_slist_free(devc->enabled_channels);
39cfdd75 247
949b3dc0 248}
39cfdd75 249
4f840ce9 250static int dev_clear(const struct sr_dev_driver *di)
949b3dc0
BV
251{
252 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
253}
254
4f840ce9 255static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
61136ea6 256{
f6beaac5 257 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
258}
259
4f840ce9 260static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 261{
269971dd
BV
262 struct drv_context *drvc;
263 struct dev_context *devc;
294dbac7 264 struct sr_dev_inst *sdi;
46a743c1
BV
265 struct sr_usb_dev_inst *usb;
266 struct sr_config *src;
294dbac7
BV
267 const struct dso_profile *prof;
268 GSList *l, *devices, *conn_devices;
39cfdd75 269 struct libusb_device_descriptor des;
3b533202 270 libusb_device **devlist;
395206f4 271 int ret, i, j;
46a743c1 272 const char *conn;
395206f4 273 char connection_id[64];
e98b7f1b 274
a873c594 275 drvc = di->priv;
39cfdd75 276
4b97c74e
UH
277 devices = 0;
278
294dbac7
BV
279 conn = NULL;
280 for (l = options; l; l = l->next) {
281 src = l->data;
282 if (src->key == SR_CONF_CONN) {
283 conn = g_variant_get_string(src->data, NULL);
284 break;
285 }
286 }
287 if (conn)
288 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
289 else
290 conn_devices = NULL;
291
39cfdd75 292 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 293 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 294 for (i = 0; devlist[i]; i++) {
46a743c1 295 if (conn) {
294dbac7
BV
296 usb = NULL;
297 for (l = conn_devices; l; l = l->next) {
298 usb = l->data;
299 if (usb->bus == libusb_get_bus_number(devlist[i])
300 && usb->address == libusb_get_device_address(devlist[i]))
301 break;
302 }
303 if (!l)
304 /* This device matched none of the ones that
305 * matched the conn specification. */
306 continue;
46a743c1 307 }
294dbac7 308
61136ea6 309 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71 310 sr_err("Failed to get device descriptor: %s.",
46a743c1 311 libusb_error_name(ret));
3b533202
BV
312 continue;
313 }
314
395206f4
SA
315 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
316
3b533202
BV
317 prof = NULL;
318 for (j = 0; dev_profiles[j].orig_vid; j++) {
319 if (des.idVendor == dev_profiles[j].orig_vid
320 && des.idProduct == dev_profiles[j].orig_pid) {
321 /* Device matches the pre-firmware profile. */
322 prof = &dev_profiles[j];
e98b7f1b 323 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
324 sdi = dso_dev_new(prof);
325 sdi->connection_id = g_strdup(connection_id);
39cfdd75 326 devices = g_slist_append(devices, sdi);
269971dd 327 devc = sdi->priv;
3b533202
BV
328 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
329 prof->firmware) == SR_OK)
330 /* Remember when the firmware on this device was updated */
269971dd 331 devc->fw_updated = g_get_monotonic_time();
3b533202 332 else
395206f4 333 sr_err("Firmware upload failed");
3b533202 334 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 335 sdi->conn = sr_usb_dev_inst_new(
3b533202 336 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
337 break;
338 } else if (des.idVendor == dev_profiles[j].fw_vid
339 && des.idProduct == dev_profiles[j].fw_pid) {
340 /* Device matches the post-firmware profile. */
341 prof = &dev_profiles[j];
e98b7f1b 342 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
343 sdi = dso_dev_new(prof);
344 sdi->connection_id = g_strdup(connection_id);
3b533202 345 sdi->status = SR_ST_INACTIVE;
39cfdd75 346 devices = g_slist_append(devices, sdi);
d0eec1ee 347 sdi->inst_type = SR_INST_USB;
c118080b 348 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
349 libusb_get_bus_number(devlist[i]),
350 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
351 break;
352 }
353 }
354 if (!prof)
355 /* not a supported VID/PID */
356 continue;
357 }
358 libusb_free_device_list(devlist, 1);
359
39cfdd75 360 return devices;
3b533202
BV
361}
362
4f840ce9 363static GSList *dev_list(const struct sr_dev_driver *di)
811deee4 364{
0e94d524 365 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
366}
367
6078d2c9 368static int dev_open(struct sr_dev_inst *sdi)
3b533202 369{
269971dd 370 struct dev_context *devc;
c118080b 371 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
372 int64_t timediff_us, timediff_ms;
373 int err;
3b533202 374
269971dd 375 devc = sdi->priv;
c118080b 376 usb = sdi->conn;
3b533202
BV
377
378 /*
e98b7f1b
UH
379 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
380 * for the FX2 to renumerate.
3b533202 381 */
fc8fe3e3 382 err = SR_ERR;
269971dd 383 if (devc->fw_updated > 0) {
e98b7f1b
UH
384 sr_info("Waiting for device to reset.");
385 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 386 g_usleep(300 * 1000);
fc8fe3e3
BV
387 timediff_ms = 0;
388 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 389 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
390 break;
391 g_usleep(100 * 1000);
269971dd 392 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 393 timediff_ms = timediff_us / 1000;
e98b7f1b 394 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 395 }
e98b7f1b 396 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 397 } else {
25a0f108 398 err = dso_open(sdi);
3b533202
BV
399 }
400
401 if (err != SR_OK) {
e98b7f1b 402 sr_err("Unable to open device.");
3b533202
BV
403 return SR_ERR;
404 }
405
c118080b 406 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 407 if (err != 0) {
d4928d71 408 sr_err("Unable to claim interface: %s.",
46a743c1 409 libusb_error_name(err));
3b533202
BV
410 return SR_ERR;
411 }
412
413 return SR_OK;
414}
415
6078d2c9 416static int dev_close(struct sr_dev_inst *sdi)
3b533202 417{
3b533202
BV
418 dso_close(sdi);
419
420 return SR_OK;
421}
422
4f840ce9 423static int cleanup(const struct sr_dev_driver *di)
3b533202 424{
4f840ce9 425 return dev_clear(di);
3b533202
BV
426}
427
584560f1 428static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 429 const struct sr_channel_group *cg)
79917848 430{
933defaa 431 struct dev_context *devc;
624f5b4c 432 struct sr_usb_dev_inst *usb;
933defaa
BV
433 char str[128], *s;
434 const uint64_t *vdiv;
435 int ch_idx;
79917848 436
53b4680f 437 (void)cg;
8f996b89 438
584560f1 439 switch (key) {
bf622e6d 440 case SR_CONF_NUM_HDIV:
79917848
BV
441 *data = g_variant_new_int32(NUM_TIMEBASE);
442 break;
443 case SR_CONF_NUM_VDIV:
444 *data = g_variant_new_int32(NUM_VDIV);
445 break;
933defaa
BV
446 }
447
448 if (!sdi)
449 return SR_ERR_ARG;
450
451 devc = sdi->priv;
452 if (!cg) {
453 switch (key) {
454 case SR_CONF_CONN:
455 if (!sdi->conn)
456 return SR_ERR_ARG;
457 usb = sdi->conn;
458 if (usb->address == 255)
459 /* Device still needs to re-enumerate after firmware
460 * upload, so we don't know its (future) address. */
461 return SR_ERR;
462 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
463 *data = g_variant_new_string(str);
464 break;
465 case SR_CONF_TIMEBASE:
466 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
467 timebases[devc->timebase][1]);
468 break;
469 case SR_CONF_BUFFERSIZE:
470 *data = g_variant_new_uint64(devc->framesize);
471 break;
472 case SR_CONF_TRIGGER_SOURCE:
473 *data = g_variant_new_string(devc->triggersource);
474 break;
475 case SR_CONF_TRIGGER_SLOPE:
476 if (devc->triggerslope == SLOPE_POSITIVE)
477 s = "r";
478 else
479 s = "f";
480 *data = g_variant_new_string(s);
481 break;
482 case SR_CONF_HORIZ_TRIGGERPOS:
483 *data = g_variant_new_double(devc->triggerposition);
484 break;
485 default:
486 return SR_ERR_NA;
487 }
488 } else {
489 if (sdi->channel_groups->data == cg)
490 ch_idx = 0;
491 else if (sdi->channel_groups->next->data == cg)
492 ch_idx = 1;
493 else
494 return SR_ERR_ARG;
495 switch(key) {
496 case SR_CONF_FILTER:
497 *data = g_variant_new_boolean(devc->filter[ch_idx]);
498 break;
499 case SR_CONF_VDIV:
500 vdiv = vdivs[devc->voltage[ch_idx]];
501 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
502 break;
503 case SR_CONF_COUPLING:
504 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
505 break;
506 }
79917848
BV
507 }
508
509 return SR_OK;
510}
511
584560f1 512static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 513 const struct sr_channel_group *cg)
3b533202 514{
269971dd 515 struct dev_context *devc;
f627afd6 516 double tmp_double;
86bb3f4a 517 uint64_t tmp_u64, p, q;
933defaa 518 int tmp_int, ch_idx, ret;
f627afd6
BV
519 unsigned int i;
520 const char *tmp_str;
8f996b89 521
3b533202 522 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 523 return SR_ERR_DEV_CLOSED;
3b533202 524
a370ef19 525 ret = SR_OK;
269971dd 526 devc = sdi->priv;
933defaa
BV
527 if (!cg) {
528 switch (key) {
529 case SR_CONF_LIMIT_FRAMES:
530 devc->limit_frames = g_variant_get_uint64(data);
531 break;
532 case SR_CONF_TRIGGER_SLOPE:
533 tmp_str = g_variant_get_string(data, NULL);
534 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
535 return SR_ERR_ARG;
536 devc->triggerslope = (tmp_str[0] == 'r')
537 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
538 break;
539 case SR_CONF_HORIZ_TRIGGERPOS:
540 tmp_double = g_variant_get_double(data);
541 if (tmp_double < 0.0 || tmp_double > 1.0) {
542 sr_err("Trigger position should be between 0.0 and 1.0.");
543 ret = SR_ERR_ARG;
544 } else
545 devc->triggerposition = tmp_double;
546 break;
547 case SR_CONF_BUFFERSIZE:
548 tmp_u64 = g_variant_get_uint64(data);
549 for (i = 0; i < 2; i++) {
550 if (devc->profile->buffersizes[i] == tmp_u64) {
551 devc->framesize = tmp_u64;
552 break;
553 }
a370ef19 554 }
933defaa
BV
555 if (i == 2)
556 ret = SR_ERR_ARG;
557 break;
558 case SR_CONF_TIMEBASE:
559 g_variant_get(data, "(tt)", &p, &q);
560 tmp_int = -1;
561 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
562 if (timebases[i][0] == p && timebases[i][1] == q) {
563 tmp_int = i;
564 break;
565 }
a370ef19 566 }
933defaa
BV
567 if (tmp_int >= 0)
568 devc->timebase = tmp_int;
569 else
ebb781a6 570 ret = SR_ERR_ARG;
933defaa
BV
571 break;
572 case SR_CONF_TRIGGER_SOURCE:
573 tmp_str = g_variant_get_string(data, NULL);
574 for (i = 0; trigger_sources[i]; i++) {
575 if (!strcmp(tmp_str, trigger_sources[i])) {
576 devc->triggersource = g_strdup(tmp_str);
577 break;
578 }
ebb781a6 579 }
933defaa
BV
580 if (trigger_sources[i] == 0)
581 ret = SR_ERR_ARG;
582 break;
583 default:
584 ret = SR_ERR_NA;
585 break;
ebb781a6 586 }
933defaa
BV
587 } else {
588 if (sdi->channel_groups->data == cg)
589 ch_idx = 0;
590 else if (sdi->channel_groups->next->data == cg)
591 ch_idx = 1;
592 else
593 return SR_ERR_ARG;
594 switch (key) {
595 case SR_CONF_FILTER:
596 devc->filter[ch_idx] = g_variant_get_boolean(data);
597 break;
598 case SR_CONF_VDIV:
599 g_variant_get(data, "(tt)", &p, &q);
600 tmp_int = -1;
601 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
602 if (vdivs[i][0] == p && vdivs[i][1] == q) {
603 tmp_int = i;
604 break;
605 }
313deed2 606 }
933defaa
BV
607 if (tmp_int >= 0) {
608 devc->voltage[ch_idx] = tmp_int;
609 } else
610 ret = SR_ERR_ARG;
611 break;
612 case SR_CONF_COUPLING:
613 tmp_str = g_variant_get_string(data, NULL);
614 for (i = 0; coupling[i]; i++) {
615 if (!strcmp(tmp_str, coupling[i])) {
616 devc->coupling[ch_idx] = i;
617 break;
618 }
b58fbd99 619 }
933defaa
BV
620 if (coupling[i] == 0)
621 ret = SR_ERR_ARG;
622 break;
623 default:
624 ret = SR_ERR_NA;
625 break;
b58fbd99 626 }
3b533202
BV
627 }
628
629 return ret;
630}
631
584560f1 632static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 633 const struct sr_channel_group *cg)
a1c743fc 634{
034accb5 635 struct dev_context *devc;
3973ee26
BV
636 GVariant *tuple, *rational[2];
637 GVariantBuilder gvb;
638 unsigned int i;
a1c743fc 639
933defaa 640 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
641 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
642 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
643 return SR_OK;
644 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 645 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 646 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
647 return SR_OK;
648 }
649
650 if (!sdi)
651 return SR_ERR_ARG;
652
653 if (!cg) {
654 switch (key) {
655 case SR_CONF_DEVICE_OPTIONS:
656 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 657 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
658 break;
659 case SR_CONF_BUFFERSIZE:
660 if (!sdi)
661 return SR_ERR_ARG;
662 devc = sdi->priv;
663 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
664 devc->profile->buffersizes, 2, sizeof(uint64_t));
665 break;
666 case SR_CONF_TIMEBASE:
667 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
668 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
669 rational[0] = g_variant_new_uint64(timebases[i][0]);
670 rational[1] = g_variant_new_uint64(timebases[i][1]);
671 tuple = g_variant_new_tuple(rational, 2);
672 g_variant_builder_add_value(&gvb, tuple);
673 }
674 *data = g_variant_builder_end(&gvb);
675 break;
676 case SR_CONF_TRIGGER_SOURCE:
677 *data = g_variant_new_strv(trigger_sources,
678 ARRAY_SIZE(trigger_sources));
679 break;
680 case SR_CONF_TRIGGER_SLOPE:
681 *data = g_variant_new_strv(trigger_slopes,
682 ARRAY_SIZE(trigger_slopes));
683 break;
684 default:
685 return SR_ERR_NA;
3973ee26 686 }
933defaa
BV
687 } else {
688 switch (key) {
689 case SR_CONF_DEVICE_OPTIONS:
690 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
691 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
692 break;
693 case SR_CONF_COUPLING:
694 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
695 break;
696 case SR_CONF_VDIV:
697 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
698 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
699 rational[0] = g_variant_new_uint64(vdivs[i][0]);
700 rational[1] = g_variant_new_uint64(vdivs[i][1]);
701 tuple = g_variant_new_tuple(rational, 2);
702 g_variant_builder_add_value(&gvb, tuple);
703 }
704 *data = g_variant_builder_end(&gvb);
705 break;
706 default:
707 return SR_ERR_NA;
3973ee26 708 }
a1c743fc
BV
709 }
710
711 return SR_OK;
712}
713
69e19dd7 714static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 715 int num_samples)
3b533202
BV
716{
717 struct sr_datafeed_packet packet;
718 struct sr_datafeed_analog analog;
69e19dd7 719 struct dev_context *devc;
c5841b28 720 float ch1, ch2, range;
ba7dd8bb 721 int num_channels, data_offset, i;
3b533202 722
69e19dd7 723 devc = sdi->priv;
ba7dd8bb 724 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
725 packet.type = SR_DF_ANALOG;
726 packet.payload = &analog;
6e71ef3b 727 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 728 analog.channels = devc->enabled_channels;
e749a8cb 729 analog.num_samples = num_samples;
9956f285
UH
730 analog.mq = SR_MQ_VOLTAGE;
731 analog.unit = SR_UNIT_VOLT;
cf49d66b 732 analog.mqflags = 0;
886a52b6 733 /* TODO: Check malloc return value. */
ba7dd8bb 734 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 735 data_offset = 0;
3b533202 736 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
737 /*
738 * The device always sends data for both channels. If a channel
6e71ef3b 739 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
740 * data. However, we only send the requested channels to
741 * the bus.
c5841b28 742 *
e98b7f1b
UH
743 * Voltage values are encoded as a value 0-255 (0-512 on the
744 * DSO-5200*), where the value is a point in the range
745 * represented by the vdiv setting. There are 8 vertical divs,
746 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
747 * and 255 = +2V.
6e71ef3b 748 */
e98b7f1b 749 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 750 if (devc->ch1_enabled) {
933defaa 751 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 752 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
753 /* Value is centered around 0V. */
754 ch1 -= range / 2;
6e71ef3b
BV
755 analog.data[data_offset++] = ch1;
756 }
269971dd 757 if (devc->ch2_enabled) {
933defaa 758 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 759 ch2 = range / 255 * *(buf + i * 2);
c5841b28 760 ch2 -= range / 2;
6e71ef3b
BV
761 analog.data[data_offset++] = ch2;
762 }
3b533202 763 }
269971dd 764 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
765}
766
e98b7f1b
UH
767/*
768 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 769 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 770 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
771 * the libsigrok session bus.
772 */
773static void receive_transfer(struct libusb_transfer *transfer)
774{
775 struct sr_datafeed_packet packet;
69e19dd7 776 struct sr_dev_inst *sdi;
269971dd 777 struct dev_context *devc;
e749a8cb
BV
778 int num_samples, pre;
779
69e19dd7
BV
780 sdi = transfer->user_data;
781 devc = sdi->priv;
d4007311 782 sr_spew("receive_transfer(): status %d received %d bytes.",
46a743c1 783 transfer->status, transfer->actual_length);
e749a8cb
BV
784
785 if (transfer->actual_length == 0)
786 /* Nothing to send to the bus. */
787 return;
788
789 num_samples = transfer->actual_length / 2;
790
d4007311 791 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 792 devc->samp_received + num_samples, devc->framesize);
e749a8cb 793
e98b7f1b
UH
794 /*
795 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
796 * doesn't represent the trigger point. The offset at which the trigger
797 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
798 * from there up the session bus. The samples in the frame buffer
799 * before that trigger point came after the end of the device's frame
800 * buffer was reached, and it wrapped around to overwrite up until the
801 * trigger point.
e749a8cb 802 */
269971dd 803 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 804 /* Trigger point not yet reached. */
269971dd 805 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 806 /* The entire chunk is before the trigger point. */
269971dd 807 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 808 transfer->buffer, num_samples * 2);
269971dd 809 devc->samp_buffered += num_samples;
e749a8cb 810 } else {
e98b7f1b
UH
811 /*
812 * This chunk hits or overruns the trigger point.
e749a8cb 813 * Store the part before the trigger fired, and
e98b7f1b
UH
814 * send the rest up to the session bus.
815 */
269971dd
BV
816 pre = devc->trigger_offset - devc->samp_received;
817 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 818 transfer->buffer, pre * 2);
269971dd 819 devc->samp_buffered += pre;
e749a8cb
BV
820
821 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 822 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 823 devc->samp_buffered);
e749a8cb
BV
824
825 /* Avoid the corner case where the chunk ended at
826 * exactly the trigger point. */
827 if (num_samples > pre)
69e19dd7 828 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
829 num_samples - pre);
830 }
831 } else {
832 /* Already past the trigger point, just send it all out. */
69e19dd7 833 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
834 num_samples);
835 }
836
269971dd 837 devc->samp_received += num_samples;
e749a8cb
BV
838
839 /* Everything in this transfer was either copied to the buffer or
840 * sent to the session bus. */
3b533202
BV
841 g_free(transfer->buffer);
842 libusb_free_transfer(transfer);
3b533202 843
269971dd 844 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
845 /* That was the last chunk in this frame. Send the buffered
846 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 847 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 848 devc->samp_buffered);
69e19dd7 849 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
850
851 /* Mark the end of this frame. */
ae88b97b 852 packet.type = SR_DF_FRAME_END;
269971dd 853 sr_session_send(devc->cb_data, &packet);
ae88b97b 854
269971dd 855 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 856 /* Terminate session */
a3508e33 857 devc->dev_state = STOPPING;
ae88b97b 858 } else {
269971dd 859 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
860 }
861 }
3b533202
BV
862}
863
864static int handle_event(int fd, int revents, void *cb_data)
865{
a3508e33 866 const struct sr_dev_inst *sdi;
ae88b97b 867 struct sr_datafeed_packet packet;
3b533202 868 struct timeval tv;
4f840ce9 869 struct sr_dev_driver *di;
269971dd 870 struct dev_context *devc;
4f840ce9 871 struct drv_context *drvc;
ba7dd8bb 872 int num_channels;
6e6eeff4
BV
873 uint32_t trigger_offset;
874 uint8_t capturestate;
3b533202 875
3b533202
BV
876 (void)fd;
877 (void)revents;
878
269971dd 879 sdi = cb_data;
4f840ce9
ML
880 di = sdi->driver;
881 drvc = di->priv;
269971dd 882 devc = sdi->priv;
a3508e33
BV
883 if (devc->dev_state == STOPPING) {
884 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
885 sr_dbg("Stopping acquisition.");
886 /*
887 * TODO: Doesn't really cancel pending transfers so they might
888 * come in after SR_DF_END is sent.
889 */
102f1239 890 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33
BV
891
892 packet.type = SR_DF_END;
893 sr_session_send(sdi, &packet);
894
895 devc->dev_state = IDLE;
896
897 return TRUE;
898 }
899
3b533202
BV
900 /* Always handle pending libusb events. */
901 tv.tv_sec = tv.tv_usec = 0;
d4abb463 902 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 903
3b533202 904 /* TODO: ugh */
269971dd 905 if (devc->dev_state == NEW_CAPTURE) {
c118080b 906 if (dso_capture_start(sdi) != SR_OK)
3b533202 907 return TRUE;
c118080b 908 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 909 return TRUE;
c118080b 910// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 911// return TRUE;
e98b7f1b 912 sr_dbg("Successfully requested next chunk.");
269971dd 913 devc->dev_state = CAPTURE;
3b533202
BV
914 return TRUE;
915 }
269971dd 916 if (devc->dev_state != CAPTURE)
3b533202
BV
917 return TRUE;
918
c118080b 919 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 920 return TRUE;
3b533202 921
e98b7f1b
UH
922 sr_dbg("Capturestate %d.", capturestate);
923 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
924 switch (capturestate) {
925 case CAPTURE_EMPTY:
269971dd
BV
926 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
927 devc->capture_empty_count = 0;
c118080b 928 if (dso_capture_start(sdi) != SR_OK)
3b533202 929 break;
c118080b 930 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 931 break;
c118080b 932// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 933// break;
e98b7f1b 934 sr_dbg("Successfully requested next chunk.");
3b533202
BV
935 }
936 break;
937 case CAPTURE_FILLING:
e98b7f1b 938 /* No data yet. */
3b533202
BV
939 break;
940 case CAPTURE_READY_8BIT:
e749a8cb 941 /* Remember where in the captured frame the trigger is. */
269971dd 942 devc->trigger_offset = trigger_offset;
e749a8cb 943
ba7dd8bb 944 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 945 /* TODO: Check malloc return value. */
ba7dd8bb 946 devc->framebuf = g_try_malloc(devc->framesize * num_channels * 2);
269971dd 947 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 948
3b533202 949 /* Tell the scope to send us the first frame. */
69e19dd7 950 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 951 break;
ae88b97b 952
e98b7f1b
UH
953 /*
954 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
955 * the data we just told the scope to send.
956 */
269971dd 957 devc->dev_state = FETCH_DATA;
ae88b97b
BV
958
959 /* Tell the frontend a new frame is on the way. */
960 packet.type = SR_DF_FRAME_BEGIN;
269971dd 961 sr_session_send(sdi, &packet);
3b533202
BV
962 break;
963 case CAPTURE_READY_9BIT:
964 /* TODO */
e98b7f1b 965 sr_err("Not yet supported.");
3b533202
BV
966 break;
967 case CAPTURE_TIMEOUT:
968 /* Doesn't matter, we'll try again next time. */
969 break;
970 default:
e98b7f1b
UH
971 sr_dbg("Unknown capture state: %d.", capturestate);
972 break;
3b533202
BV
973 }
974
975 return TRUE;
976}
977
6078d2c9 978static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 979{
269971dd 980 struct dev_context *devc;
4f840ce9 981 struct sr_dev_driver *di = sdi->driver;
a873c594 982 struct drv_context *drvc = di->priv;
3b533202 983
3b533202 984 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 985 return SR_ERR_DEV_CLOSED;
3b533202 986
269971dd
BV
987 devc = sdi->priv;
988 devc->cb_data = cb_data;
3b533202 989
ba7dd8bb
UH
990 if (configure_channels(sdi) != SR_OK) {
991 sr_err("Failed to configure channels.");
014359e3
BV
992 return SR_ERR;
993 }
994
c118080b 995 if (dso_init(sdi) != SR_OK)
3b533202
BV
996 return SR_ERR;
997
c118080b 998 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
999 return SR_ERR;
1000
269971dd 1001 devc->dev_state = CAPTURE;
102f1239 1002 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202
BV
1003
1004 /* Send header packet to the session bus. */
29a27196 1005 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 1006
3b533202
BV
1007 return SR_OK;
1008}
1009
6078d2c9 1010static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 1011{
269971dd
BV
1012 struct dev_context *devc;
1013
1014 (void)cb_data;
3b533202 1015
3b533202
BV
1016 if (sdi->status != SR_ST_ACTIVE)
1017 return SR_ERR;
1018
a3508e33
BV
1019 devc = sdi->priv;
1020 devc->dev_state = STOPPING;
3b533202
BV
1021
1022 return SR_OK;
1023}
1024
62bb8840 1025SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1026 .name = "hantek-dso",
1027 .longname = "Hantek DSO",
1028 .api_version = 1,
6078d2c9
UH
1029 .init = init,
1030 .cleanup = cleanup,
1031 .scan = scan,
1032 .dev_list = dev_list,
3b412e3a 1033 .dev_clear = dev_clear,
79917848 1034 .config_get = config_get,
035a1078 1035 .config_set = config_set,
a1c743fc 1036 .config_list = config_list,
6078d2c9
UH
1037 .dev_open = dev_open,
1038 .dev_close = dev_close,
1039 .dev_acquisition_start = dev_acquisition_start,
1040 .dev_acquisition_stop = dev_acquisition_stop,
269971dd 1041 .priv = NULL,
3b533202 1042};