]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-dso/api.c
Rename SR_CONF_NUM_TIMEBASE to SR_CONF_NUM_HDIV.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
584560f1 43static const uint32_t scanopts[] = {
624f5b4c
BV
44 SR_CONF_CONN,
45};
46
5ecd9049 47static const uint32_t drvopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
933defaa
BV
49};
50
5ecd9049
BV
51static const uint32_t devopts[] = {
52 SR_CONF_CONTINUOUS | SR_CONF_SET,
53 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
54 SR_CONF_CONN | SR_CONF_GET,
55 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
57 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
58 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 61 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
62};
63
933defaa
BV
64static const uint32_t devopts_cg[] = {
65 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
66 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
67 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
68};
69
ba7dd8bb 70static const char *channel_names[] = {
78693401 71 "CH1", "CH2",
3b533202
BV
72 NULL,
73};
74
034accb5
BV
75static const uint64_t buffersizes_32k[] = {
76 10240, 32768,
77};
78static const uint64_t buffersizes_512k[] = {
79 10240, 524288,
80};
81static const uint64_t buffersizes_14k[] = {
82 10240, 14336,
83};
84
62bb8840 85static const struct dso_profile dev_profiles[] = {
88a13f30 86 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 87 "Hantek", "DSO-2090",
034accb5 88 buffersizes_32k,
7b78b2f7 89 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
90 { 0x04b4, 0x2150, 0x04b5, 0x2150,
91 "Hantek", "DSO-2150",
034accb5 92 buffersizes_32k,
7b78b2f7 93 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
94 { 0x04b4, 0x2250, 0x04b5, 0x2250,
95 "Hantek", "DSO-2250",
034accb5 96 buffersizes_512k,
7b78b2f7 97 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
98 { 0x04b4, 0x5200, 0x04b5, 0x5200,
99 "Hantek", "DSO-5200",
034accb5 100 buffersizes_14k,
7b78b2f7 101 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
102 { 0x04b4, 0x520a, 0x04b5, 0x520a,
103 "Hantek", "DSO-5200A",
034accb5 104 buffersizes_512k,
7b78b2f7 105 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 106 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
107};
108
86bb3f4a 109static const uint64_t timebases[][2] = {
a370ef19
BV
110 /* microseconds */
111 { 10, 1000000 },
112 { 20, 1000000 },
113 { 40, 1000000 },
114 { 100, 1000000 },
115 { 200, 1000000 },
116 { 400, 1000000 },
117 /* milliseconds */
118 { 1, 1000 },
119 { 2, 1000 },
120 { 4, 1000 },
121 { 10, 1000 },
122 { 20, 1000 },
123 { 40, 1000 },
124 { 100, 1000 },
125 { 200, 1000 },
126 { 400, 1000 },
a370ef19
BV
127};
128
86bb3f4a 129static const uint64_t vdivs[][2] = {
313deed2
BV
130 /* millivolts */
131 { 10, 1000 },
132 { 20, 1000 },
133 { 50, 1000 },
134 { 100, 1000 },
135 { 200, 1000 },
136 { 500, 1000 },
137 /* volts */
138 { 1, 1 },
139 { 2, 1 },
140 { 5, 1 },
313deed2
BV
141};
142
62bb8840 143static const char *trigger_sources[] = {
a370ef19
BV
144 "CH1",
145 "CH2",
146 "EXT",
88a13f30 147 /* TODO: forced */
a370ef19 148};
3b533202 149
933defaa
BV
150static const char *trigger_slopes[] = {
151 "r",
152 "f",
ebb781a6
BV
153};
154
62bb8840 155static const char *coupling[] = {
b58fbd99
BV
156 "AC",
157 "DC",
158 "GND",
b58fbd99
BV
159};
160
982947f7 161SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 162static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 163
6078d2c9 164static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 165
395206f4 166static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
167{
168 struct sr_dev_inst *sdi;
ba7dd8bb 169 struct sr_channel *ch;
933defaa 170 struct sr_channel_group *cg;
269971dd
BV
171 struct drv_context *drvc;
172 struct dev_context *devc;
87ca93c5 173 int i;
3b533202 174
aac29cc1 175 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
176 sdi->status = SR_ST_INITIALIZING;
177 sdi->vendor = g_strdup(prof->vendor);
178 sdi->model = g_strdup(prof->model);
a873c594 179 sdi->driver = di;
3b533202 180
e98b7f1b 181 /*
ba7dd8bb 182 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
183 * a trigger source internal to the device.
184 */
ba7dd8bb 185 for (i = 0; channel_names[i]; i++) {
933defaa 186 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
ba7dd8bb 187 sdi->channels = g_slist_append(sdi->channels, ch);
933defaa
BV
188 cg = g_malloc0(sizeof(struct sr_channel_group));
189 cg->name = g_strdup(channel_names[i]);
190 cg->channels = g_slist_append(cg->channels, ch);
191 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
192 }
193
933defaa 194 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
195 devc->profile = prof;
196 devc->dev_state = IDLE;
197 devc->timebase = DEFAULT_TIMEBASE;
198 devc->ch1_enabled = TRUE;
199 devc->ch2_enabled = TRUE;
933defaa
BV
200 devc->voltage[0] = DEFAULT_VOLTAGE;
201 devc->voltage[1] = DEFAULT_VOLTAGE;
202 devc->coupling[0] = DEFAULT_COUPLING;
203 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
204 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
205 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
206 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
207 devc->framesize = DEFAULT_FRAMESIZE;
208 devc->triggerslope = SLOPE_POSITIVE;
209 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
210 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
211 sdi->priv = devc;
a873c594 212 drvc = di->priv;
269971dd 213 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
214
215 return sdi;
216}
217
ba7dd8bb 218static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 219{
014359e3 220 struct dev_context *devc;
ba7dd8bb 221 struct sr_channel *ch;
62bb8840 222 const GSList *l;
69e19dd7 223 int p;
3b533202 224
014359e3
BV
225 devc = sdi->priv;
226
ba7dd8bb 227 g_slist_free(devc->enabled_channels);
269971dd 228 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
229 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
230 ch = l->data;
69e19dd7 231 if (p == 0)
ba7dd8bb 232 devc->ch1_enabled = ch->enabled;
69e19dd7 233 else
ba7dd8bb
UH
234 devc->ch2_enabled = ch->enabled;
235 if (ch->enabled)
236 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
237 }
238
239 return SR_OK;
240}
241
949b3dc0 242static void clear_dev_context(void *priv)
39cfdd75 243{
269971dd 244 struct dev_context *devc;
39cfdd75 245
949b3dc0
BV
246 devc = priv;
247 g_free(devc->triggersource);
ba7dd8bb 248 g_slist_free(devc->enabled_channels);
39cfdd75 249
949b3dc0 250}
39cfdd75 251
3b412e3a 252static int dev_clear(void)
949b3dc0
BV
253{
254 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
255}
256
6078d2c9 257static int init(struct sr_context *sr_ctx)
61136ea6 258{
f6beaac5 259 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
260}
261
6078d2c9 262static GSList *scan(GSList *options)
3b533202 263{
269971dd
BV
264 struct drv_context *drvc;
265 struct dev_context *devc;
294dbac7 266 struct sr_dev_inst *sdi;
46a743c1
BV
267 struct sr_usb_dev_inst *usb;
268 struct sr_config *src;
294dbac7
BV
269 const struct dso_profile *prof;
270 GSList *l, *devices, *conn_devices;
39cfdd75 271 struct libusb_device_descriptor des;
3b533202 272 libusb_device **devlist;
395206f4 273 int ret, i, j;
46a743c1 274 const char *conn;
395206f4 275 char connection_id[64];
e98b7f1b 276
a873c594 277 drvc = di->priv;
39cfdd75 278
4b97c74e
UH
279 devices = 0;
280
294dbac7
BV
281 conn = NULL;
282 for (l = options; l; l = l->next) {
283 src = l->data;
284 if (src->key == SR_CONF_CONN) {
285 conn = g_variant_get_string(src->data, NULL);
286 break;
287 }
288 }
289 if (conn)
290 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
291 else
292 conn_devices = NULL;
293
39cfdd75 294 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 295 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 296 for (i = 0; devlist[i]; i++) {
46a743c1 297 if (conn) {
294dbac7
BV
298 usb = NULL;
299 for (l = conn_devices; l; l = l->next) {
300 usb = l->data;
301 if (usb->bus == libusb_get_bus_number(devlist[i])
302 && usb->address == libusb_get_device_address(devlist[i]))
303 break;
304 }
305 if (!l)
306 /* This device matched none of the ones that
307 * matched the conn specification. */
308 continue;
46a743c1 309 }
294dbac7 310
61136ea6 311 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71 312 sr_err("Failed to get device descriptor: %s.",
46a743c1 313 libusb_error_name(ret));
3b533202
BV
314 continue;
315 }
316
395206f4
SA
317 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
318
3b533202
BV
319 prof = NULL;
320 for (j = 0; dev_profiles[j].orig_vid; j++) {
321 if (des.idVendor == dev_profiles[j].orig_vid
322 && des.idProduct == dev_profiles[j].orig_pid) {
323 /* Device matches the pre-firmware profile. */
324 prof = &dev_profiles[j];
e98b7f1b 325 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
326 sdi = dso_dev_new(prof);
327 sdi->connection_id = g_strdup(connection_id);
39cfdd75 328 devices = g_slist_append(devices, sdi);
269971dd 329 devc = sdi->priv;
3b533202
BV
330 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
331 prof->firmware) == SR_OK)
332 /* Remember when the firmware on this device was updated */
269971dd 333 devc->fw_updated = g_get_monotonic_time();
3b533202 334 else
395206f4 335 sr_err("Firmware upload failed");
3b533202 336 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 337 sdi->conn = sr_usb_dev_inst_new(
3b533202 338 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
339 break;
340 } else if (des.idVendor == dev_profiles[j].fw_vid
341 && des.idProduct == dev_profiles[j].fw_pid) {
342 /* Device matches the post-firmware profile. */
343 prof = &dev_profiles[j];
e98b7f1b 344 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
345 sdi = dso_dev_new(prof);
346 sdi->connection_id = g_strdup(connection_id);
3b533202 347 sdi->status = SR_ST_INACTIVE;
39cfdd75 348 devices = g_slist_append(devices, sdi);
d0eec1ee 349 sdi->inst_type = SR_INST_USB;
c118080b 350 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
351 libusb_get_bus_number(devlist[i]),
352 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
353 break;
354 }
355 }
356 if (!prof)
357 /* not a supported VID/PID */
358 continue;
359 }
360 libusb_free_device_list(devlist, 1);
361
39cfdd75 362 return devices;
3b533202
BV
363}
364
6078d2c9 365static GSList *dev_list(void)
811deee4 366{
0e94d524 367 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
368}
369
6078d2c9 370static int dev_open(struct sr_dev_inst *sdi)
3b533202 371{
269971dd 372 struct dev_context *devc;
c118080b 373 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
374 int64_t timediff_us, timediff_ms;
375 int err;
3b533202 376
269971dd 377 devc = sdi->priv;
c118080b 378 usb = sdi->conn;
3b533202
BV
379
380 /*
e98b7f1b
UH
381 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
382 * for the FX2 to renumerate.
3b533202 383 */
fc8fe3e3 384 err = SR_ERR;
269971dd 385 if (devc->fw_updated > 0) {
e98b7f1b
UH
386 sr_info("Waiting for device to reset.");
387 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 388 g_usleep(300 * 1000);
fc8fe3e3
BV
389 timediff_ms = 0;
390 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 391 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
392 break;
393 g_usleep(100 * 1000);
269971dd 394 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 395 timediff_ms = timediff_us / 1000;
e98b7f1b 396 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 397 }
e98b7f1b 398 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 399 } else {
25a0f108 400 err = dso_open(sdi);
3b533202
BV
401 }
402
403 if (err != SR_OK) {
e98b7f1b 404 sr_err("Unable to open device.");
3b533202
BV
405 return SR_ERR;
406 }
407
c118080b 408 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 409 if (err != 0) {
d4928d71 410 sr_err("Unable to claim interface: %s.",
46a743c1 411 libusb_error_name(err));
3b533202
BV
412 return SR_ERR;
413 }
414
415 return SR_OK;
416}
417
6078d2c9 418static int dev_close(struct sr_dev_inst *sdi)
3b533202 419{
3b533202
BV
420 dso_close(sdi);
421
422 return SR_OK;
423}
424
6078d2c9 425static int cleanup(void)
3b533202 426{
3b412e3a 427 return dev_clear();
3b533202
BV
428}
429
584560f1 430static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 431 const struct sr_channel_group *cg)
79917848 432{
933defaa 433 struct dev_context *devc;
624f5b4c 434 struct sr_usb_dev_inst *usb;
933defaa
BV
435 char str[128], *s;
436 const uint64_t *vdiv;
437 int ch_idx;
79917848 438
53b4680f 439 (void)cg;
8f996b89 440
584560f1 441 switch (key) {
bf622e6d 442 case SR_CONF_NUM_HDIV:
79917848
BV
443 *data = g_variant_new_int32(NUM_TIMEBASE);
444 break;
445 case SR_CONF_NUM_VDIV:
446 *data = g_variant_new_int32(NUM_VDIV);
447 break;
933defaa
BV
448 }
449
450 if (!sdi)
451 return SR_ERR_ARG;
452
453 devc = sdi->priv;
454 if (!cg) {
455 switch (key) {
456 case SR_CONF_CONN:
457 if (!sdi->conn)
458 return SR_ERR_ARG;
459 usb = sdi->conn;
460 if (usb->address == 255)
461 /* Device still needs to re-enumerate after firmware
462 * upload, so we don't know its (future) address. */
463 return SR_ERR;
464 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
465 *data = g_variant_new_string(str);
466 break;
467 case SR_CONF_TIMEBASE:
468 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
469 timebases[devc->timebase][1]);
470 break;
471 case SR_CONF_BUFFERSIZE:
472 *data = g_variant_new_uint64(devc->framesize);
473 break;
474 case SR_CONF_TRIGGER_SOURCE:
475 *data = g_variant_new_string(devc->triggersource);
476 break;
477 case SR_CONF_TRIGGER_SLOPE:
478 if (devc->triggerslope == SLOPE_POSITIVE)
479 s = "r";
480 else
481 s = "f";
482 *data = g_variant_new_string(s);
483 break;
484 case SR_CONF_HORIZ_TRIGGERPOS:
485 *data = g_variant_new_double(devc->triggerposition);
486 break;
487 default:
488 return SR_ERR_NA;
489 }
490 } else {
491 if (sdi->channel_groups->data == cg)
492 ch_idx = 0;
493 else if (sdi->channel_groups->next->data == cg)
494 ch_idx = 1;
495 else
496 return SR_ERR_ARG;
497 switch(key) {
498 case SR_CONF_FILTER:
499 *data = g_variant_new_boolean(devc->filter[ch_idx]);
500 break;
501 case SR_CONF_VDIV:
502 vdiv = vdivs[devc->voltage[ch_idx]];
503 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
504 break;
505 case SR_CONF_COUPLING:
506 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
507 break;
508 }
79917848
BV
509 }
510
511 return SR_OK;
512}
513
584560f1 514static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 515 const struct sr_channel_group *cg)
3b533202 516{
269971dd 517 struct dev_context *devc;
f627afd6 518 double tmp_double;
86bb3f4a 519 uint64_t tmp_u64, p, q;
933defaa 520 int tmp_int, ch_idx, ret;
f627afd6
BV
521 unsigned int i;
522 const char *tmp_str;
8f996b89 523
3b533202 524 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 525 return SR_ERR_DEV_CLOSED;
3b533202 526
a370ef19 527 ret = SR_OK;
269971dd 528 devc = sdi->priv;
933defaa
BV
529 if (!cg) {
530 switch (key) {
531 case SR_CONF_LIMIT_FRAMES:
532 devc->limit_frames = g_variant_get_uint64(data);
533 break;
534 case SR_CONF_TRIGGER_SLOPE:
535 tmp_str = g_variant_get_string(data, NULL);
536 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
537 return SR_ERR_ARG;
538 devc->triggerslope = (tmp_str[0] == 'r')
539 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
540 break;
541 case SR_CONF_HORIZ_TRIGGERPOS:
542 tmp_double = g_variant_get_double(data);
543 if (tmp_double < 0.0 || tmp_double > 1.0) {
544 sr_err("Trigger position should be between 0.0 and 1.0.");
545 ret = SR_ERR_ARG;
546 } else
547 devc->triggerposition = tmp_double;
548 break;
549 case SR_CONF_BUFFERSIZE:
550 tmp_u64 = g_variant_get_uint64(data);
551 for (i = 0; i < 2; i++) {
552 if (devc->profile->buffersizes[i] == tmp_u64) {
553 devc->framesize = tmp_u64;
554 break;
555 }
a370ef19 556 }
933defaa
BV
557 if (i == 2)
558 ret = SR_ERR_ARG;
559 break;
560 case SR_CONF_TIMEBASE:
561 g_variant_get(data, "(tt)", &p, &q);
562 tmp_int = -1;
563 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
564 if (timebases[i][0] == p && timebases[i][1] == q) {
565 tmp_int = i;
566 break;
567 }
a370ef19 568 }
933defaa
BV
569 if (tmp_int >= 0)
570 devc->timebase = tmp_int;
571 else
ebb781a6 572 ret = SR_ERR_ARG;
933defaa
BV
573 break;
574 case SR_CONF_TRIGGER_SOURCE:
575 tmp_str = g_variant_get_string(data, NULL);
576 for (i = 0; trigger_sources[i]; i++) {
577 if (!strcmp(tmp_str, trigger_sources[i])) {
578 devc->triggersource = g_strdup(tmp_str);
579 break;
580 }
ebb781a6 581 }
933defaa
BV
582 if (trigger_sources[i] == 0)
583 ret = SR_ERR_ARG;
584 break;
585 default:
586 ret = SR_ERR_NA;
587 break;
ebb781a6 588 }
933defaa
BV
589 } else {
590 if (sdi->channel_groups->data == cg)
591 ch_idx = 0;
592 else if (sdi->channel_groups->next->data == cg)
593 ch_idx = 1;
594 else
595 return SR_ERR_ARG;
596 switch (key) {
597 case SR_CONF_FILTER:
598 devc->filter[ch_idx] = g_variant_get_boolean(data);
599 break;
600 case SR_CONF_VDIV:
601 g_variant_get(data, "(tt)", &p, &q);
602 tmp_int = -1;
603 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
604 if (vdivs[i][0] == p && vdivs[i][1] == q) {
605 tmp_int = i;
606 break;
607 }
313deed2 608 }
933defaa
BV
609 if (tmp_int >= 0) {
610 devc->voltage[ch_idx] = tmp_int;
611 } else
612 ret = SR_ERR_ARG;
613 break;
614 case SR_CONF_COUPLING:
615 tmp_str = g_variant_get_string(data, NULL);
616 for (i = 0; coupling[i]; i++) {
617 if (!strcmp(tmp_str, coupling[i])) {
618 devc->coupling[ch_idx] = i;
619 break;
620 }
b58fbd99 621 }
933defaa
BV
622 if (coupling[i] == 0)
623 ret = SR_ERR_ARG;
624 break;
625 default:
626 ret = SR_ERR_NA;
627 break;
b58fbd99 628 }
3b533202
BV
629 }
630
631 return ret;
632}
633
584560f1 634static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 635 const struct sr_channel_group *cg)
a1c743fc 636{
034accb5 637 struct dev_context *devc;
3973ee26
BV
638 GVariant *tuple, *rational[2];
639 GVariantBuilder gvb;
640 unsigned int i;
a1c743fc 641
933defaa 642 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
643 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
644 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
645 return SR_OK;
646 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 647 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 648 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
649 return SR_OK;
650 }
651
652 if (!sdi)
653 return SR_ERR_ARG;
654
655 if (!cg) {
656 switch (key) {
657 case SR_CONF_DEVICE_OPTIONS:
658 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 659 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
660 break;
661 case SR_CONF_BUFFERSIZE:
662 if (!sdi)
663 return SR_ERR_ARG;
664 devc = sdi->priv;
665 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
666 devc->profile->buffersizes, 2, sizeof(uint64_t));
667 break;
668 case SR_CONF_TIMEBASE:
669 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
670 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
671 rational[0] = g_variant_new_uint64(timebases[i][0]);
672 rational[1] = g_variant_new_uint64(timebases[i][1]);
673 tuple = g_variant_new_tuple(rational, 2);
674 g_variant_builder_add_value(&gvb, tuple);
675 }
676 *data = g_variant_builder_end(&gvb);
677 break;
678 case SR_CONF_TRIGGER_SOURCE:
679 *data = g_variant_new_strv(trigger_sources,
680 ARRAY_SIZE(trigger_sources));
681 break;
682 case SR_CONF_TRIGGER_SLOPE:
683 *data = g_variant_new_strv(trigger_slopes,
684 ARRAY_SIZE(trigger_slopes));
685 break;
686 default:
687 return SR_ERR_NA;
3973ee26 688 }
933defaa
BV
689 } else {
690 switch (key) {
691 case SR_CONF_DEVICE_OPTIONS:
692 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
693 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
694 break;
695 case SR_CONF_COUPLING:
696 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
697 break;
698 case SR_CONF_VDIV:
699 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
700 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
701 rational[0] = g_variant_new_uint64(vdivs[i][0]);
702 rational[1] = g_variant_new_uint64(vdivs[i][1]);
703 tuple = g_variant_new_tuple(rational, 2);
704 g_variant_builder_add_value(&gvb, tuple);
705 }
706 *data = g_variant_builder_end(&gvb);
707 break;
708 default:
709 return SR_ERR_NA;
3973ee26 710 }
a1c743fc
BV
711 }
712
713 return SR_OK;
714}
715
69e19dd7 716static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 717 int num_samples)
3b533202
BV
718{
719 struct sr_datafeed_packet packet;
720 struct sr_datafeed_analog analog;
69e19dd7 721 struct dev_context *devc;
c5841b28 722 float ch1, ch2, range;
ba7dd8bb 723 int num_channels, data_offset, i;
3b533202 724
69e19dd7 725 devc = sdi->priv;
ba7dd8bb 726 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
727 packet.type = SR_DF_ANALOG;
728 packet.payload = &analog;
6e71ef3b 729 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 730 analog.channels = devc->enabled_channels;
e749a8cb 731 analog.num_samples = num_samples;
9956f285
UH
732 analog.mq = SR_MQ_VOLTAGE;
733 analog.unit = SR_UNIT_VOLT;
cf49d66b 734 analog.mqflags = 0;
886a52b6 735 /* TODO: Check malloc return value. */
ba7dd8bb 736 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 737 data_offset = 0;
3b533202 738 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
739 /*
740 * The device always sends data for both channels. If a channel
6e71ef3b 741 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
742 * data. However, we only send the requested channels to
743 * the bus.
c5841b28 744 *
e98b7f1b
UH
745 * Voltage values are encoded as a value 0-255 (0-512 on the
746 * DSO-5200*), where the value is a point in the range
747 * represented by the vdiv setting. There are 8 vertical divs,
748 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
749 * and 255 = +2V.
6e71ef3b 750 */
e98b7f1b 751 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 752 if (devc->ch1_enabled) {
933defaa 753 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 754 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
755 /* Value is centered around 0V. */
756 ch1 -= range / 2;
6e71ef3b
BV
757 analog.data[data_offset++] = ch1;
758 }
269971dd 759 if (devc->ch2_enabled) {
933defaa 760 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 761 ch2 = range / 255 * *(buf + i * 2);
c5841b28 762 ch2 -= range / 2;
6e71ef3b
BV
763 analog.data[data_offset++] = ch2;
764 }
3b533202 765 }
269971dd 766 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
767}
768
e98b7f1b
UH
769/*
770 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 771 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 772 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
773 * the libsigrok session bus.
774 */
775static void receive_transfer(struct libusb_transfer *transfer)
776{
777 struct sr_datafeed_packet packet;
69e19dd7 778 struct sr_dev_inst *sdi;
269971dd 779 struct dev_context *devc;
e749a8cb
BV
780 int num_samples, pre;
781
69e19dd7
BV
782 sdi = transfer->user_data;
783 devc = sdi->priv;
d4007311 784 sr_spew("receive_transfer(): status %d received %d bytes.",
46a743c1 785 transfer->status, transfer->actual_length);
e749a8cb
BV
786
787 if (transfer->actual_length == 0)
788 /* Nothing to send to the bus. */
789 return;
790
791 num_samples = transfer->actual_length / 2;
792
d4007311 793 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 794 devc->samp_received + num_samples, devc->framesize);
e749a8cb 795
e98b7f1b
UH
796 /*
797 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
798 * doesn't represent the trigger point. The offset at which the trigger
799 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
800 * from there up the session bus. The samples in the frame buffer
801 * before that trigger point came after the end of the device's frame
802 * buffer was reached, and it wrapped around to overwrite up until the
803 * trigger point.
e749a8cb 804 */
269971dd 805 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 806 /* Trigger point not yet reached. */
269971dd 807 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 808 /* The entire chunk is before the trigger point. */
269971dd 809 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 810 transfer->buffer, num_samples * 2);
269971dd 811 devc->samp_buffered += num_samples;
e749a8cb 812 } else {
e98b7f1b
UH
813 /*
814 * This chunk hits or overruns the trigger point.
e749a8cb 815 * Store the part before the trigger fired, and
e98b7f1b
UH
816 * send the rest up to the session bus.
817 */
269971dd
BV
818 pre = devc->trigger_offset - devc->samp_received;
819 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 820 transfer->buffer, pre * 2);
269971dd 821 devc->samp_buffered += pre;
e749a8cb
BV
822
823 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 824 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 825 devc->samp_buffered);
e749a8cb
BV
826
827 /* Avoid the corner case where the chunk ended at
828 * exactly the trigger point. */
829 if (num_samples > pre)
69e19dd7 830 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
831 num_samples - pre);
832 }
833 } else {
834 /* Already past the trigger point, just send it all out. */
69e19dd7 835 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
836 num_samples);
837 }
838
269971dd 839 devc->samp_received += num_samples;
e749a8cb
BV
840
841 /* Everything in this transfer was either copied to the buffer or
842 * sent to the session bus. */
3b533202
BV
843 g_free(transfer->buffer);
844 libusb_free_transfer(transfer);
3b533202 845
269971dd 846 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
847 /* That was the last chunk in this frame. Send the buffered
848 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 849 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 850 devc->samp_buffered);
69e19dd7 851 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
852
853 /* Mark the end of this frame. */
ae88b97b 854 packet.type = SR_DF_FRAME_END;
269971dd 855 sr_session_send(devc->cb_data, &packet);
ae88b97b 856
269971dd 857 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 858 /* Terminate session */
a3508e33 859 devc->dev_state = STOPPING;
ae88b97b 860 } else {
269971dd 861 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
862 }
863 }
3b533202
BV
864}
865
866static int handle_event(int fd, int revents, void *cb_data)
867{
a3508e33 868 const struct sr_dev_inst *sdi;
ae88b97b 869 struct sr_datafeed_packet packet;
3b533202 870 struct timeval tv;
269971dd 871 struct dev_context *devc;
a873c594 872 struct drv_context *drvc = di->priv;
ba7dd8bb 873 int num_channels;
6e6eeff4
BV
874 uint32_t trigger_offset;
875 uint8_t capturestate;
3b533202 876
3b533202
BV
877 (void)fd;
878 (void)revents;
879
269971dd
BV
880 sdi = cb_data;
881 devc = sdi->priv;
a3508e33
BV
882 if (devc->dev_state == STOPPING) {
883 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
884 sr_dbg("Stopping acquisition.");
885 /*
886 * TODO: Doesn't really cancel pending transfers so they might
887 * come in after SR_DF_END is sent.
888 */
102f1239 889 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33
BV
890
891 packet.type = SR_DF_END;
892 sr_session_send(sdi, &packet);
893
894 devc->dev_state = IDLE;
895
896 return TRUE;
897 }
898
3b533202
BV
899 /* Always handle pending libusb events. */
900 tv.tv_sec = tv.tv_usec = 0;
d4abb463 901 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 902
3b533202 903 /* TODO: ugh */
269971dd 904 if (devc->dev_state == NEW_CAPTURE) {
c118080b 905 if (dso_capture_start(sdi) != SR_OK)
3b533202 906 return TRUE;
c118080b 907 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 908 return TRUE;
c118080b 909// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 910// return TRUE;
e98b7f1b 911 sr_dbg("Successfully requested next chunk.");
269971dd 912 devc->dev_state = CAPTURE;
3b533202
BV
913 return TRUE;
914 }
269971dd 915 if (devc->dev_state != CAPTURE)
3b533202
BV
916 return TRUE;
917
c118080b 918 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 919 return TRUE;
3b533202 920
e98b7f1b
UH
921 sr_dbg("Capturestate %d.", capturestate);
922 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
923 switch (capturestate) {
924 case CAPTURE_EMPTY:
269971dd
BV
925 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
926 devc->capture_empty_count = 0;
c118080b 927 if (dso_capture_start(sdi) != SR_OK)
3b533202 928 break;
c118080b 929 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 930 break;
c118080b 931// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 932// break;
e98b7f1b 933 sr_dbg("Successfully requested next chunk.");
3b533202
BV
934 }
935 break;
936 case CAPTURE_FILLING:
e98b7f1b 937 /* No data yet. */
3b533202
BV
938 break;
939 case CAPTURE_READY_8BIT:
e749a8cb 940 /* Remember where in the captured frame the trigger is. */
269971dd 941 devc->trigger_offset = trigger_offset;
e749a8cb 942
ba7dd8bb 943 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 944 /* TODO: Check malloc return value. */
ba7dd8bb 945 devc->framebuf = g_try_malloc(devc->framesize * num_channels * 2);
269971dd 946 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 947
3b533202 948 /* Tell the scope to send us the first frame. */
69e19dd7 949 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 950 break;
ae88b97b 951
e98b7f1b
UH
952 /*
953 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
954 * the data we just told the scope to send.
955 */
269971dd 956 devc->dev_state = FETCH_DATA;
ae88b97b
BV
957
958 /* Tell the frontend a new frame is on the way. */
959 packet.type = SR_DF_FRAME_BEGIN;
269971dd 960 sr_session_send(sdi, &packet);
3b533202
BV
961 break;
962 case CAPTURE_READY_9BIT:
963 /* TODO */
e98b7f1b 964 sr_err("Not yet supported.");
3b533202
BV
965 break;
966 case CAPTURE_TIMEOUT:
967 /* Doesn't matter, we'll try again next time. */
968 break;
969 default:
e98b7f1b
UH
970 sr_dbg("Unknown capture state: %d.", capturestate);
971 break;
3b533202
BV
972 }
973
974 return TRUE;
975}
976
6078d2c9 977static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 978{
269971dd 979 struct dev_context *devc;
a873c594 980 struct drv_context *drvc = di->priv;
3b533202 981
3b533202 982 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 983 return SR_ERR_DEV_CLOSED;
3b533202 984
269971dd
BV
985 devc = sdi->priv;
986 devc->cb_data = cb_data;
3b533202 987
ba7dd8bb
UH
988 if (configure_channels(sdi) != SR_OK) {
989 sr_err("Failed to configure channels.");
014359e3
BV
990 return SR_ERR;
991 }
992
c118080b 993 if (dso_init(sdi) != SR_OK)
3b533202
BV
994 return SR_ERR;
995
c118080b 996 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
997 return SR_ERR;
998
269971dd 999 devc->dev_state = CAPTURE;
102f1239 1000 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202
BV
1001
1002 /* Send header packet to the session bus. */
29a27196 1003 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 1004
3b533202
BV
1005 return SR_OK;
1006}
1007
6078d2c9 1008static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 1009{
269971dd
BV
1010 struct dev_context *devc;
1011
1012 (void)cb_data;
3b533202 1013
3b533202
BV
1014 if (sdi->status != SR_ST_ACTIVE)
1015 return SR_ERR;
1016
a3508e33
BV
1017 devc = sdi->priv;
1018 devc->dev_state = STOPPING;
3b533202
BV
1019
1020 return SR_OK;
1021}
1022
62bb8840 1023SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1024 .name = "hantek-dso",
1025 .longname = "Hantek DSO",
1026 .api_version = 1,
6078d2c9
UH
1027 .init = init,
1028 .cleanup = cleanup,
1029 .scan = scan,
1030 .dev_list = dev_list,
3b412e3a 1031 .dev_clear = dev_clear,
79917848 1032 .config_get = config_get,
035a1078 1033 .config_set = config_set,
a1c743fc 1034 .config_list = config_list,
6078d2c9
UH
1035 .dev_open = dev_open,
1036 .dev_close = dev_close,
1037 .dev_acquisition_start = dev_acquisition_start,
1038 .dev_acquisition_stop = dev_acquisition_stop,
269971dd 1039 .priv = NULL,
3b533202 1040};