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[libsigrok.git] / src / hardware / hantek-dso / api.c
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3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
3b533202
BV
21#include <stdio.h>
22#include <stdint.h>
23#include <stdlib.h>
24#include <sys/types.h>
25#include <sys/stat.h>
26#include <fcntl.h>
27#include <unistd.h>
28#include <string.h>
29#include <sys/time.h>
30#include <inttypes.h>
3b533202
BV
31#include <glib.h>
32#include <libusb.h>
c1aae900 33#include <libsigrok/libsigrok.h>
45c59c8b 34#include "libsigrok-internal.h"
3b533202
BV
35#include "dso.h"
36
fc8fe3e3
BV
37/* Max time in ms before we want to check on USB events */
38/* TODO tune this properly */
e98b7f1b 39#define TICK 1
3b533202 40
79917848
BV
41#define NUM_TIMEBASE 10
42#define NUM_VDIV 8
43
07ffa5b3
UH
44#define NUM_BUFFER_SIZES 2
45
584560f1 46static const uint32_t scanopts[] = {
624f5b4c
BV
47 SR_CONF_CONN,
48};
49
5ecd9049 50static const uint32_t drvopts[] = {
1953564a 51 SR_CONF_OSCILLOSCOPE,
933defaa
BV
52};
53
5ecd9049
BV
54static const uint32_t devopts[] = {
55 SR_CONF_CONTINUOUS | SR_CONF_SET,
56 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa
BV
57 SR_CONF_CONN | SR_CONF_GET,
58 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
62 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
bf622e6d 63 SR_CONF_NUM_HDIV | SR_CONF_GET,
5827f61b 64 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
65};
66
933defaa
BV
67static const uint32_t devopts_cg[] = {
68 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
69 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
70 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
71};
72
ba7dd8bb 73static const char *channel_names[] = {
78693401 74 "CH1", "CH2",
3b533202
BV
75};
76
034accb5 77static const uint64_t buffersizes_32k[] = {
1a46cc62 78 (10 * 1024), (32 * 1024),
034accb5
BV
79};
80static const uint64_t buffersizes_512k[] = {
1a46cc62 81 (10 * 1024), (512 * 1024),
034accb5
BV
82};
83static const uint64_t buffersizes_14k[] = {
1a46cc62 84 (10 * 1024), (14 * 1024),
034accb5
BV
85};
86
62bb8840 87static const struct dso_profile dev_profiles[] = {
88a13f30 88 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 89 "Hantek", "DSO-2090",
034accb5 90 buffersizes_32k,
8e2d6c9d 91 "hantek-dso-2090.fw" },
88a13f30
BV
92 { 0x04b4, 0x2150, 0x04b5, 0x2150,
93 "Hantek", "DSO-2150",
034accb5 94 buffersizes_32k,
8e2d6c9d 95 "hantek-dso-2150.fw" },
88a13f30
BV
96 { 0x04b4, 0x2250, 0x04b5, 0x2250,
97 "Hantek", "DSO-2250",
034accb5 98 buffersizes_512k,
8e2d6c9d 99 "hantek-dso-2250.fw" },
88a13f30
BV
100 { 0x04b4, 0x5200, 0x04b5, 0x5200,
101 "Hantek", "DSO-5200",
034accb5 102 buffersizes_14k,
8e2d6c9d 103 "hantek-dso-5200.fw" },
88a13f30
BV
104 { 0x04b4, 0x520a, 0x04b5, 0x520a,
105 "Hantek", "DSO-5200A",
034accb5 106 buffersizes_512k,
8e2d6c9d 107 "hantek-dso-5200A.fw" },
1b4aedc0 108 ALL_ZERO
a370ef19
BV
109};
110
86bb3f4a 111static const uint64_t timebases[][2] = {
a370ef19
BV
112 /* microseconds */
113 { 10, 1000000 },
114 { 20, 1000000 },
115 { 40, 1000000 },
116 { 100, 1000000 },
117 { 200, 1000000 },
118 { 400, 1000000 },
119 /* milliseconds */
120 { 1, 1000 },
121 { 2, 1000 },
122 { 4, 1000 },
123 { 10, 1000 },
124 { 20, 1000 },
125 { 40, 1000 },
126 { 100, 1000 },
127 { 200, 1000 },
128 { 400, 1000 },
a370ef19
BV
129};
130
86bb3f4a 131static const uint64_t vdivs[][2] = {
313deed2
BV
132 /* millivolts */
133 { 10, 1000 },
134 { 20, 1000 },
135 { 50, 1000 },
136 { 100, 1000 },
137 { 200, 1000 },
138 { 500, 1000 },
139 /* volts */
140 { 1, 1 },
141 { 2, 1 },
142 { 5, 1 },
313deed2
BV
143};
144
62bb8840 145static const char *trigger_sources[] = {
a370ef19
BV
146 "CH1",
147 "CH2",
148 "EXT",
88a13f30 149 /* TODO: forced */
a370ef19 150};
3b533202 151
933defaa
BV
152static const char *trigger_slopes[] = {
153 "r",
154 "f",
ebb781a6
BV
155};
156
62bb8840 157static const char *coupling[] = {
b58fbd99
BV
158 "AC",
159 "DC",
160 "GND",
b58fbd99
BV
161};
162
982947f7 163SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
e98b7f1b 164
6078d2c9 165static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 166
395206f4 167static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
168{
169 struct sr_dev_inst *sdi;
ba7dd8bb 170 struct sr_channel *ch;
933defaa 171 struct sr_channel_group *cg;
269971dd
BV
172 struct drv_context *drvc;
173 struct dev_context *devc;
dcd438ee 174 unsigned int i;
3b533202 175
aac29cc1 176 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
177 sdi->status = SR_ST_INITIALIZING;
178 sdi->vendor = g_strdup(prof->vendor);
179 sdi->model = g_strdup(prof->model);
4f840ce9 180 sdi->driver = &hantek_dso_driver_info;
3b533202 181
e98b7f1b 182 /*
ba7dd8bb 183 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
184 * a trigger source internal to the device.
185 */
0f34cb47 186 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 187 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
188 cg = g_malloc0(sizeof(struct sr_channel_group));
189 cg->name = g_strdup(channel_names[i]);
190 cg->channels = g_slist_append(cg->channels, ch);
191 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
192 }
193
933defaa 194 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
195 devc->profile = prof;
196 devc->dev_state = IDLE;
197 devc->timebase = DEFAULT_TIMEBASE;
198 devc->ch1_enabled = TRUE;
199 devc->ch2_enabled = TRUE;
933defaa
BV
200 devc->voltage[0] = DEFAULT_VOLTAGE;
201 devc->voltage[1] = DEFAULT_VOLTAGE;
202 devc->coupling[0] = DEFAULT_COUPLING;
203 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
204 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
205 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
206 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
207 devc->framesize = DEFAULT_FRAMESIZE;
208 devc->triggerslope = SLOPE_POSITIVE;
209 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
210 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
211 sdi->priv = devc;
41812aca 212 drvc = hantek_dso_driver_info.context;
269971dd 213 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
214
215 return sdi;
216}
217
ba7dd8bb 218static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 219{
014359e3 220 struct dev_context *devc;
ba7dd8bb 221 struct sr_channel *ch;
62bb8840 222 const GSList *l;
69e19dd7 223 int p;
3b533202 224
014359e3
BV
225 devc = sdi->priv;
226
ba7dd8bb 227 g_slist_free(devc->enabled_channels);
269971dd 228 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
229 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
230 ch = l->data;
69e19dd7 231 if (p == 0)
ba7dd8bb 232 devc->ch1_enabled = ch->enabled;
69e19dd7 233 else
ba7dd8bb
UH
234 devc->ch2_enabled = ch->enabled;
235 if (ch->enabled)
236 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
237 }
238
239 return SR_OK;
240}
241
949b3dc0 242static void clear_dev_context(void *priv)
39cfdd75 243{
269971dd 244 struct dev_context *devc;
39cfdd75 245
949b3dc0
BV
246 devc = priv;
247 g_free(devc->triggersource);
ba7dd8bb 248 g_slist_free(devc->enabled_channels);
39cfdd75 249
949b3dc0 250}
39cfdd75 251
4f840ce9 252static int dev_clear(const struct sr_dev_driver *di)
949b3dc0
BV
253{
254 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
255}
256
4f840ce9 257static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
61136ea6 258{
f6beaac5 259 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
260}
261
4f840ce9 262static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 263{
269971dd
BV
264 struct drv_context *drvc;
265 struct dev_context *devc;
294dbac7 266 struct sr_dev_inst *sdi;
46a743c1
BV
267 struct sr_usb_dev_inst *usb;
268 struct sr_config *src;
294dbac7
BV
269 const struct dso_profile *prof;
270 GSList *l, *devices, *conn_devices;
39cfdd75 271 struct libusb_device_descriptor des;
3b533202 272 libusb_device **devlist;
2a8f2d41 273 int i, j;
46a743c1 274 const char *conn;
395206f4 275 char connection_id[64];
e98b7f1b 276
41812aca 277 drvc = di->context;
39cfdd75 278
4b97c74e
UH
279 devices = 0;
280
294dbac7
BV
281 conn = NULL;
282 for (l = options; l; l = l->next) {
283 src = l->data;
284 if (src->key == SR_CONF_CONN) {
285 conn = g_variant_get_string(src->data, NULL);
286 break;
287 }
288 }
289 if (conn)
290 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
291 else
292 conn_devices = NULL;
293
39cfdd75 294 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 295 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 296 for (i = 0; devlist[i]; i++) {
46a743c1 297 if (conn) {
294dbac7
BV
298 usb = NULL;
299 for (l = conn_devices; l; l = l->next) {
300 usb = l->data;
301 if (usb->bus == libusb_get_bus_number(devlist[i])
302 && usb->address == libusb_get_device_address(devlist[i]))
303 break;
304 }
305 if (!l)
306 /* This device matched none of the ones that
307 * matched the conn specification. */
308 continue;
46a743c1 309 }
294dbac7 310
2a8f2d41 311 libusb_get_device_descriptor(devlist[i], &des);
3b533202 312
395206f4
SA
313 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
314
3b533202
BV
315 prof = NULL;
316 for (j = 0; dev_profiles[j].orig_vid; j++) {
317 if (des.idVendor == dev_profiles[j].orig_vid
318 && des.idProduct == dev_profiles[j].orig_pid) {
319 /* Device matches the pre-firmware profile. */
320 prof = &dev_profiles[j];
e98b7f1b 321 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
322 sdi = dso_dev_new(prof);
323 sdi->connection_id = g_strdup(connection_id);
39cfdd75 324 devices = g_slist_append(devices, sdi);
269971dd 325 devc = sdi->priv;
8e2d6c9d
DE
326 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
327 USB_CONFIGURATION, prof->firmware) == SR_OK)
3b533202 328 /* Remember when the firmware on this device was updated */
269971dd 329 devc->fw_updated = g_get_monotonic_time();
3b533202 330 else
395206f4 331 sr_err("Firmware upload failed");
3b533202 332 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 333 sdi->conn = sr_usb_dev_inst_new(
3b533202 334 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
335 break;
336 } else if (des.idVendor == dev_profiles[j].fw_vid
337 && des.idProduct == dev_profiles[j].fw_pid) {
338 /* Device matches the post-firmware profile. */
339 prof = &dev_profiles[j];
e98b7f1b 340 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
341 sdi = dso_dev_new(prof);
342 sdi->connection_id = g_strdup(connection_id);
3b533202 343 sdi->status = SR_ST_INACTIVE;
39cfdd75 344 devices = g_slist_append(devices, sdi);
d0eec1ee 345 sdi->inst_type = SR_INST_USB;
c118080b 346 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
347 libusb_get_bus_number(devlist[i]),
348 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
349 break;
350 }
351 }
352 if (!prof)
353 /* not a supported VID/PID */
354 continue;
355 }
356 libusb_free_device_list(devlist, 1);
357
39cfdd75 358 return devices;
3b533202
BV
359}
360
4f840ce9 361static GSList *dev_list(const struct sr_dev_driver *di)
811deee4 362{
41812aca 363 return ((struct drv_context *)(di->context))->instances;
811deee4
BV
364}
365
6078d2c9 366static int dev_open(struct sr_dev_inst *sdi)
3b533202 367{
269971dd 368 struct dev_context *devc;
c118080b 369 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
370 int64_t timediff_us, timediff_ms;
371 int err;
3b533202 372
269971dd 373 devc = sdi->priv;
c118080b 374 usb = sdi->conn;
3b533202
BV
375
376 /*
e98b7f1b
UH
377 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
378 * for the FX2 to renumerate.
3b533202 379 */
fc8fe3e3 380 err = SR_ERR;
269971dd 381 if (devc->fw_updated > 0) {
e98b7f1b
UH
382 sr_info("Waiting for device to reset.");
383 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 384 g_usleep(300 * 1000);
fc8fe3e3
BV
385 timediff_ms = 0;
386 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 387 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
388 break;
389 g_usleep(100 * 1000);
269971dd 390 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 391 timediff_ms = timediff_us / 1000;
e98b7f1b 392 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 393 }
6433156c 394 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 395 } else {
25a0f108 396 err = dso_open(sdi);
3b533202
BV
397 }
398
399 if (err != SR_OK) {
e98b7f1b 400 sr_err("Unable to open device.");
3b533202
BV
401 return SR_ERR;
402 }
403
c118080b 404 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 405 if (err != 0) {
d4928d71 406 sr_err("Unable to claim interface: %s.",
46a743c1 407 libusb_error_name(err));
3b533202
BV
408 return SR_ERR;
409 }
410
411 return SR_OK;
412}
413
6078d2c9 414static int dev_close(struct sr_dev_inst *sdi)
3b533202 415{
3b533202
BV
416 dso_close(sdi);
417
418 return SR_OK;
419}
420
4f840ce9 421static int cleanup(const struct sr_dev_driver *di)
3b533202 422{
4f840ce9 423 return dev_clear(di);
3b533202
BV
424}
425
584560f1 426static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 427 const struct sr_channel_group *cg)
79917848 428{
933defaa 429 struct dev_context *devc;
624f5b4c 430 struct sr_usb_dev_inst *usb;
2c240774
UH
431 char str[128];
432 const char *s;
933defaa
BV
433 const uint64_t *vdiv;
434 int ch_idx;
79917848 435
584560f1 436 switch (key) {
bf622e6d 437 case SR_CONF_NUM_HDIV:
79917848
BV
438 *data = g_variant_new_int32(NUM_TIMEBASE);
439 break;
440 case SR_CONF_NUM_VDIV:
441 *data = g_variant_new_int32(NUM_VDIV);
442 break;
933defaa
BV
443 }
444
445 if (!sdi)
446 return SR_ERR_ARG;
447
448 devc = sdi->priv;
449 if (!cg) {
450 switch (key) {
451 case SR_CONF_CONN:
452 if (!sdi->conn)
453 return SR_ERR_ARG;
454 usb = sdi->conn;
455 if (usb->address == 255)
456 /* Device still needs to re-enumerate after firmware
457 * upload, so we don't know its (future) address. */
458 return SR_ERR;
459 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
460 *data = g_variant_new_string(str);
461 break;
462 case SR_CONF_TIMEBASE:
463 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
464 timebases[devc->timebase][1]);
465 break;
466 case SR_CONF_BUFFERSIZE:
467 *data = g_variant_new_uint64(devc->framesize);
468 break;
469 case SR_CONF_TRIGGER_SOURCE:
470 *data = g_variant_new_string(devc->triggersource);
471 break;
472 case SR_CONF_TRIGGER_SLOPE:
c442ffda 473 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
474 *data = g_variant_new_string(s);
475 break;
476 case SR_CONF_HORIZ_TRIGGERPOS:
477 *data = g_variant_new_double(devc->triggerposition);
478 break;
479 default:
480 return SR_ERR_NA;
481 }
482 } else {
483 if (sdi->channel_groups->data == cg)
484 ch_idx = 0;
485 else if (sdi->channel_groups->next->data == cg)
486 ch_idx = 1;
487 else
488 return SR_ERR_ARG;
0c5f2abc 489 switch (key) {
933defaa
BV
490 case SR_CONF_FILTER:
491 *data = g_variant_new_boolean(devc->filter[ch_idx]);
492 break;
493 case SR_CONF_VDIV:
494 vdiv = vdivs[devc->voltage[ch_idx]];
495 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
496 break;
497 case SR_CONF_COUPLING:
498 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
499 break;
500 }
79917848
BV
501 }
502
503 return SR_OK;
504}
505
584560f1 506static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 507 const struct sr_channel_group *cg)
3b533202 508{
269971dd 509 struct dev_context *devc;
f627afd6 510 double tmp_double;
86bb3f4a 511 uint64_t tmp_u64, p, q;
933defaa 512 int tmp_int, ch_idx, ret;
f627afd6
BV
513 unsigned int i;
514 const char *tmp_str;
8f996b89 515
3b533202 516 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 517 return SR_ERR_DEV_CLOSED;
3b533202 518
a370ef19 519 ret = SR_OK;
269971dd 520 devc = sdi->priv;
933defaa
BV
521 if (!cg) {
522 switch (key) {
523 case SR_CONF_LIMIT_FRAMES:
524 devc->limit_frames = g_variant_get_uint64(data);
525 break;
526 case SR_CONF_TRIGGER_SLOPE:
527 tmp_str = g_variant_get_string(data, NULL);
528 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
529 return SR_ERR_ARG;
530 devc->triggerslope = (tmp_str[0] == 'r')
531 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
532 break;
533 case SR_CONF_HORIZ_TRIGGERPOS:
534 tmp_double = g_variant_get_double(data);
535 if (tmp_double < 0.0 || tmp_double > 1.0) {
536 sr_err("Trigger position should be between 0.0 and 1.0.");
537 ret = SR_ERR_ARG;
538 } else
539 devc->triggerposition = tmp_double;
540 break;
541 case SR_CONF_BUFFERSIZE:
542 tmp_u64 = g_variant_get_uint64(data);
07ffa5b3 543 for (i = 0; i < NUM_BUFFER_SIZES; i++) {
933defaa
BV
544 if (devc->profile->buffersizes[i] == tmp_u64) {
545 devc->framesize = tmp_u64;
546 break;
547 }
a370ef19 548 }
07ffa5b3 549 if (i == NUM_BUFFER_SIZES)
933defaa
BV
550 ret = SR_ERR_ARG;
551 break;
552 case SR_CONF_TIMEBASE:
553 g_variant_get(data, "(tt)", &p, &q);
554 tmp_int = -1;
555 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
556 if (timebases[i][0] == p && timebases[i][1] == q) {
557 tmp_int = i;
558 break;
559 }
a370ef19 560 }
933defaa
BV
561 if (tmp_int >= 0)
562 devc->timebase = tmp_int;
563 else
ebb781a6 564 ret = SR_ERR_ARG;
933defaa
BV
565 break;
566 case SR_CONF_TRIGGER_SOURCE:
567 tmp_str = g_variant_get_string(data, NULL);
568 for (i = 0; trigger_sources[i]; i++) {
569 if (!strcmp(tmp_str, trigger_sources[i])) {
570 devc->triggersource = g_strdup(tmp_str);
571 break;
572 }
ebb781a6 573 }
933defaa
BV
574 if (trigger_sources[i] == 0)
575 ret = SR_ERR_ARG;
576 break;
577 default:
578 ret = SR_ERR_NA;
579 break;
ebb781a6 580 }
933defaa
BV
581 } else {
582 if (sdi->channel_groups->data == cg)
583 ch_idx = 0;
584 else if (sdi->channel_groups->next->data == cg)
585 ch_idx = 1;
586 else
587 return SR_ERR_ARG;
588 switch (key) {
589 case SR_CONF_FILTER:
590 devc->filter[ch_idx] = g_variant_get_boolean(data);
591 break;
592 case SR_CONF_VDIV:
593 g_variant_get(data, "(tt)", &p, &q);
594 tmp_int = -1;
595 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
596 if (vdivs[i][0] == p && vdivs[i][1] == q) {
597 tmp_int = i;
598 break;
599 }
313deed2 600 }
933defaa
BV
601 if (tmp_int >= 0) {
602 devc->voltage[ch_idx] = tmp_int;
603 } else
604 ret = SR_ERR_ARG;
605 break;
606 case SR_CONF_COUPLING:
607 tmp_str = g_variant_get_string(data, NULL);
608 for (i = 0; coupling[i]; i++) {
609 if (!strcmp(tmp_str, coupling[i])) {
610 devc->coupling[ch_idx] = i;
611 break;
612 }
b58fbd99 613 }
933defaa
BV
614 if (coupling[i] == 0)
615 ret = SR_ERR_ARG;
616 break;
617 default:
618 ret = SR_ERR_NA;
619 break;
b58fbd99 620 }
3b533202
BV
621 }
622
623 return ret;
624}
625
584560f1 626static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 627 const struct sr_channel_group *cg)
a1c743fc 628{
034accb5 629 struct dev_context *devc;
3973ee26
BV
630 GVariant *tuple, *rational[2];
631 GVariantBuilder gvb;
632 unsigned int i;
a1c743fc 633
933defaa 634 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
635 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
636 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
933defaa
BV
637 return SR_OK;
638 } else if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
584560f1 639 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 640 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
933defaa
BV
641 return SR_OK;
642 }
643
644 if (!sdi)
645 return SR_ERR_ARG;
646
647 if (!cg) {
93b118da 648 switch (key) {
933defaa
BV
649 case SR_CONF_DEVICE_OPTIONS:
650 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
5ecd9049 651 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
933defaa
BV
652 break;
653 case SR_CONF_BUFFERSIZE:
654 if (!sdi)
655 return SR_ERR_ARG;
656 devc = sdi->priv;
657 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
07ffa5b3 658 devc->profile->buffersizes, NUM_BUFFER_SIZES, sizeof(uint64_t));
933defaa
BV
659 break;
660 case SR_CONF_TIMEBASE:
661 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
662 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
663 rational[0] = g_variant_new_uint64(timebases[i][0]);
664 rational[1] = g_variant_new_uint64(timebases[i][1]);
665 tuple = g_variant_new_tuple(rational, 2);
666 g_variant_builder_add_value(&gvb, tuple);
667 }
668 *data = g_variant_builder_end(&gvb);
669 break;
670 case SR_CONF_TRIGGER_SOURCE:
671 *data = g_variant_new_strv(trigger_sources,
672 ARRAY_SIZE(trigger_sources));
673 break;
674 case SR_CONF_TRIGGER_SLOPE:
675 *data = g_variant_new_strv(trigger_slopes,
676 ARRAY_SIZE(trigger_slopes));
677 break;
678 default:
679 return SR_ERR_NA;
3973ee26 680 }
933defaa 681 } else {
93b118da 682 switch (key) {
933defaa
BV
683 case SR_CONF_DEVICE_OPTIONS:
684 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
685 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
686 break;
687 case SR_CONF_COUPLING:
688 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
689 break;
690 case SR_CONF_VDIV:
691 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
692 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
693 rational[0] = g_variant_new_uint64(vdivs[i][0]);
694 rational[1] = g_variant_new_uint64(vdivs[i][1]);
695 tuple = g_variant_new_tuple(rational, 2);
696 g_variant_builder_add_value(&gvb, tuple);
697 }
698 *data = g_variant_builder_end(&gvb);
699 break;
700 default:
701 return SR_ERR_NA;
3973ee26 702 }
a1c743fc
BV
703 }
704
705 return SR_OK;
706}
707
69e19dd7 708static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 709 int num_samples)
3b533202
BV
710{
711 struct sr_datafeed_packet packet;
5faebab2 712 struct sr_datafeed_analog_old analog;
69e19dd7 713 struct dev_context *devc;
c5841b28 714 float ch1, ch2, range;
ba7dd8bb 715 int num_channels, data_offset, i;
3b533202 716
69e19dd7 717 devc = sdi->priv;
ba7dd8bb 718 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
5faebab2 719 packet.type = SR_DF_ANALOG_OLD;
3b533202 720 packet.payload = &analog;
6e71ef3b 721 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 722 analog.channels = devc->enabled_channels;
e749a8cb 723 analog.num_samples = num_samples;
9956f285
UH
724 analog.mq = SR_MQ_VOLTAGE;
725 analog.unit = SR_UNIT_VOLT;
cf49d66b 726 analog.mqflags = 0;
886a52b6 727 /* TODO: Check malloc return value. */
ba7dd8bb 728 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 729 data_offset = 0;
3b533202 730 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
731 /*
732 * The device always sends data for both channels. If a channel
6e71ef3b 733 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
734 * data. However, we only send the requested channels to
735 * the bus.
c5841b28 736 *
e98b7f1b
UH
737 * Voltage values are encoded as a value 0-255 (0-512 on the
738 * DSO-5200*), where the value is a point in the range
739 * represented by the vdiv setting. There are 8 vertical divs,
740 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
741 * and 255 = +2V.
6e71ef3b 742 */
e98b7f1b 743 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 744 if (devc->ch1_enabled) {
933defaa 745 range = ((float)vdivs[devc->voltage[0]][0] / vdivs[devc->voltage[0]][1]) * 8;
e749a8cb 746 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
747 /* Value is centered around 0V. */
748 ch1 -= range / 2;
6e71ef3b
BV
749 analog.data[data_offset++] = ch1;
750 }
269971dd 751 if (devc->ch2_enabled) {
933defaa 752 range = ((float)vdivs[devc->voltage[1]][0] / vdivs[devc->voltage[1]][1]) * 8;
e749a8cb 753 ch2 = range / 255 * *(buf + i * 2);
c5841b28 754 ch2 -= range / 2;
6e71ef3b
BV
755 analog.data[data_offset++] = ch2;
756 }
3b533202 757 }
269971dd 758 sr_session_send(devc->cb_data, &packet);
1e6b5b93 759 g_free(analog.data);
e749a8cb
BV
760}
761
e98b7f1b
UH
762/*
763 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 764 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 765 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
766 * the libsigrok session bus.
767 */
55462b8b 768static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb
BV
769{
770 struct sr_datafeed_packet packet;
69e19dd7 771 struct sr_dev_inst *sdi;
269971dd 772 struct dev_context *devc;
e749a8cb
BV
773 int num_samples, pre;
774
69e19dd7
BV
775 sdi = transfer->user_data;
776 devc = sdi->priv;
eb8e6cd2
UH
777 sr_spew("receive_transfer(): status %s received %d bytes.",
778 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
779
780 if (transfer->actual_length == 0)
781 /* Nothing to send to the bus. */
782 return;
783
784 num_samples = transfer->actual_length / 2;
785
d4007311 786 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 787 devc->samp_received + num_samples, devc->framesize);
e749a8cb 788
e98b7f1b
UH
789 /*
790 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
791 * doesn't represent the trigger point. The offset at which the trigger
792 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
793 * from there up the session bus. The samples in the frame buffer
794 * before that trigger point came after the end of the device's frame
795 * buffer was reached, and it wrapped around to overwrite up until the
796 * trigger point.
e749a8cb 797 */
269971dd 798 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 799 /* Trigger point not yet reached. */
269971dd 800 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 801 /* The entire chunk is before the trigger point. */
269971dd 802 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 803 transfer->buffer, num_samples * 2);
269971dd 804 devc->samp_buffered += num_samples;
e749a8cb 805 } else {
e98b7f1b
UH
806 /*
807 * This chunk hits or overruns the trigger point.
e749a8cb 808 * Store the part before the trigger fired, and
e98b7f1b
UH
809 * send the rest up to the session bus.
810 */
269971dd
BV
811 pre = devc->trigger_offset - devc->samp_received;
812 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 813 transfer->buffer, pre * 2);
269971dd 814 devc->samp_buffered += pre;
e749a8cb
BV
815
816 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 817 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 818 devc->samp_buffered);
e749a8cb
BV
819
820 /* Avoid the corner case where the chunk ended at
821 * exactly the trigger point. */
822 if (num_samples > pre)
69e19dd7 823 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
824 num_samples - pre);
825 }
826 } else {
827 /* Already past the trigger point, just send it all out. */
a95f142e 828 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
829 }
830
269971dd 831 devc->samp_received += num_samples;
e749a8cb
BV
832
833 /* Everything in this transfer was either copied to the buffer or
834 * sent to the session bus. */
3b533202
BV
835 g_free(transfer->buffer);
836 libusb_free_transfer(transfer);
3b533202 837
269971dd 838 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
839 /* That was the last chunk in this frame. Send the buffered
840 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 841 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 842 devc->samp_buffered);
69e19dd7 843 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
844
845 /* Mark the end of this frame. */
ae88b97b 846 packet.type = SR_DF_FRAME_END;
269971dd 847 sr_session_send(devc->cb_data, &packet);
ae88b97b 848
269971dd 849 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 850 /* Terminate session */
a3508e33 851 devc->dev_state = STOPPING;
ae88b97b 852 } else {
269971dd 853 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
854 }
855 }
3b533202
BV
856}
857
858static int handle_event(int fd, int revents, void *cb_data)
859{
a3508e33 860 const struct sr_dev_inst *sdi;
ae88b97b 861 struct sr_datafeed_packet packet;
3b533202 862 struct timeval tv;
4f840ce9 863 struct sr_dev_driver *di;
269971dd 864 struct dev_context *devc;
4f840ce9 865 struct drv_context *drvc;
ba7dd8bb 866 int num_channels;
6e6eeff4
BV
867 uint32_t trigger_offset;
868 uint8_t capturestate;
3b533202 869
3b533202
BV
870 (void)fd;
871 (void)revents;
872
269971dd 873 sdi = cb_data;
4f840ce9 874 di = sdi->driver;
41812aca 875 drvc = di->context;
269971dd 876 devc = sdi->priv;
a3508e33
BV
877 if (devc->dev_state == STOPPING) {
878 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
879 sr_dbg("Stopping acquisition.");
880 /*
881 * TODO: Doesn't really cancel pending transfers so they might
882 * come in after SR_DF_END is sent.
883 */
102f1239 884 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 885
3be42bc2 886 std_session_send_df_end(sdi, LOG_PREFIX);
a3508e33
BV
887
888 devc->dev_state = IDLE;
889
890 return TRUE;
891 }
892
3b533202
BV
893 /* Always handle pending libusb events. */
894 tv.tv_sec = tv.tv_usec = 0;
d4abb463 895 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 896
3b533202 897 /* TODO: ugh */
269971dd 898 if (devc->dev_state == NEW_CAPTURE) {
c118080b 899 if (dso_capture_start(sdi) != SR_OK)
3b533202 900 return TRUE;
c118080b 901 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 902 return TRUE;
c118080b 903// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 904// return TRUE;
e98b7f1b 905 sr_dbg("Successfully requested next chunk.");
269971dd 906 devc->dev_state = CAPTURE;
3b533202
BV
907 return TRUE;
908 }
269971dd 909 if (devc->dev_state != CAPTURE)
3b533202
BV
910 return TRUE;
911
c118080b 912 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 913 return TRUE;
3b533202 914
e98b7f1b
UH
915 sr_dbg("Capturestate %d.", capturestate);
916 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
917 switch (capturestate) {
918 case CAPTURE_EMPTY:
269971dd
BV
919 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
920 devc->capture_empty_count = 0;
c118080b 921 if (dso_capture_start(sdi) != SR_OK)
3b533202 922 break;
c118080b 923 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 924 break;
c118080b 925// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 926// break;
e98b7f1b 927 sr_dbg("Successfully requested next chunk.");
3b533202
BV
928 }
929 break;
930 case CAPTURE_FILLING:
e98b7f1b 931 /* No data yet. */
3b533202
BV
932 break;
933 case CAPTURE_READY_8BIT:
e749a8cb 934 /* Remember where in the captured frame the trigger is. */
269971dd 935 devc->trigger_offset = trigger_offset;
e749a8cb 936
ba7dd8bb 937 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
a95f142e 938 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 939 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 940
3b533202 941 /* Tell the scope to send us the first frame. */
69e19dd7 942 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 943 break;
ae88b97b 944
e98b7f1b
UH
945 /*
946 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
947 * the data we just told the scope to send.
948 */
269971dd 949 devc->dev_state = FETCH_DATA;
ae88b97b
BV
950
951 /* Tell the frontend a new frame is on the way. */
952 packet.type = SR_DF_FRAME_BEGIN;
269971dd 953 sr_session_send(sdi, &packet);
3b533202
BV
954 break;
955 case CAPTURE_READY_9BIT:
956 /* TODO */
e98b7f1b 957 sr_err("Not yet supported.");
3b533202
BV
958 break;
959 case CAPTURE_TIMEOUT:
960 /* Doesn't matter, we'll try again next time. */
961 break;
962 default:
e98b7f1b
UH
963 sr_dbg("Unknown capture state: %d.", capturestate);
964 break;
3b533202
BV
965 }
966
967 return TRUE;
968}
969
6078d2c9 970static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 971{
269971dd 972 struct dev_context *devc;
4f840ce9 973 struct sr_dev_driver *di = sdi->driver;
41812aca 974 struct drv_context *drvc = di->context;
3b533202 975
3b533202 976 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 977 return SR_ERR_DEV_CLOSED;
3b533202 978
269971dd
BV
979 devc = sdi->priv;
980 devc->cb_data = cb_data;
3b533202 981
ba7dd8bb
UH
982 if (configure_channels(sdi) != SR_OK) {
983 sr_err("Failed to configure channels.");
014359e3
BV
984 return SR_ERR;
985 }
986
c118080b 987 if (dso_init(sdi) != SR_OK)
3b533202
BV
988 return SR_ERR;
989
c118080b 990 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
991 return SR_ERR;
992
269971dd 993 devc->dev_state = CAPTURE;
102f1239 994 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 995
29a27196 996 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 997
3b533202
BV
998 return SR_OK;
999}
1000
6078d2c9 1001static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 1002{
269971dd
BV
1003 struct dev_context *devc;
1004
1005 (void)cb_data;
3b533202 1006
3b533202
BV
1007 if (sdi->status != SR_ST_ACTIVE)
1008 return SR_ERR;
1009
a3508e33
BV
1010 devc = sdi->priv;
1011 devc->dev_state = STOPPING;
3b533202
BV
1012
1013 return SR_OK;
1014}
1015
62bb8840 1016SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
1017 .name = "hantek-dso",
1018 .longname = "Hantek DSO",
1019 .api_version = 1,
6078d2c9
UH
1020 .init = init,
1021 .cleanup = cleanup,
1022 .scan = scan,
1023 .dev_list = dev_list,
3b412e3a 1024 .dev_clear = dev_clear,
79917848 1025 .config_get = config_get,
035a1078 1026 .config_set = config_set,
a1c743fc 1027 .config_list = config_list,
6078d2c9
UH
1028 .dev_open = dev_open,
1029 .dev_close = dev_close,
1030 .dev_acquisition_start = dev_acquisition_start,
1031 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 1032 .context = NULL,
3b533202 1033};