]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-dso/api.c
hantek-dso: Properly zero out MQ flags.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
584560f1 43static const uint32_t scanopts[] = {
624f5b4c
BV
44 SR_CONF_CONN,
45};
46
584560f1 47static const uint32_t devopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
1953564a 49 SR_CONF_CONTINUOUS,
5827f61b
BV
50 SR_CONF_CONN | SR_CONF_GET,
51 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
52 SR_CONF_TIMEBASE | SR_CONF_SET | SR_CONF_LIST,
53 SR_CONF_BUFFERSIZE | SR_CONF_SET | SR_CONF_LIST,
54 SR_CONF_TRIGGER_SOURCE | SR_CONF_SET | SR_CONF_LIST,
55 SR_CONF_TRIGGER_SLOPE | SR_CONF_SET,
56 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
57 SR_CONF_FILTER | SR_CONF_SET | SR_CONF_LIST,
58 SR_CONF_VDIV | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_NUM_TIMEBASE | SR_CONF_GET,
61 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
62};
63
ba7dd8bb 64static const char *channel_names[] = {
78693401 65 "CH1", "CH2",
3b533202
BV
66 NULL,
67};
68
034accb5
BV
69static const uint64_t buffersizes_32k[] = {
70 10240, 32768,
71};
72static const uint64_t buffersizes_512k[] = {
73 10240, 524288,
74};
75static const uint64_t buffersizes_14k[] = {
76 10240, 14336,
77};
78
62bb8840 79static const struct dso_profile dev_profiles[] = {
88a13f30 80 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 81 "Hantek", "DSO-2090",
034accb5 82 buffersizes_32k,
7b78b2f7 83 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
84 { 0x04b4, 0x2150, 0x04b5, 0x2150,
85 "Hantek", "DSO-2150",
034accb5 86 buffersizes_32k,
7b78b2f7 87 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
88 { 0x04b4, 0x2250, 0x04b5, 0x2250,
89 "Hantek", "DSO-2250",
034accb5 90 buffersizes_512k,
7b78b2f7 91 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
92 { 0x04b4, 0x5200, 0x04b5, 0x5200,
93 "Hantek", "DSO-5200",
034accb5 94 buffersizes_14k,
7b78b2f7 95 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
96 { 0x04b4, 0x520a, 0x04b5, 0x520a,
97 "Hantek", "DSO-5200A",
034accb5 98 buffersizes_512k,
7b78b2f7 99 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 100 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
101};
102
86bb3f4a 103static const uint64_t timebases[][2] = {
a370ef19
BV
104 /* microseconds */
105 { 10, 1000000 },
106 { 20, 1000000 },
107 { 40, 1000000 },
108 { 100, 1000000 },
109 { 200, 1000000 },
110 { 400, 1000000 },
111 /* milliseconds */
112 { 1, 1000 },
113 { 2, 1000 },
114 { 4, 1000 },
115 { 10, 1000 },
116 { 20, 1000 },
117 { 40, 1000 },
118 { 100, 1000 },
119 { 200, 1000 },
120 { 400, 1000 },
a370ef19
BV
121};
122
86bb3f4a 123static const uint64_t vdivs[][2] = {
313deed2
BV
124 /* millivolts */
125 { 10, 1000 },
126 { 20, 1000 },
127 { 50, 1000 },
128 { 100, 1000 },
129 { 200, 1000 },
130 { 500, 1000 },
131 /* volts */
132 { 1, 1 },
133 { 2, 1 },
134 { 5, 1 },
313deed2
BV
135};
136
62bb8840 137static const char *trigger_sources[] = {
a370ef19
BV
138 "CH1",
139 "CH2",
140 "EXT",
88a13f30 141 /* TODO: forced */
a370ef19 142};
3b533202 143
62bb8840 144static const char *filter_targets[] = {
ebb781a6
BV
145 "CH1",
146 "CH2",
147 /* TODO: "TRIGGER", */
ebb781a6
BV
148};
149
62bb8840 150static const char *coupling[] = {
b58fbd99
BV
151 "AC",
152 "DC",
153 "GND",
b58fbd99
BV
154};
155
982947f7 156SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 157static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 158
6078d2c9 159static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 160
395206f4 161static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
162{
163 struct sr_dev_inst *sdi;
ba7dd8bb 164 struct sr_channel *ch;
269971dd
BV
165 struct drv_context *drvc;
166 struct dev_context *devc;
87ca93c5 167 int i;
3b533202 168
aed4ad0b 169 sdi = sr_dev_inst_new(SR_ST_INITIALIZING,
88a13f30 170 prof->vendor, prof->model, NULL);
3b533202
BV
171 if (!sdi)
172 return NULL;
a873c594 173 sdi->driver = di;
3b533202 174
e98b7f1b 175 /*
ba7dd8bb 176 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
177 * a trigger source internal to the device.
178 */
ba7dd8bb 179 for (i = 0; channel_names[i]; i++) {
3f239f08 180 if (!(ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE,
ba7dd8bb 181 channel_names[i])))
87ca93c5 182 return NULL;
ba7dd8bb 183 sdi->channels = g_slist_append(sdi->channels, ch);
87ca93c5
BV
184 }
185
269971dd 186 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 187 sr_err("Device context malloc failed.");
3b533202
BV
188 return NULL;
189 }
e98b7f1b 190
269971dd
BV
191 devc->profile = prof;
192 devc->dev_state = IDLE;
193 devc->timebase = DEFAULT_TIMEBASE;
194 devc->ch1_enabled = TRUE;
195 devc->ch2_enabled = TRUE;
196 devc->voltage_ch1 = DEFAULT_VOLTAGE;
197 devc->voltage_ch2 = DEFAULT_VOLTAGE;
198 devc->coupling_ch1 = DEFAULT_COUPLING;
199 devc->coupling_ch2 = DEFAULT_COUPLING;
200 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
201 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
202 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
203 devc->framesize = DEFAULT_FRAMESIZE;
204 devc->triggerslope = SLOPE_POSITIVE;
205 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
206 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
207 sdi->priv = devc;
a873c594 208 drvc = di->priv;
269971dd 209 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
210
211 return sdi;
212}
213
ba7dd8bb 214static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 215{
014359e3 216 struct dev_context *devc;
ba7dd8bb 217 struct sr_channel *ch;
62bb8840 218 const GSList *l;
69e19dd7 219 int p;
3b533202 220
014359e3
BV
221 devc = sdi->priv;
222
ba7dd8bb 223 g_slist_free(devc->enabled_channels);
269971dd 224 devc->ch1_enabled = devc->ch2_enabled = FALSE;
ba7dd8bb
UH
225 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
226 ch = l->data;
69e19dd7 227 if (p == 0)
ba7dd8bb 228 devc->ch1_enabled = ch->enabled;
69e19dd7 229 else
ba7dd8bb
UH
230 devc->ch2_enabled = ch->enabled;
231 if (ch->enabled)
232 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
233 }
234
235 return SR_OK;
236}
237
949b3dc0 238static void clear_dev_context(void *priv)
39cfdd75 239{
269971dd 240 struct dev_context *devc;
39cfdd75 241
949b3dc0
BV
242 devc = priv;
243 g_free(devc->triggersource);
ba7dd8bb 244 g_slist_free(devc->enabled_channels);
39cfdd75 245
949b3dc0 246}
39cfdd75 247
3b412e3a 248static int dev_clear(void)
949b3dc0
BV
249{
250 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
251}
252
6078d2c9 253static int init(struct sr_context *sr_ctx)
61136ea6 254{
f6beaac5 255 return std_init(sr_ctx, di, LOG_PREFIX);
61136ea6
BV
256}
257
6078d2c9 258static GSList *scan(GSList *options)
3b533202 259{
269971dd
BV
260 struct drv_context *drvc;
261 struct dev_context *devc;
294dbac7 262 struct sr_dev_inst *sdi;
46a743c1
BV
263 struct sr_usb_dev_inst *usb;
264 struct sr_config *src;
294dbac7
BV
265 const struct dso_profile *prof;
266 GSList *l, *devices, *conn_devices;
39cfdd75 267 struct libusb_device_descriptor des;
3b533202 268 libusb_device **devlist;
395206f4 269 int ret, i, j;
46a743c1 270 const char *conn;
395206f4 271 char connection_id[64];
e98b7f1b 272
a873c594 273 drvc = di->priv;
39cfdd75 274
4b97c74e
UH
275 devices = 0;
276
294dbac7
BV
277 conn = NULL;
278 for (l = options; l; l = l->next) {
279 src = l->data;
280 if (src->key == SR_CONF_CONN) {
281 conn = g_variant_get_string(src->data, NULL);
282 break;
283 }
284 }
285 if (conn)
286 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
287 else
288 conn_devices = NULL;
289
39cfdd75 290 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 291 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 292 for (i = 0; devlist[i]; i++) {
46a743c1 293 if (conn) {
294dbac7
BV
294 usb = NULL;
295 for (l = conn_devices; l; l = l->next) {
296 usb = l->data;
297 if (usb->bus == libusb_get_bus_number(devlist[i])
298 && usb->address == libusb_get_device_address(devlist[i]))
299 break;
300 }
301 if (!l)
302 /* This device matched none of the ones that
303 * matched the conn specification. */
304 continue;
46a743c1 305 }
294dbac7 306
61136ea6 307 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71 308 sr_err("Failed to get device descriptor: %s.",
46a743c1 309 libusb_error_name(ret));
3b533202
BV
310 continue;
311 }
312
395206f4
SA
313 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
314
3b533202
BV
315 prof = NULL;
316 for (j = 0; dev_profiles[j].orig_vid; j++) {
317 if (des.idVendor == dev_profiles[j].orig_vid
318 && des.idProduct == dev_profiles[j].orig_pid) {
319 /* Device matches the pre-firmware profile. */
320 prof = &dev_profiles[j];
e98b7f1b 321 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
322 sdi = dso_dev_new(prof);
323 sdi->connection_id = g_strdup(connection_id);
39cfdd75 324 devices = g_slist_append(devices, sdi);
269971dd 325 devc = sdi->priv;
3b533202
BV
326 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
327 prof->firmware) == SR_OK)
328 /* Remember when the firmware on this device was updated */
269971dd 329 devc->fw_updated = g_get_monotonic_time();
3b533202 330 else
395206f4 331 sr_err("Firmware upload failed");
3b533202 332 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 333 sdi->conn = sr_usb_dev_inst_new(
3b533202 334 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
335 break;
336 } else if (des.idVendor == dev_profiles[j].fw_vid
337 && des.idProduct == dev_profiles[j].fw_pid) {
338 /* Device matches the post-firmware profile. */
339 prof = &dev_profiles[j];
e98b7f1b 340 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
395206f4
SA
341 sdi = dso_dev_new(prof);
342 sdi->connection_id = g_strdup(connection_id);
3b533202 343 sdi->status = SR_ST_INACTIVE;
39cfdd75 344 devices = g_slist_append(devices, sdi);
d0eec1ee 345 sdi->inst_type = SR_INST_USB;
c118080b 346 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
347 libusb_get_bus_number(devlist[i]),
348 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
349 break;
350 }
351 }
352 if (!prof)
353 /* not a supported VID/PID */
354 continue;
355 }
356 libusb_free_device_list(devlist, 1);
357
39cfdd75 358 return devices;
3b533202
BV
359}
360
6078d2c9 361static GSList *dev_list(void)
811deee4 362{
0e94d524 363 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
364}
365
6078d2c9 366static int dev_open(struct sr_dev_inst *sdi)
3b533202 367{
269971dd 368 struct dev_context *devc;
c118080b 369 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
370 int64_t timediff_us, timediff_ms;
371 int err;
3b533202 372
269971dd 373 devc = sdi->priv;
c118080b 374 usb = sdi->conn;
3b533202
BV
375
376 /*
e98b7f1b
UH
377 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
378 * for the FX2 to renumerate.
3b533202 379 */
fc8fe3e3 380 err = SR_ERR;
269971dd 381 if (devc->fw_updated > 0) {
e98b7f1b
UH
382 sr_info("Waiting for device to reset.");
383 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 384 g_usleep(300 * 1000);
fc8fe3e3
BV
385 timediff_ms = 0;
386 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 387 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
388 break;
389 g_usleep(100 * 1000);
269971dd 390 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 391 timediff_ms = timediff_us / 1000;
e98b7f1b 392 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 393 }
e98b7f1b 394 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 395 } else {
25a0f108 396 err = dso_open(sdi);
3b533202
BV
397 }
398
399 if (err != SR_OK) {
e98b7f1b 400 sr_err("Unable to open device.");
3b533202
BV
401 return SR_ERR;
402 }
403
c118080b 404 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 405 if (err != 0) {
d4928d71 406 sr_err("Unable to claim interface: %s.",
46a743c1 407 libusb_error_name(err));
3b533202
BV
408 return SR_ERR;
409 }
410
411 return SR_OK;
412}
413
6078d2c9 414static int dev_close(struct sr_dev_inst *sdi)
3b533202 415{
3b533202
BV
416 dso_close(sdi);
417
418 return SR_OK;
419}
420
6078d2c9 421static int cleanup(void)
3b533202 422{
3b412e3a 423 return dev_clear();
3b533202
BV
424}
425
584560f1 426static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 427 const struct sr_channel_group *cg)
79917848 428{
624f5b4c
BV
429 struct sr_usb_dev_inst *usb;
430 char str[128];
79917848 431
53b4680f 432 (void)cg;
8f996b89 433
584560f1 434 switch (key) {
624f5b4c
BV
435 case SR_CONF_CONN:
436 if (!sdi || !sdi->conn)
e2033d49 437 return SR_ERR_ARG;
624f5b4c
BV
438 usb = sdi->conn;
439 if (usb->address == 255)
440 /* Device still needs to re-enumerate after firmware
441 * upload, so we don't know its (future) address. */
442 return SR_ERR;
443 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
444 *data = g_variant_new_string(str);
445 break;
79917848
BV
446 case SR_CONF_NUM_TIMEBASE:
447 *data = g_variant_new_int32(NUM_TIMEBASE);
448 break;
449 case SR_CONF_NUM_VDIV:
450 *data = g_variant_new_int32(NUM_VDIV);
451 break;
452 default:
bd6fbf62 453 return SR_ERR_NA;
79917848
BV
454 }
455
456 return SR_OK;
457}
458
584560f1 459static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 460 const struct sr_channel_group *cg)
3b533202 461{
269971dd 462 struct dev_context *devc;
f627afd6 463 double tmp_double;
86bb3f4a 464 uint64_t tmp_u64, p, q;
f627afd6
BV
465 int tmp_int, ret;
466 unsigned int i;
467 const char *tmp_str;
4a090d72 468 char **targets;
3b533202 469
53b4680f 470 (void)cg;
8f996b89 471
3b533202 472 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 473 return SR_ERR_DEV_CLOSED;
3b533202 474
a370ef19 475 ret = SR_OK;
269971dd 476 devc = sdi->priv;
584560f1 477 switch (key) {
1953564a 478 case SR_CONF_LIMIT_FRAMES:
f627afd6 479 devc->limit_frames = g_variant_get_uint64(data);
ae88b97b 480 break;
1953564a 481 case SR_CONF_TRIGGER_SLOPE:
ca9b9f48
DE
482 tmp_str = g_variant_get_string(data, NULL);
483 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
484 return SR_ERR_ARG;
485 devc->triggerslope = (tmp_str[0] == 'r')
486 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
a370ef19 487 break;
1953564a 488 case SR_CONF_HORIZ_TRIGGERPOS:
f627afd6
BV
489 tmp_double = g_variant_get_double(data);
490 if (tmp_double < 0.0 || tmp_double > 1.0) {
e98b7f1b 491 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 492 ret = SR_ERR_ARG;
a370ef19 493 } else
f627afd6 494 devc->triggerposition = tmp_double;
a370ef19 495 break;
1953564a 496 case SR_CONF_BUFFERSIZE:
f627afd6 497 tmp_u64 = g_variant_get_uint64(data);
034accb5
BV
498 for (i = 0; i < 2; i++) {
499 if (devc->profile->buffersizes[i] == tmp_u64) {
269971dd 500 devc->framesize = tmp_u64;
a370ef19
BV
501 break;
502 }
503 }
034accb5 504 if (i == 2)
a370ef19
BV
505 ret = SR_ERR_ARG;
506 break;
1953564a 507 case SR_CONF_TIMEBASE:
86bb3f4a 508 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
509 tmp_int = -1;
510 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
511 if (timebases[i][0] == p && timebases[i][1] == q) {
512 tmp_int = i;
a370ef19
BV
513 break;
514 }
515 }
f627afd6
BV
516 if (tmp_int >= 0)
517 devc->timebase = tmp_int;
518 else
a370ef19
BV
519 ret = SR_ERR_ARG;
520 break;
1953564a 521 case SR_CONF_TRIGGER_SOURCE:
f627afd6 522 tmp_str = g_variant_get_string(data, NULL);
a370ef19 523 for (i = 0; trigger_sources[i]; i++) {
f627afd6
BV
524 if (!strcmp(tmp_str, trigger_sources[i])) {
525 devc->triggersource = g_strdup(tmp_str);
a370ef19
BV
526 break;
527 }
528 }
529 if (trigger_sources[i] == 0)
530 ret = SR_ERR_ARG;
531 break;
1953564a 532 case SR_CONF_FILTER:
f627afd6 533 tmp_str = g_variant_get_string(data, NULL);
269971dd 534 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
f627afd6 535 targets = g_strsplit(tmp_str, ",", 0);
ebb781a6
BV
536 for (i = 0; targets[i]; i++) {
537 if (targets[i] == '\0')
538 /* Empty filter string can be used to clear them all. */
539 ;
540 else if (!strcmp(targets[i], "CH1"))
269971dd 541 devc->filter_ch1 = TRUE;
ebb781a6 542 else if (!strcmp(targets[i], "CH2"))
269971dd 543 devc->filter_ch2 = TRUE;
ebb781a6 544 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 545 devc->filter_trigger = TRUE;
ebb781a6 546 else {
e98b7f1b 547 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
548 ret = SR_ERR_ARG;
549 }
550 }
551 g_strfreev(targets);
552 break;
1953564a 553 case SR_CONF_VDIV:
e98b7f1b 554 /* TODO: Not supporting vdiv per channel yet. */
86bb3f4a 555 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
556 tmp_int = -1;
557 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
558 if (vdivs[i][0] == p && vdivs[i][1] == q) {
559 tmp_int = i;
313deed2
BV
560 break;
561 }
562 }
f627afd6
BV
563 if (tmp_int >= 0) {
564 devc->voltage_ch1 = tmp_int;
565 devc->voltage_ch2 = tmp_int;
566 } else
313deed2
BV
567 ret = SR_ERR_ARG;
568 break;
1953564a 569 case SR_CONF_COUPLING:
f627afd6 570 tmp_str = g_variant_get_string(data, NULL);
e98b7f1b 571 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 572 for (i = 0; coupling[i]; i++) {
f627afd6 573 if (!strcmp(tmp_str, coupling[i])) {
269971dd
BV
574 devc->coupling_ch1 = i;
575 devc->coupling_ch2 = i;
b58fbd99
BV
576 break;
577 }
578 }
579 if (coupling[i] == 0)
580 ret = SR_ERR_ARG;
581 break;
3b533202 582 default:
bd6fbf62 583 ret = SR_ERR_NA;
e98b7f1b 584 break;
3b533202
BV
585 }
586
587 return ret;
588}
589
584560f1 590static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 591 const struct sr_channel_group *cg)
a1c743fc 592{
034accb5 593 struct dev_context *devc;
3973ee26
BV
594 GVariant *tuple, *rational[2];
595 GVariantBuilder gvb;
596 unsigned int i;
a1c743fc 597
53b4680f 598 (void)cg;
8f996b89 599
a1c743fc 600 switch (key) {
624f5b4c 601 case SR_CONF_SCAN_OPTIONS:
584560f1
BV
602 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
603 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
624f5b4c 604 break;
9a6517d1 605 case SR_CONF_DEVICE_OPTIONS:
584560f1
BV
606 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
607 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
9a6517d1 608 break;
6d1ceffa 609 case SR_CONF_BUFFERSIZE:
a147c7b4
UH
610 if (!sdi)
611 return SR_ERR_ARG;
612 devc = sdi->priv;
f627afd6 613 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
034accb5 614 devc->profile->buffersizes, 2, sizeof(uint64_t));
6d1ceffa 615 break;
2a7b113d 616 case SR_CONF_COUPLING:
f627afd6 617 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
2a7b113d 618 break;
e4f2b2ad 619 case SR_CONF_VDIV:
3973ee26
BV
620 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
621 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
622 rational[0] = g_variant_new_uint64(vdivs[i][0]);
623 rational[1] = g_variant_new_uint64(vdivs[i][1]);
624 tuple = g_variant_new_tuple(rational, 2);
625 g_variant_builder_add_value(&gvb, tuple);
626 }
627 *data = g_variant_builder_end(&gvb);
e4f2b2ad 628 break;
6e1fbcc4 629 case SR_CONF_FILTER:
f627afd6
BV
630 *data = g_variant_new_strv(filter_targets,
631 ARRAY_SIZE(filter_targets));
6e1fbcc4 632 break;
41f5bd09 633 case SR_CONF_TIMEBASE:
3973ee26
BV
634 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
635 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
636 rational[0] = g_variant_new_uint64(timebases[i][0]);
637 rational[1] = g_variant_new_uint64(timebases[i][1]);
638 tuple = g_variant_new_tuple(rational, 2);
639 g_variant_builder_add_value(&gvb, tuple);
640 }
641 *data = g_variant_builder_end(&gvb);
41f5bd09 642 break;
328bafab 643 case SR_CONF_TRIGGER_SOURCE:
f627afd6
BV
644 *data = g_variant_new_strv(trigger_sources,
645 ARRAY_SIZE(trigger_sources));
328bafab 646 break;
a1c743fc 647 default:
bd6fbf62 648 return SR_ERR_NA;
a1c743fc
BV
649 }
650
651 return SR_OK;
652}
653
69e19dd7 654static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 655 int num_samples)
3b533202
BV
656{
657 struct sr_datafeed_packet packet;
658 struct sr_datafeed_analog analog;
69e19dd7 659 struct dev_context *devc;
c5841b28 660 float ch1, ch2, range;
ba7dd8bb 661 int num_channels, data_offset, i;
3b533202 662
69e19dd7 663 devc = sdi->priv;
ba7dd8bb 664 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
665 packet.type = SR_DF_ANALOG;
666 packet.payload = &analog;
6e71ef3b 667 /* TODO: support for 5xxx series 9-bit samples */
ba7dd8bb 668 analog.channels = devc->enabled_channels;
e749a8cb 669 analog.num_samples = num_samples;
9956f285
UH
670 analog.mq = SR_MQ_VOLTAGE;
671 analog.unit = SR_UNIT_VOLT;
cf49d66b 672 analog.mqflags = 0;
886a52b6 673 /* TODO: Check malloc return value. */
ba7dd8bb 674 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_channels);
6e71ef3b 675 data_offset = 0;
3b533202 676 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
677 /*
678 * The device always sends data for both channels. If a channel
6e71ef3b 679 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
680 * data. However, we only send the requested channels to
681 * the bus.
c5841b28 682 *
e98b7f1b
UH
683 * Voltage values are encoded as a value 0-255 (0-512 on the
684 * DSO-5200*), where the value is a point in the range
685 * represented by the vdiv setting. There are 8 vertical divs,
686 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
687 * and 255 = +2V.
6e71ef3b 688 */
e98b7f1b 689 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 690 if (devc->ch1_enabled) {
f627afd6 691 range = ((float)vdivs[devc->voltage_ch1][0] / vdivs[devc->voltage_ch1][1]) * 8;
e749a8cb 692 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
693 /* Value is centered around 0V. */
694 ch1 -= range / 2;
6e71ef3b
BV
695 analog.data[data_offset++] = ch1;
696 }
269971dd 697 if (devc->ch2_enabled) {
f627afd6 698 range = ((float)vdivs[devc->voltage_ch2][0] / vdivs[devc->voltage_ch2][1]) * 8;
e749a8cb 699 ch2 = range / 255 * *(buf + i * 2);
c5841b28 700 ch2 -= range / 2;
6e71ef3b
BV
701 analog.data[data_offset++] = ch2;
702 }
3b533202 703 }
269971dd 704 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
705}
706
e98b7f1b
UH
707/*
708 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 709 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 710 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
711 * the libsigrok session bus.
712 */
713static void receive_transfer(struct libusb_transfer *transfer)
714{
715 struct sr_datafeed_packet packet;
69e19dd7 716 struct sr_dev_inst *sdi;
269971dd 717 struct dev_context *devc;
e749a8cb
BV
718 int num_samples, pre;
719
69e19dd7
BV
720 sdi = transfer->user_data;
721 devc = sdi->priv;
d4007311 722 sr_spew("receive_transfer(): status %d received %d bytes.",
46a743c1 723 transfer->status, transfer->actual_length);
e749a8cb
BV
724
725 if (transfer->actual_length == 0)
726 /* Nothing to send to the bus. */
727 return;
728
729 num_samples = transfer->actual_length / 2;
730
d4007311 731 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
46a743c1 732 devc->samp_received + num_samples, devc->framesize);
e749a8cb 733
e98b7f1b
UH
734 /*
735 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
736 * doesn't represent the trigger point. The offset at which the trigger
737 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
738 * from there up the session bus. The samples in the frame buffer
739 * before that trigger point came after the end of the device's frame
740 * buffer was reached, and it wrapped around to overwrite up until the
741 * trigger point.
e749a8cb 742 */
269971dd 743 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 744 /* Trigger point not yet reached. */
269971dd 745 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 746 /* The entire chunk is before the trigger point. */
269971dd 747 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 748 transfer->buffer, num_samples * 2);
269971dd 749 devc->samp_buffered += num_samples;
e749a8cb 750 } else {
e98b7f1b
UH
751 /*
752 * This chunk hits or overruns the trigger point.
e749a8cb 753 * Store the part before the trigger fired, and
e98b7f1b
UH
754 * send the rest up to the session bus.
755 */
269971dd
BV
756 pre = devc->trigger_offset - devc->samp_received;
757 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 758 transfer->buffer, pre * 2);
269971dd 759 devc->samp_buffered += pre;
e749a8cb
BV
760
761 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 762 sr_dbg("Reached trigger point, %d samples buffered.",
46a743c1 763 devc->samp_buffered);
e749a8cb
BV
764
765 /* Avoid the corner case where the chunk ended at
766 * exactly the trigger point. */
767 if (num_samples > pre)
69e19dd7 768 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
769 num_samples - pre);
770 }
771 } else {
772 /* Already past the trigger point, just send it all out. */
69e19dd7 773 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
774 num_samples);
775 }
776
269971dd 777 devc->samp_received += num_samples;
e749a8cb
BV
778
779 /* Everything in this transfer was either copied to the buffer or
780 * sent to the session bus. */
3b533202
BV
781 g_free(transfer->buffer);
782 libusb_free_transfer(transfer);
3b533202 783
269971dd 784 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
785 /* That was the last chunk in this frame. Send the buffered
786 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 787 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
46a743c1 788 devc->samp_buffered);
69e19dd7 789 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
790
791 /* Mark the end of this frame. */
ae88b97b 792 packet.type = SR_DF_FRAME_END;
269971dd 793 sr_session_send(devc->cb_data, &packet);
ae88b97b 794
269971dd 795 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 796 /* Terminate session */
a3508e33 797 devc->dev_state = STOPPING;
ae88b97b 798 } else {
269971dd 799 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
800 }
801 }
3b533202
BV
802}
803
804static int handle_event(int fd, int revents, void *cb_data)
805{
a3508e33 806 const struct sr_dev_inst *sdi;
ae88b97b 807 struct sr_datafeed_packet packet;
3b533202 808 struct timeval tv;
269971dd 809 struct dev_context *devc;
a873c594 810 struct drv_context *drvc = di->priv;
ba7dd8bb 811 int num_channels;
6e6eeff4
BV
812 uint32_t trigger_offset;
813 uint8_t capturestate;
3b533202 814
3b533202
BV
815 (void)fd;
816 (void)revents;
817
269971dd
BV
818 sdi = cb_data;
819 devc = sdi->priv;
a3508e33
BV
820 if (devc->dev_state == STOPPING) {
821 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
822 sr_dbg("Stopping acquisition.");
823 /*
824 * TODO: Doesn't really cancel pending transfers so they might
825 * come in after SR_DF_END is sent.
826 */
102f1239 827 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33
BV
828
829 packet.type = SR_DF_END;
830 sr_session_send(sdi, &packet);
831
832 devc->dev_state = IDLE;
833
834 return TRUE;
835 }
836
3b533202
BV
837 /* Always handle pending libusb events. */
838 tv.tv_sec = tv.tv_usec = 0;
d4abb463 839 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 840
3b533202 841 /* TODO: ugh */
269971dd 842 if (devc->dev_state == NEW_CAPTURE) {
c118080b 843 if (dso_capture_start(sdi) != SR_OK)
3b533202 844 return TRUE;
c118080b 845 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 846 return TRUE;
c118080b 847// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 848// return TRUE;
e98b7f1b 849 sr_dbg("Successfully requested next chunk.");
269971dd 850 devc->dev_state = CAPTURE;
3b533202
BV
851 return TRUE;
852 }
269971dd 853 if (devc->dev_state != CAPTURE)
3b533202
BV
854 return TRUE;
855
c118080b 856 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 857 return TRUE;
3b533202 858
e98b7f1b
UH
859 sr_dbg("Capturestate %d.", capturestate);
860 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
861 switch (capturestate) {
862 case CAPTURE_EMPTY:
269971dd
BV
863 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
864 devc->capture_empty_count = 0;
c118080b 865 if (dso_capture_start(sdi) != SR_OK)
3b533202 866 break;
c118080b 867 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 868 break;
c118080b 869// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 870// break;
e98b7f1b 871 sr_dbg("Successfully requested next chunk.");
3b533202
BV
872 }
873 break;
874 case CAPTURE_FILLING:
e98b7f1b 875 /* No data yet. */
3b533202
BV
876 break;
877 case CAPTURE_READY_8BIT:
e749a8cb 878 /* Remember where in the captured frame the trigger is. */
269971dd 879 devc->trigger_offset = trigger_offset;
e749a8cb 880
ba7dd8bb 881 num_channels = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 882 /* TODO: Check malloc return value. */
ba7dd8bb 883 devc->framebuf = g_try_malloc(devc->framesize * num_channels * 2);
269971dd 884 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 885
3b533202 886 /* Tell the scope to send us the first frame. */
69e19dd7 887 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 888 break;
ae88b97b 889
e98b7f1b
UH
890 /*
891 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
892 * the data we just told the scope to send.
893 */
269971dd 894 devc->dev_state = FETCH_DATA;
ae88b97b
BV
895
896 /* Tell the frontend a new frame is on the way. */
897 packet.type = SR_DF_FRAME_BEGIN;
269971dd 898 sr_session_send(sdi, &packet);
3b533202
BV
899 break;
900 case CAPTURE_READY_9BIT:
901 /* TODO */
e98b7f1b 902 sr_err("Not yet supported.");
3b533202
BV
903 break;
904 case CAPTURE_TIMEOUT:
905 /* Doesn't matter, we'll try again next time. */
906 break;
907 default:
e98b7f1b
UH
908 sr_dbg("Unknown capture state: %d.", capturestate);
909 break;
3b533202
BV
910 }
911
912 return TRUE;
913}
914
6078d2c9 915static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
3b533202 916{
269971dd 917 struct dev_context *devc;
a873c594 918 struct drv_context *drvc = di->priv;
3b533202 919
3b533202 920 if (sdi->status != SR_ST_ACTIVE)
e73ffd42 921 return SR_ERR_DEV_CLOSED;
3b533202 922
269971dd
BV
923 devc = sdi->priv;
924 devc->cb_data = cb_data;
3b533202 925
ba7dd8bb
UH
926 if (configure_channels(sdi) != SR_OK) {
927 sr_err("Failed to configure channels.");
014359e3
BV
928 return SR_ERR;
929 }
930
c118080b 931 if (dso_init(sdi) != SR_OK)
3b533202
BV
932 return SR_ERR;
933
c118080b 934 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
935 return SR_ERR;
936
269971dd 937 devc->dev_state = CAPTURE;
102f1239 938 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202
BV
939
940 /* Send header packet to the session bus. */
29a27196 941 std_session_send_df_header(cb_data, LOG_PREFIX);
3b533202 942
3b533202
BV
943 return SR_OK;
944}
945
6078d2c9 946static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 947{
269971dd
BV
948 struct dev_context *devc;
949
950 (void)cb_data;
3b533202 951
3b533202
BV
952 if (sdi->status != SR_ST_ACTIVE)
953 return SR_ERR;
954
a3508e33
BV
955 devc = sdi->priv;
956 devc->dev_state = STOPPING;
3b533202
BV
957
958 return SR_OK;
959}
960
62bb8840 961SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
962 .name = "hantek-dso",
963 .longname = "Hantek DSO",
964 .api_version = 1,
6078d2c9
UH
965 .init = init,
966 .cleanup = cleanup,
967 .scan = scan,
968 .dev_list = dev_list,
3b412e3a 969 .dev_clear = dev_clear,
79917848 970 .config_get = config_get,
035a1078 971 .config_set = config_set,
a1c743fc 972 .config_list = config_list,
6078d2c9
UH
973 .dev_open = dev_open,
974 .dev_close = dev_close,
975 .dev_acquisition_start = dev_acquisition_start,
976 .dev_acquisition_stop = dev_acquisition_stop,
269971dd 977 .priv = NULL,
3b533202 978};