]> sigrok.org Git - libsigrok.git/blame - hardware/hantek-dso/api.c
hantek-dso: Support config_get(SR_CONF_CONN)
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
79917848
BV
40#define NUM_TIMEBASE 10
41#define NUM_VDIV 8
42
624f5b4c
BV
43static const int32_t scanopts[] = {
44 SR_CONF_CONN,
45};
46
f627afd6 47static const int32_t devopts[] = {
1953564a 48 SR_CONF_OSCILLOSCOPE,
be6db330 49 SR_CONF_LIMIT_FRAMES,
1953564a
BV
50 SR_CONF_CONTINUOUS,
51 SR_CONF_TIMEBASE,
52 SR_CONF_BUFFERSIZE,
53 SR_CONF_TRIGGER_SOURCE,
54 SR_CONF_TRIGGER_SLOPE,
55 SR_CONF_HORIZ_TRIGGERPOS,
56 SR_CONF_FILTER,
57 SR_CONF_VDIV,
58 SR_CONF_COUPLING,
79917848
BV
59 SR_CONF_NUM_TIMEBASE,
60 SR_CONF_NUM_VDIV,
3b533202
BV
61};
62
63static const char *probe_names[] = {
78693401 64 "CH1", "CH2",
3b533202
BV
65 NULL,
66};
67
034accb5
BV
68static const uint64_t buffersizes_32k[] = {
69 10240, 32768,
70};
71static const uint64_t buffersizes_512k[] = {
72 10240, 524288,
73};
74static const uint64_t buffersizes_14k[] = {
75 10240, 14336,
76};
77
62bb8840 78static const struct dso_profile dev_profiles[] = {
88a13f30 79 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 80 "Hantek", "DSO-2090",
034accb5 81 buffersizes_32k,
7b78b2f7 82 FIRMWARE_DIR "/hantek-dso-2090.fw" },
88a13f30
BV
83 { 0x04b4, 0x2150, 0x04b5, 0x2150,
84 "Hantek", "DSO-2150",
034accb5 85 buffersizes_32k,
7b78b2f7 86 FIRMWARE_DIR "/hantek-dso-2150.fw" },
88a13f30
BV
87 { 0x04b4, 0x2250, 0x04b5, 0x2250,
88 "Hantek", "DSO-2250",
034accb5 89 buffersizes_512k,
7b78b2f7 90 FIRMWARE_DIR "/hantek-dso-2250.fw" },
88a13f30
BV
91 { 0x04b4, 0x5200, 0x04b5, 0x5200,
92 "Hantek", "DSO-5200",
034accb5 93 buffersizes_14k,
7b78b2f7 94 FIRMWARE_DIR "/hantek-dso-5200.fw" },
88a13f30
BV
95 { 0x04b4, 0x520a, 0x04b5, 0x520a,
96 "Hantek", "DSO-5200A",
034accb5 97 buffersizes_512k,
7b78b2f7 98 FIRMWARE_DIR "/hantek-dso-5200A.fw" },
034accb5 99 { 0, 0, 0, 0, 0, 0, 0, 0 },
a370ef19
BV
100};
101
86bb3f4a 102static const uint64_t timebases[][2] = {
a370ef19
BV
103 /* microseconds */
104 { 10, 1000000 },
105 { 20, 1000000 },
106 { 40, 1000000 },
107 { 100, 1000000 },
108 { 200, 1000000 },
109 { 400, 1000000 },
110 /* milliseconds */
111 { 1, 1000 },
112 { 2, 1000 },
113 { 4, 1000 },
114 { 10, 1000 },
115 { 20, 1000 },
116 { 40, 1000 },
117 { 100, 1000 },
118 { 200, 1000 },
119 { 400, 1000 },
a370ef19
BV
120};
121
86bb3f4a 122static const uint64_t vdivs[][2] = {
313deed2
BV
123 /* millivolts */
124 { 10, 1000 },
125 { 20, 1000 },
126 { 50, 1000 },
127 { 100, 1000 },
128 { 200, 1000 },
129 { 500, 1000 },
130 /* volts */
131 { 1, 1 },
132 { 2, 1 },
133 { 5, 1 },
313deed2
BV
134};
135
62bb8840 136static const char *trigger_sources[] = {
a370ef19
BV
137 "CH1",
138 "CH2",
139 "EXT",
88a13f30 140 /* TODO: forced */
a370ef19 141};
3b533202 142
62bb8840 143static const char *filter_targets[] = {
ebb781a6
BV
144 "CH1",
145 "CH2",
146 /* TODO: "TRIGGER", */
ebb781a6
BV
147};
148
62bb8840 149static const char *coupling[] = {
b58fbd99
BV
150 "AC",
151 "DC",
152 "GND",
b58fbd99
BV
153};
154
982947f7 155SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
a873c594 156static struct sr_dev_driver *di = &hantek_dso_driver_info;
e98b7f1b 157
69b07d14 158static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 159
62bb8840 160static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
161{
162 struct sr_dev_inst *sdi;
87ca93c5 163 struct sr_probe *probe;
269971dd
BV
164 struct drv_context *drvc;
165 struct dev_context *devc;
87ca93c5 166 int i;
3b533202
BV
167
168 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 169 prof->vendor, prof->model, NULL);
3b533202
BV
170 if (!sdi)
171 return NULL;
a873c594 172 sdi->driver = di;
3b533202 173
e98b7f1b
UH
174 /*
175 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
176 * a trigger source internal to the device.
177 */
178 for (i = 0; probe_names[i]; i++) {
179 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
180 probe_names[i])))
181 return NULL;
182 sdi->probes = g_slist_append(sdi->probes, probe);
183 }
184
269971dd 185 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 186 sr_err("Device context malloc failed.");
3b533202
BV
187 return NULL;
188 }
e98b7f1b 189
269971dd
BV
190 devc->profile = prof;
191 devc->dev_state = IDLE;
192 devc->timebase = DEFAULT_TIMEBASE;
193 devc->ch1_enabled = TRUE;
194 devc->ch2_enabled = TRUE;
195 devc->voltage_ch1 = DEFAULT_VOLTAGE;
196 devc->voltage_ch2 = DEFAULT_VOLTAGE;
197 devc->coupling_ch1 = DEFAULT_COUPLING;
198 devc->coupling_ch2 = DEFAULT_COUPLING;
199 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
200 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
201 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
202 devc->framesize = DEFAULT_FRAMESIZE;
203 devc->triggerslope = SLOPE_POSITIVE;
204 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
205 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
206 sdi->priv = devc;
a873c594 207 drvc = di->priv;
269971dd 208 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
209
210 return sdi;
211}
212
014359e3 213static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 214{
014359e3 215 struct dev_context *devc;
69e19dd7 216 struct sr_probe *probe;
62bb8840 217 const GSList *l;
69e19dd7 218 int p;
3b533202 219
014359e3
BV
220 devc = sdi->priv;
221
69e19dd7 222 g_slist_free(devc->enabled_probes);
269971dd 223 devc->ch1_enabled = devc->ch2_enabled = FALSE;
69e19dd7
BV
224 for (l = sdi->probes, p = 0; l; l = l->next, p++) {
225 probe = l->data;
226 if (p == 0)
269971dd 227 devc->ch1_enabled = probe->enabled;
69e19dd7 228 else
269971dd 229 devc->ch2_enabled = probe->enabled;
69e19dd7
BV
230 if (probe->enabled)
231 devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
3b533202
BV
232 }
233
234 return SR_OK;
235}
236
949b3dc0 237static void clear_dev_context(void *priv)
39cfdd75 238{
269971dd 239 struct dev_context *devc;
39cfdd75 240
949b3dc0
BV
241 devc = priv;
242 g_free(devc->triggersource);
243 g_slist_free(devc->enabled_probes);
39cfdd75 244
949b3dc0 245}
39cfdd75 246
949b3dc0
BV
247static int clear_instances(void)
248{
249 return std_dev_clear(di, clear_dev_context);
39cfdd75
BV
250}
251
34f06b90 252static int hw_init(struct sr_context *sr_ctx)
61136ea6 253{
063e7aef 254 return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
61136ea6
BV
255}
256
39cfdd75 257static GSList *hw_scan(GSList *options)
3b533202
BV
258{
259 struct sr_dev_inst *sdi;
62bb8840 260 const struct dso_profile *prof;
269971dd
BV
261 struct drv_context *drvc;
262 struct dev_context *devc;
39cfdd75
BV
263 GSList *devices;
264 struct libusb_device_descriptor des;
3b533202 265 libusb_device **devlist;
61136ea6 266 int devcnt, ret, i, j;
3b533202 267
39cfdd75 268 (void)options;
e98b7f1b 269
a873c594 270 drvc = di->priv;
269971dd 271 drvc->instances = NULL;
39cfdd75 272
4b97c74e
UH
273 devcnt = 0;
274 devices = 0;
275
39cfdd75
BV
276 clear_instances();
277
278 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 279 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 280 for (i = 0; devlist[i]; i++) {
61136ea6 281 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
d4928d71
PS
282 sr_err("Failed to get device descriptor: %s.",
283 libusb_error_name(ret));
3b533202
BV
284 continue;
285 }
286
287 prof = NULL;
288 for (j = 0; dev_profiles[j].orig_vid; j++) {
289 if (des.idVendor == dev_profiles[j].orig_vid
290 && des.idProduct == dev_profiles[j].orig_pid) {
291 /* Device matches the pre-firmware profile. */
292 prof = &dev_profiles[j];
e98b7f1b 293 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 294 sdi = dso_dev_new(devcnt, prof);
39cfdd75 295 devices = g_slist_append(devices, sdi);
269971dd 296 devc = sdi->priv;
3b533202
BV
297 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
298 prof->firmware) == SR_OK)
299 /* Remember when the firmware on this device was updated */
269971dd 300 devc->fw_updated = g_get_monotonic_time();
3b533202 301 else
e98b7f1b
UH
302 sr_err("Firmware upload failed for "
303 "device %d.", devcnt);
3b533202 304 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 305 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
306 libusb_get_bus_number(devlist[i]), 0xff, NULL);
307 devcnt++;
308 break;
309 } else if (des.idVendor == dev_profiles[j].fw_vid
310 && des.idProduct == dev_profiles[j].fw_pid) {
311 /* Device matches the post-firmware profile. */
312 prof = &dev_profiles[j];
e98b7f1b 313 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
314 sdi = dso_dev_new(devcnt, prof);
315 sdi->status = SR_ST_INACTIVE;
39cfdd75 316 devices = g_slist_append(devices, sdi);
269971dd 317 devc = sdi->priv;
d0eec1ee 318 sdi->inst_type = SR_INST_USB;
c118080b 319 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
320 libusb_get_bus_number(devlist[i]),
321 libusb_get_device_address(devlist[i]), NULL);
322 devcnt++;
323 break;
324 }
325 }
326 if (!prof)
327 /* not a supported VID/PID */
328 continue;
329 }
330 libusb_free_device_list(devlist, 1);
331
39cfdd75 332 return devices;
3b533202
BV
333}
334
811deee4
BV
335static GSList *hw_dev_list(void)
336{
0e94d524 337 return ((struct drv_context *)(di->priv))->instances;
811deee4
BV
338}
339
25a0f108 340static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 341{
269971dd 342 struct dev_context *devc;
c118080b 343 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
344 int64_t timediff_us, timediff_ms;
345 int err;
3b533202 346
269971dd 347 devc = sdi->priv;
c118080b 348 usb = sdi->conn;
3b533202
BV
349
350 /*
e98b7f1b
UH
351 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
352 * for the FX2 to renumerate.
3b533202 353 */
fc8fe3e3 354 err = SR_ERR;
269971dd 355 if (devc->fw_updated > 0) {
e98b7f1b
UH
356 sr_info("Waiting for device to reset.");
357 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 358 g_usleep(300 * 1000);
fc8fe3e3
BV
359 timediff_ms = 0;
360 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 361 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
362 break;
363 g_usleep(100 * 1000);
269971dd 364 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 365 timediff_ms = timediff_us / 1000;
e98b7f1b 366 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 367 }
e98b7f1b 368 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 369 } else {
25a0f108 370 err = dso_open(sdi);
3b533202
BV
371 }
372
373 if (err != SR_OK) {
e98b7f1b 374 sr_err("Unable to open device.");
3b533202
BV
375 return SR_ERR;
376 }
377
c118080b 378 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 379 if (err != 0) {
d4928d71
PS
380 sr_err("Unable to claim interface: %s.",
381 libusb_error_name(err));
3b533202
BV
382 return SR_ERR;
383 }
384
385 return SR_OK;
386}
387
25a0f108 388static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 389{
3b533202
BV
390 dso_close(sdi);
391
392 return SR_OK;
393}
394
395static int hw_cleanup(void)
396{
269971dd
BV
397 struct drv_context *drvc;
398
a873c594 399 if (!(drvc = di->priv))
269971dd 400 return SR_OK;
3b533202 401
39cfdd75 402 clear_instances();
3b533202 403
3b533202
BV
404 return SR_OK;
405}
406
79917848
BV
407static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
408{
624f5b4c
BV
409 struct sr_usb_dev_inst *usb;
410 char str[128];
79917848
BV
411
412 (void)sdi;
413
414 switch (id) {
624f5b4c
BV
415 case SR_CONF_CONN:
416 if (!sdi || !sdi->conn)
417 return SR_ERR;
418 usb = sdi->conn;
419 if (usb->address == 255)
420 /* Device still needs to re-enumerate after firmware
421 * upload, so we don't know its (future) address. */
422 return SR_ERR;
423 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
424 *data = g_variant_new_string(str);
425 break;
79917848
BV
426 case SR_CONF_NUM_TIMEBASE:
427 *data = g_variant_new_int32(NUM_TIMEBASE);
428 break;
429 case SR_CONF_NUM_VDIV:
430 *data = g_variant_new_int32(NUM_VDIV);
431 break;
432 default:
bd6fbf62 433 return SR_ERR_NA;
79917848
BV
434 }
435
436 return SR_OK;
437}
438
f627afd6 439static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
3b533202 440{
269971dd 441 struct dev_context *devc;
f627afd6 442 double tmp_double;
86bb3f4a 443 uint64_t tmp_u64, p, q;
f627afd6
BV
444 int tmp_int, ret;
445 unsigned int i;
446 const char *tmp_str;
4a090d72 447 char **targets;
3b533202 448
3b533202
BV
449 if (sdi->status != SR_ST_ACTIVE)
450 return SR_ERR;
451
a370ef19 452 ret = SR_OK;
269971dd 453 devc = sdi->priv;
035a1078 454 switch (id) {
1953564a 455 case SR_CONF_LIMIT_FRAMES:
f627afd6 456 devc->limit_frames = g_variant_get_uint64(data);
ae88b97b 457 break;
1953564a 458 case SR_CONF_TRIGGER_SLOPE:
f627afd6 459 tmp_u64 = g_variant_get_uint64(data);
a370ef19
BV
460 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
461 ret = SR_ERR_ARG;
269971dd 462 devc->triggerslope = tmp_u64;
a370ef19 463 break;
1953564a 464 case SR_CONF_HORIZ_TRIGGERPOS:
f627afd6
BV
465 tmp_double = g_variant_get_double(data);
466 if (tmp_double < 0.0 || tmp_double > 1.0) {
e98b7f1b 467 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 468 ret = SR_ERR_ARG;
a370ef19 469 } else
f627afd6 470 devc->triggerposition = tmp_double;
a370ef19 471 break;
1953564a 472 case SR_CONF_BUFFERSIZE:
f627afd6 473 tmp_u64 = g_variant_get_uint64(data);
034accb5
BV
474 for (i = 0; i < 2; i++) {
475 if (devc->profile->buffersizes[i] == tmp_u64) {
269971dd 476 devc->framesize = tmp_u64;
a370ef19
BV
477 break;
478 }
479 }
034accb5 480 if (i == 2)
a370ef19
BV
481 ret = SR_ERR_ARG;
482 break;
1953564a 483 case SR_CONF_TIMEBASE:
86bb3f4a 484 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
485 tmp_int = -1;
486 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
487 if (timebases[i][0] == p && timebases[i][1] == q) {
488 tmp_int = i;
a370ef19
BV
489 break;
490 }
491 }
f627afd6
BV
492 if (tmp_int >= 0)
493 devc->timebase = tmp_int;
494 else
a370ef19
BV
495 ret = SR_ERR_ARG;
496 break;
1953564a 497 case SR_CONF_TRIGGER_SOURCE:
f627afd6 498 tmp_str = g_variant_get_string(data, NULL);
a370ef19 499 for (i = 0; trigger_sources[i]; i++) {
f627afd6
BV
500 if (!strcmp(tmp_str, trigger_sources[i])) {
501 devc->triggersource = g_strdup(tmp_str);
a370ef19
BV
502 break;
503 }
504 }
505 if (trigger_sources[i] == 0)
506 ret = SR_ERR_ARG;
507 break;
1953564a 508 case SR_CONF_FILTER:
f627afd6 509 tmp_str = g_variant_get_string(data, NULL);
269971dd 510 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
f627afd6 511 targets = g_strsplit(tmp_str, ",", 0);
ebb781a6
BV
512 for (i = 0; targets[i]; i++) {
513 if (targets[i] == '\0')
514 /* Empty filter string can be used to clear them all. */
515 ;
516 else if (!strcmp(targets[i], "CH1"))
269971dd 517 devc->filter_ch1 = TRUE;
ebb781a6 518 else if (!strcmp(targets[i], "CH2"))
269971dd 519 devc->filter_ch2 = TRUE;
ebb781a6 520 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 521 devc->filter_trigger = TRUE;
ebb781a6 522 else {
e98b7f1b 523 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
524 ret = SR_ERR_ARG;
525 }
526 }
527 g_strfreev(targets);
528 break;
1953564a 529 case SR_CONF_VDIV:
e98b7f1b 530 /* TODO: Not supporting vdiv per channel yet. */
86bb3f4a 531 g_variant_get(data, "(tt)", &p, &q);
f627afd6
BV
532 tmp_int = -1;
533 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
534 if (vdivs[i][0] == p && vdivs[i][1] == q) {
535 tmp_int = i;
313deed2
BV
536 break;
537 }
538 }
f627afd6
BV
539 if (tmp_int >= 0) {
540 devc->voltage_ch1 = tmp_int;
541 devc->voltage_ch2 = tmp_int;
542 } else
313deed2
BV
543 ret = SR_ERR_ARG;
544 break;
1953564a 545 case SR_CONF_COUPLING:
f627afd6 546 tmp_str = g_variant_get_string(data, NULL);
e98b7f1b 547 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 548 for (i = 0; coupling[i]; i++) {
f627afd6 549 if (!strcmp(tmp_str, coupling[i])) {
269971dd
BV
550 devc->coupling_ch1 = i;
551 devc->coupling_ch2 = i;
b58fbd99
BV
552 break;
553 }
554 }
555 if (coupling[i] == 0)
556 ret = SR_ERR_ARG;
557 break;
3b533202 558 default:
bd6fbf62 559 ret = SR_ERR_NA;
e98b7f1b 560 break;
3b533202
BV
561 }
562
563 return ret;
564}
565
f627afd6 566static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
a1c743fc 567{
034accb5 568 struct dev_context *devc;
3973ee26
BV
569 GVariant *tuple, *rational[2];
570 GVariantBuilder gvb;
571 unsigned int i;
a1c743fc
BV
572
573 (void)sdi;
574
034accb5
BV
575 if (!sdi)
576 return SR_ERR_ARG;
577
578 devc = sdi->priv;
a1c743fc 579 switch (key) {
624f5b4c
BV
580 case SR_CONF_SCAN_OPTIONS:
581 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
582 scanopts, ARRAY_SIZE(scanopts), sizeof(int32_t));
583 break;
9a6517d1 584 case SR_CONF_DEVICE_OPTIONS:
f627afd6
BV
585 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
586 devopts, ARRAY_SIZE(devopts), sizeof(int32_t));
9a6517d1 587 break;
6d1ceffa 588 case SR_CONF_BUFFERSIZE:
f627afd6 589 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
034accb5 590 devc->profile->buffersizes, 2, sizeof(uint64_t));
6d1ceffa 591 break;
2a7b113d 592 case SR_CONF_COUPLING:
f627afd6 593 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
2a7b113d 594 break;
e4f2b2ad 595 case SR_CONF_VDIV:
3973ee26
BV
596 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
597 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
598 rational[0] = g_variant_new_uint64(vdivs[i][0]);
599 rational[1] = g_variant_new_uint64(vdivs[i][1]);
600 tuple = g_variant_new_tuple(rational, 2);
601 g_variant_builder_add_value(&gvb, tuple);
602 }
603 *data = g_variant_builder_end(&gvb);
e4f2b2ad 604 break;
6e1fbcc4 605 case SR_CONF_FILTER:
f627afd6
BV
606 *data = g_variant_new_strv(filter_targets,
607 ARRAY_SIZE(filter_targets));
6e1fbcc4 608 break;
41f5bd09 609 case SR_CONF_TIMEBASE:
3973ee26
BV
610 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
611 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
612 rational[0] = g_variant_new_uint64(timebases[i][0]);
613 rational[1] = g_variant_new_uint64(timebases[i][1]);
614 tuple = g_variant_new_tuple(rational, 2);
615 g_variant_builder_add_value(&gvb, tuple);
616 }
617 *data = g_variant_builder_end(&gvb);
41f5bd09 618 break;
328bafab 619 case SR_CONF_TRIGGER_SOURCE:
f627afd6
BV
620 *data = g_variant_new_strv(trigger_sources,
621 ARRAY_SIZE(trigger_sources));
328bafab 622 break;
a1c743fc 623 default:
bd6fbf62 624 return SR_ERR_NA;
a1c743fc
BV
625 }
626
627 return SR_OK;
628}
629
69e19dd7 630static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 631 int num_samples)
3b533202
BV
632{
633 struct sr_datafeed_packet packet;
634 struct sr_datafeed_analog analog;
69e19dd7 635 struct dev_context *devc;
c5841b28 636 float ch1, ch2, range;
6e71ef3b 637 int num_probes, data_offset, i;
3b533202 638
69e19dd7 639 devc = sdi->priv;
269971dd 640 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
641 packet.type = SR_DF_ANALOG;
642 packet.payload = &analog;
6e71ef3b 643 /* TODO: support for 5xxx series 9-bit samples */
69e19dd7 644 analog.probes = devc->enabled_probes;
e749a8cb 645 analog.num_samples = num_samples;
9956f285
UH
646 analog.mq = SR_MQ_VOLTAGE;
647 analog.unit = SR_UNIT_VOLT;
886a52b6 648 /* TODO: Check malloc return value. */
6e71ef3b
BV
649 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
650 data_offset = 0;
3b533202 651 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
652 /*
653 * The device always sends data for both channels. If a channel
6e71ef3b 654 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
655 * data. However, we only send the requested channels to
656 * the bus.
c5841b28 657 *
e98b7f1b
UH
658 * Voltage values are encoded as a value 0-255 (0-512 on the
659 * DSO-5200*), where the value is a point in the range
660 * represented by the vdiv setting. There are 8 vertical divs,
661 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
662 * and 255 = +2V.
6e71ef3b 663 */
e98b7f1b 664 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd 665 if (devc->ch1_enabled) {
f627afd6 666 range = ((float)vdivs[devc->voltage_ch1][0] / vdivs[devc->voltage_ch1][1]) * 8;
e749a8cb 667 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
668 /* Value is centered around 0V. */
669 ch1 -= range / 2;
6e71ef3b
BV
670 analog.data[data_offset++] = ch1;
671 }
269971dd 672 if (devc->ch2_enabled) {
f627afd6 673 range = ((float)vdivs[devc->voltage_ch2][0] / vdivs[devc->voltage_ch2][1]) * 8;
e749a8cb 674 ch2 = range / 255 * *(buf + i * 2);
c5841b28 675 ch2 -= range / 2;
6e71ef3b
BV
676 analog.data[data_offset++] = ch2;
677 }
3b533202 678 }
269971dd 679 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
680}
681
e98b7f1b
UH
682/*
683 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 684 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 685 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
686 * the libsigrok session bus.
687 */
688static void receive_transfer(struct libusb_transfer *transfer)
689{
690 struct sr_datafeed_packet packet;
69e19dd7 691 struct sr_dev_inst *sdi;
269971dd 692 struct dev_context *devc;
e749a8cb
BV
693 int num_samples, pre;
694
69e19dd7
BV
695 sdi = transfer->user_data;
696 devc = sdi->priv;
d4007311 697 sr_spew("receive_transfer(): status %d received %d bytes.",
e98b7f1b 698 transfer->status, transfer->actual_length);
e749a8cb
BV
699
700 if (transfer->actual_length == 0)
701 /* Nothing to send to the bus. */
702 return;
703
704 num_samples = transfer->actual_length / 2;
705
d4007311 706 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
e98b7f1b 707 devc->samp_received + num_samples, devc->framesize);
e749a8cb 708
e98b7f1b
UH
709 /*
710 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
711 * doesn't represent the trigger point. The offset at which the trigger
712 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
713 * from there up the session bus. The samples in the frame buffer
714 * before that trigger point came after the end of the device's frame
715 * buffer was reached, and it wrapped around to overwrite up until the
716 * trigger point.
e749a8cb 717 */
269971dd 718 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 719 /* Trigger point not yet reached. */
269971dd 720 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 721 /* The entire chunk is before the trigger point. */
269971dd 722 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 723 transfer->buffer, num_samples * 2);
269971dd 724 devc->samp_buffered += num_samples;
e749a8cb 725 } else {
e98b7f1b
UH
726 /*
727 * This chunk hits or overruns the trigger point.
e749a8cb 728 * Store the part before the trigger fired, and
e98b7f1b
UH
729 * send the rest up to the session bus.
730 */
269971dd
BV
731 pre = devc->trigger_offset - devc->samp_received;
732 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 733 transfer->buffer, pre * 2);
269971dd 734 devc->samp_buffered += pre;
e749a8cb
BV
735
736 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
737 sr_dbg("Reached trigger point, %d samples buffered.",
738 devc->samp_buffered);
e749a8cb
BV
739
740 /* Avoid the corner case where the chunk ended at
741 * exactly the trigger point. */
742 if (num_samples > pre)
69e19dd7 743 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
744 num_samples - pre);
745 }
746 } else {
747 /* Already past the trigger point, just send it all out. */
69e19dd7 748 send_chunk(sdi, transfer->buffer,
e749a8cb
BV
749 num_samples);
750 }
751
269971dd 752 devc->samp_received += num_samples;
e749a8cb
BV
753
754 /* Everything in this transfer was either copied to the buffer or
755 * sent to the session bus. */
3b533202
BV
756 g_free(transfer->buffer);
757 libusb_free_transfer(transfer);
3b533202 758
269971dd 759 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
760 /* That was the last chunk in this frame. Send the buffered
761 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
762 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
763 devc->samp_buffered);
69e19dd7 764 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
765
766 /* Mark the end of this frame. */
ae88b97b 767 packet.type = SR_DF_FRAME_END;
269971dd 768 sr_session_send(devc->cb_data, &packet);
ae88b97b 769
269971dd 770 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 771 /* Terminate session */
a3508e33 772 devc->dev_state = STOPPING;
ae88b97b 773 } else {
269971dd 774 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
775 }
776 }
3b533202
BV
777}
778
779static int handle_event(int fd, int revents, void *cb_data)
780{
a3508e33 781 const struct sr_dev_inst *sdi;
ae88b97b 782 struct sr_datafeed_packet packet;
3b533202 783 struct timeval tv;
269971dd 784 struct dev_context *devc;
a873c594 785 struct drv_context *drvc = di->priv;
a3508e33
BV
786 const struct libusb_pollfd **lupfd;
787 int num_probes, i;
6e6eeff4
BV
788 uint32_t trigger_offset;
789 uint8_t capturestate;
3b533202 790
3b533202
BV
791 (void)fd;
792 (void)revents;
793
269971dd
BV
794 sdi = cb_data;
795 devc = sdi->priv;
a3508e33
BV
796 if (devc->dev_state == STOPPING) {
797 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
798 sr_dbg("Stopping acquisition.");
799 /*
800 * TODO: Doesn't really cancel pending transfers so they might
801 * come in after SR_DF_END is sent.
802 */
d4abb463 803 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
a3508e33
BV
804 for (i = 0; lupfd[i]; i++)
805 sr_source_remove(lupfd[i]->fd);
806 free(lupfd);
807
808 packet.type = SR_DF_END;
809 sr_session_send(sdi, &packet);
810
811 devc->dev_state = IDLE;
812
813 return TRUE;
814 }
815
3b533202
BV
816 /* Always handle pending libusb events. */
817 tv.tv_sec = tv.tv_usec = 0;
d4abb463 818 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 819
3b533202 820 /* TODO: ugh */
269971dd 821 if (devc->dev_state == NEW_CAPTURE) {
c118080b 822 if (dso_capture_start(sdi) != SR_OK)
3b533202 823 return TRUE;
c118080b 824 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 825 return TRUE;
c118080b 826// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 827// return TRUE;
e98b7f1b 828 sr_dbg("Successfully requested next chunk.");
269971dd 829 devc->dev_state = CAPTURE;
3b533202
BV
830 return TRUE;
831 }
269971dd 832 if (devc->dev_state != CAPTURE)
3b533202
BV
833 return TRUE;
834
c118080b 835 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 836 return TRUE;
3b533202 837
e98b7f1b
UH
838 sr_dbg("Capturestate %d.", capturestate);
839 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
840 switch (capturestate) {
841 case CAPTURE_EMPTY:
269971dd
BV
842 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
843 devc->capture_empty_count = 0;
c118080b 844 if (dso_capture_start(sdi) != SR_OK)
3b533202 845 break;
c118080b 846 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 847 break;
c118080b 848// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 849// break;
e98b7f1b 850 sr_dbg("Successfully requested next chunk.");
3b533202
BV
851 }
852 break;
853 case CAPTURE_FILLING:
e98b7f1b 854 /* No data yet. */
3b533202
BV
855 break;
856 case CAPTURE_READY_8BIT:
e749a8cb 857 /* Remember where in the captured frame the trigger is. */
269971dd 858 devc->trigger_offset = trigger_offset;
e749a8cb 859
269971dd 860 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 861 /* TODO: Check malloc return value. */
269971dd
BV
862 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
863 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 864
3b533202 865 /* Tell the scope to send us the first frame. */
69e19dd7 866 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 867 break;
ae88b97b 868
e98b7f1b
UH
869 /*
870 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
871 * the data we just told the scope to send.
872 */
269971dd 873 devc->dev_state = FETCH_DATA;
ae88b97b
BV
874
875 /* Tell the frontend a new frame is on the way. */
876 packet.type = SR_DF_FRAME_BEGIN;
269971dd 877 sr_session_send(sdi, &packet);
3b533202
BV
878 break;
879 case CAPTURE_READY_9BIT:
880 /* TODO */
e98b7f1b 881 sr_err("Not yet supported.");
3b533202
BV
882 break;
883 case CAPTURE_TIMEOUT:
884 /* Doesn't matter, we'll try again next time. */
885 break;
886 default:
e98b7f1b
UH
887 sr_dbg("Unknown capture state: %d.", capturestate);
888 break;
3b533202
BV
889 }
890
891 return TRUE;
892}
893
3ffb6964 894static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 895 void *cb_data)
3b533202
BV
896{
897 const struct libusb_pollfd **lupfd;
269971dd 898 struct dev_context *devc;
a873c594 899 struct drv_context *drvc = di->priv;
3b533202
BV
900 int i;
901
3b533202
BV
902 if (sdi->status != SR_ST_ACTIVE)
903 return SR_ERR;
904
269971dd
BV
905 devc = sdi->priv;
906 devc->cb_data = cb_data;
3b533202 907
014359e3 908 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 909 sr_err("Failed to configure probes.");
014359e3
BV
910 return SR_ERR;
911 }
912
c118080b 913 if (dso_init(sdi) != SR_OK)
3b533202
BV
914 return SR_ERR;
915
c118080b 916 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
917 return SR_ERR;
918
269971dd 919 devc->dev_state = CAPTURE;
d4abb463 920 lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx);
3b533202 921 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
922 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
923 handle_event, (void *)sdi);
3b533202
BV
924 free(lupfd);
925
926 /* Send header packet to the session bus. */
4afdfd46 927 std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
3b533202 928
3b533202
BV
929 return SR_OK;
930}
931
69b07d14 932static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 933{
269971dd
BV
934 struct dev_context *devc;
935
936 (void)cb_data;
3b533202 937
3b533202
BV
938 if (sdi->status != SR_ST_ACTIVE)
939 return SR_ERR;
940
a3508e33
BV
941 devc = sdi->priv;
942 devc->dev_state = STOPPING;
3b533202
BV
943
944 return SR_OK;
945}
946
62bb8840 947SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
948 .name = "hantek-dso",
949 .longname = "Hantek DSO",
950 .api_version = 1,
951 .init = hw_init,
952 .cleanup = hw_cleanup,
61136ea6 953 .scan = hw_scan,
811deee4
BV
954 .dev_list = hw_dev_list,
955 .dev_clear = clear_instances,
79917848 956 .config_get = config_get,
035a1078 957 .config_set = config_set,
a1c743fc 958 .config_list = config_list,
3b533202
BV
959 .dev_open = hw_dev_open,
960 .dev_close = hw_dev_close,
62bb8840
UH
961 .dev_acquisition_start = hw_dev_acquisition_start,
962 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 963 .priv = NULL,
3b533202 964};