Difference between revisions of "Main Page"

Revision as of 21:14, 29 April 2011

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various logic analyzer hardware products. It is licensed under the terms of the GNU GPL. Design goals and features include:

Broad hardware support. Supports many different logic analyzers from various vendors.
Cross-platform. Works on Linux, Mac OS X, Windows, and FreeBSD (and on x86, ARM, Sparc, PowerPC, ...).
Scriptable protocol decoding. Extendable with protocol decoders and analyzers written in Python.
Format support. Supports various input/output formats (binary, ASCII, hex, CSV, gnuplot, VCD, ...).

Supported hardware

Saleae Logic	EE Elec. XLA/ESLA100	ASIX SIGMA	Openbench Logic Sniffer
Zeroplus Logic Cube LAP-C	ChronoVu LA8	Robomotic MiniLogic	CWAV USBee SX
Braintechnology USB-LPS	Intronix Logicport	RockyLogic Ant18e	File:MSO-19.JPG Link Instruments MSO-19
File:Buspirate v3 front.jpg Buspirate	Pico Tech PicoScope 2203	Ikalogic SCANALOGIC-2 PRO	Microchip PICkit2
MiniLA Mockup	Logic Shrimp

Documentation

Building: Linux, Mac OS X, Windows, FreeBSD
Command-line
Cross-platform GUI
Input output formats
Protocol decoders
Logic Analyzer Comparison
Press
Logo

Development

Getting in touch

Mailing lists: sigrok-devel (archive), sigrok-commits (archive)
IRC: #sigrok on Freenode
identi.ca: sigrok group
Sites: SF, Fm, ohloh, del.icio.us

Small logic analyzer collection

News / Events

2011/04/03: ChronoVu LA8 support
2011/04/03: sigrok 0.2 released
2011/03/15: sigrok in Debian
2011/01/20: sigrok 0.1 released
2010/12/27: sigrok @ 27C3
2010/05/01: ASIX SIGMA support
2010/04/06: VCD and Gnuplot output

IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!

@@ Line 1: / Line 1: @@
-<table width="100%" valign="top"><tr valign="top"><td width="84%">
+<table width="100%" valign="top"><tr valign="top"><td width="80%">
 <div style="margin-top:0.5em; margin-bottom:0.5em; padding:0.5em 0.5em 0.5em 0.5em; background-color:#cfdfff; align:right; border:1px solid #aabbcc;">
-The '''sigrok''' project aims at creating a '''portable, cross-platform, Free/Libre/Open-Source logic analyzer software''' that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the '''GNU GPL'''. Some of the design goals and features include:
+The '''sigrok''' project aims at creating a '''portable, cross-platform, Free/Libre/Open-Source logic analyzer software''' that supports various logic analyzer hardware products. It is licensed under the terms of the '''GNU GPL'''. Design goals and features include:
 <small>
-* '''Broad hardware support'''. Supports a wide variety of logic analyzers from various vendors with different capabilities.
+* '''Broad hardware support'''. Supports many different logic analyzers from various vendors.
-* '''Cross-platform'''. Works on [[Linux]], [[Mac OS X]], [[Windows]], and [[FreeBSD]], and on many architectures including x86, ARM, Sparc and PowerPC.
+* '''Cross-platform'''. Works on [[Linux]], [[Mac OS X]], [[Windows]], and [[FreeBSD]] (and on x86, ARM, Sparc, PowerPC, ...).
 * '''Scriptable protocol decoding'''. Extendable with [[protocol decoders]] and analyzers written in Python.
-* '''Format support'''. Supports various [[Input output formats|input and output formats]] (raw, ASCII, hex, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others).
+* '''Format support'''. Supports various [[Input output formats|input/output formats]] (binary, ASCII, hex, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], ...).
 </small>
 </div>