Difference between revisions of "Main Page"

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== <span style="font-variant:small-caps">Supported hardware</span> ==
== <span style="font-variant:small-caps">Supported hardware</span> ([[File:Nuvola OK.png|16px]]: <small>supported</small>, [[File:Nuvola Orange.png|16px]]: <small>work in progress</small>, [[File:Nuvola Red.png|16px]]: <small>planned</small>) ==


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| [[File:Rigol_VS5202D_Full.jpg|40x25px|link=Rigol VS5202D]]&nbsp;<small>[[File:Nuvola Red.png|16px]]<br/>[[Rigol VS5202D]]</small>
| [[File:Rigol_VS5202D_Full.jpg|40x25px|link=Rigol VS5202D]]&nbsp;<small>[[File:Nuvola Red.png|16px]]<br/>[[Rigol VS5202D]]</small>
| [[File:Agilent MSO7104A.jpg|40x25px|link=Agilent MSO7104AMSO7104A]]&nbsp;<small>[[File:Nuvola Red.png|16px]]<br/>[[Agilent MSO7104A]]</small>


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Revision as of 23:04, 24 May 2012

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various logic analyzer hardware products. It is licensed under the terms of the GNU GPL. Design goals and features include:

  • Broad hardware support. Supports many different logic analyzers from various vendors.
  • Cross-platform. Works on Linux, Mac OS X, Windows, and FreeBSD (and on x86, ARM, Sparc, PowerPC, ...).
  • Scriptable protocol decoding. Extendable with stackable protocol decoders written in Python.
  • Format support. Supports various input/output formats (binary, ASCII, hex, CSV, gnuplot, VCD, ...).

Supported hardware (Nuvola OK.png: supported, Nuvola Orange.png: work in progress, Nuvola Red.png: planned)

Logic analyzers:
Saleae Logic.jpg Nuvola OK.png
Saleae Logic
Eeelec xla esla100.jpg Nuvola OK.png
EE Elec. XLA/ESLA100
ASIX SIGMA.jpg Nuvola OK.png
ASIX SIGMA
Openbench logic sniffer front.jpg Nuvola OK.png
Openbench Logic Sniffer
Logic-shrimp-front.png Nuvola OK.png
Logic Shrimp
Zeroplus Logic Cube.jpg Nuvola OK.png
Zeroplus Logic Cube LAP-C
Chronovu la8 device.jpg Nuvola OK.png
ChronoVu LA8
File:Buglogic3.jpg Nuvola OK.png
Robomotic BugLogic 3
Robomotic minilogic.jpg Nuvola OK.png
Robomotic MiniLogic
Lcsoft-miniboard-front.png Nuvola OK.png
Lcsoft Mini Board
Braintechnology usb lps.jpg Nuvola OK.png
Braintechnology USB-LPS
Cwav usbee sx.jpg Nuvola OK.png
CWAV USBee SX
File:Buspirate v3 front.jpg Nuvola Orange.png
Buspirate
Intronix Logicport.jpg Nuvola Red.png
Intronix Logicport LA1034
Ant18e closed.jpg Nuvola Orange.png
RockyLogic Ant18e
Rockylogic ant8 device.jpg Nuvola Orange.png
RockyLogic Ant8
Ikalogic scanalogic2 device with probes.jpg Nuvola Red.png
Ikalogic SCANALOGIC-2 PRO
Microchip pickit2 device front.jpg Nuvola Red.png
Microchip PICkit2
Minila mockup.jpg Nuvola Red.png
MiniLA Mockup
Acute pkla1216 front.jpg Nuvola Red.png
Acute PKLA-1216
File:Saleae logic16 front.jpg Nuvola Red.png
Saleae Logic16
Mixed-signal devices:
Esla201a.JPG Nuvola OK.png
EE Elec. ESLA201A
File:MSO-19.JPG Nuvola Orange.png
Link Instruments MSO-19
Polabs poscope basic2 device top.jpg Nuvola Red.png
PoLabs PoScope Basic2
File:QA100 Full.JPG Nuvola Red.png
QuantAsylum QA100
File:Rigol VS5202D Full.jpg Nuvola Red.png
Rigol VS5202D
Agilent MSO7104A.jpg Nuvola Red.png
Agilent MSO7104A
Oscilloscopes:
Dso2090-case-top-small.jpg Nuvola Orange.png
Hantek DSO-2090
Picoscope 2203 front.jpg Nuvola Red.png
Pico Tech PicoScope 2203
Velleman pcsu1000 pcb front.jpg Nuvola Orange.png
Velleman PCSU1000

Sigrok stone.png Documentation

Sigrok stone.png Development

Sigrok stone.png Getting in touch

Logic analyzer collection


Sigrok stone.png News / Events / Press


IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!