Difference between revisions of "Main Page"

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<!-- Please always make this list 7 items long (7 most recent news items). -->
<!-- Please always make this list 7 items long (7 most recent news items). -->
<small>
<small>
* '''2012/04/26:''' [[News#2012.2F04.2F26_New_protocol_decoder:_JTAG|New decoder: JTAG]]
* '''2012/04/17:''' [[News#2012.2F04.2F17_libsigrok_0.1.0_released|libsigrok 0.1.0 released]]
* '''2012/04/17:''' [[News#2012.2F04.2F17_libsigrok_0.1.0_released|libsigrok 0.1.0 released]]
* '''2012/04/17:''' [[News#2012.2F04.2F17_libsigrokdecode_0.1.0_released|libsigrokdecode 0.1.0 released]]
* '''2012/04/17:''' [[News#2012.2F04.2F17_libsigrokdecode_0.1.0_released|libsigrokdecode 0.1.0 released]]
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* '''2011/11/15:''' [[News#2011.2F11.2F15_GTK.2B_GUI_started|GTK+ GUI started]]
* '''2011/11/15:''' [[News#2011.2F11.2F15_GTK.2B_GUI_started|GTK+ GUI started]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_ChronoVu_LA8_now_supported|ChronoVu LA8 support]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_ChronoVu_LA8_now_supported|ChronoVu LA8 support]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_sigrok_0.2_released|sigrok 0.2 released]]
</small>
</small>



Revision as of 14:52, 30 April 2012

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various logic analyzer hardware products. It is licensed under the terms of the GNU GPL. Design goals and features include:

  • Broad hardware support. Supports many different logic analyzers from various vendors.
  • Cross-platform. Works on Linux, Mac OS X, Windows, and FreeBSD (and on x86, ARM, Sparc, PowerPC, ...).
  • Scriptable protocol decoding. Extendable with stackable protocol decoders written in Python.
  • Format support. Supports various input/output formats (binary, ASCII, hex, CSV, gnuplot, VCD, ...).

Supported hardware

Saleae Logic.jpg Nuvola OK.png
Saleae Logic
Eeelec xla esla100.jpg Nuvola OK.png
EE Elec. XLA/ESLA100
ASIX SIGMA.jpg Nuvola OK.png
ASIX SIGMA
Openbench logic sniffer front.jpg Nuvola OK.png
Openbench Logic Sniffer
Zeroplus Logic Cube.jpg Nuvola OK.png
Zeroplus Logic Cube LAP-C
Chronovu la8 device.jpg Nuvola OK.png
ChronoVu LA8
Robomotic buglogic3.jpg Nuvola OK.png
Robomotic BugLogic 3
Robomotic minilogic.jpg Nuvola OK.png
Robomotic MiniLogic
Logic-shrimp-front.png Nuvola OK.png
Logic Shrimp
Lcsoft-miniboard-front.png Nuvola OK.png
Lcsoft Mini Board
Cwav usbee sx.jpg Nuvola Orange.png
CWAV USBee SX
Braintechnology usb lps.jpg Nuvola Orange.png
Braintechnology USB-LPS
Dso2090-case-top-small.jpg Nuvola Orange.png
Hantek DSO-2090
Intronix Logicport.jpg Nuvola Orange.png
Intronix Logicport
Ant18e closed.jpg Nuvola Orange.png
RockyLogic Ant18e
Rockylogic ant8 device.jpg Nuvola Orange.png
RockyLogic Ant8
File:MSO-19.JPG Nuvola Orange.png
Link Instruments MSO-19
Esla201a.JPG Nuvola Orange.png
EE Elec. ESLA201A
File:Buspirate v3 front.jpg Nuvola Red.png
Buspirate
Picoscope 2203 front.jpg Nuvola Red.png
Pico Tech PicoScope 2203
Ikalogic scanalogic2 device with probes.jpg Nuvola Red.png
Ikalogic SCANALOGIC-2 PRO
Microchip pickit2 device front.jpg Nuvola Red.png
Microchip PICkit2
Minila mockup.jpg Nuvola Red.png
MiniLA Mockup
Acute pkla1216 front.jpg Nuvola Red.png
Acute PKLA-1216
File:Saleae logic16 front.jpg Nuvola Red.png
Saleae Logic16
Polabs poscope basic2 device top.jpg Nuvola Red.png
PoLabs PoScope Basic2
File:QA100 Full.JPG Nuvola Red.png
QuantAsylum QA100
File:Rigol VS5202D Full.jpg Nuvola Red.png
Rigol VS5202D
Velleman pcsu1000 pcb front.jpg Nuvola Red.png
Velleman PCSU1000

Sigrok stone.png Documentation

Sigrok stone.png Development

Sigrok stone.png Getting in touch

Logic analyzer collection


Sigrok stone.png News / Events


IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!