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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL. Some of the design goals and features include: Broad hardware support. Supports a wide variety of logic analyzers from various vendors with different capabilities. Cross-platform. Works on Linux, Mac OS X, Windows, and FreeBSD, and on many architectures including x86, ARM, Sparc and PowerPC. Scriptable protocol decoding. Extendable with protocol decoders and analyzers written in Python. Format support. Supports various input and output formats (raw, ASCII, hex, CSV, gnuplot, VCD, others). Supported hardware Saleae Logic EE Eleec. XLA/ESLA100 ASIX SIGMA Openbench Logic Sniffer Zeroplus Logic Cube LAP-C ChronoVu LA8 Robomotic MiniLogic CWAV USBee SX Braintechnology USB-LPS Intronix Logicport RockyLogic Ant18e File:MSO-19.JPG Link Instruments MSO-19 File:Buspirate v3 front.jpg Buspirate Pico Tech PicoScope 2203 Ikalogic SCANALOGIC-2 PRO Microchip PICkit2 MiniLA Mockup Logic Shrimp Documentation Building: Linux, Mac OS X, Windows, FreeBSD Command-line Cross-platform GUI Input output formats Protocol decoders Logic Analyzer Comparison Press Logo Development Browse Source Code TODO Design Ideas Protocol Decoder API Formats and structures Hardware plugin API Input API Output API Getting in touch Mailing lists: sigrok-devel (archive), sigrok-commits (archive) IRC: #sigrok on Freenode identi.ca: sigrok group Sites: SF, Fm, ohloh, del.icio.us

Small logic analyzer collection News / Events 2011/04/03: ChronoVu LA8 support 2011/04/03: sigrok 0.2 released 2011/03/15: sigrok in Debian 2011/01/20: sigrok 0.1 released 2010/12/27: sigrok @ 27C3 2010/05/01: ASIX SIGMA support 2010/04/06: VCD and Gnuplot output 2010/04/01: ZEROPLUS Logic Cube LAP-C support 2010/03/30: libsigrokdecode started 2010/03/19: GUI: i18n support 2010/03/17: Session save support 2010/03/16: GUI started 2010/03/14: Official project start

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