Difference between revisions of "Main Page"

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<!-- Please always make this list 7 items long (7 most recent news items). -->
<!-- Please always make this list 7 items long (7 most recent news items). -->
<small>
<small>
* '''2011/11/15:''' [[News#2011.2F11.2F15_GTK.2B_GUI_started|GTK+ GUI started]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_ChronoVu_LA8_now_supported|ChronoVu LA8 support]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_ChronoVu_LA8_now_supported|ChronoVu LA8 support]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_sigrok_0.2_released|sigrok 0.2 released]]
* '''2011/04/03:''' [[News#2011.2F04.2F03_sigrok_0.2_released|sigrok 0.2 released]]
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* '''2010/12/27:''' [[News##2010.2F12.2F27_sigrok_.40_27C3|sigrok @ 27C3]]
* '''2010/12/27:''' [[News##2010.2F12.2F27_sigrok_.40_27C3|sigrok @ 27C3]]
* '''2010/05/01:''' [[News#2010.2F05.2F01_ASIX_SIGMA_now_supported|ASIX SIGMA support]]
* '''2010/05/01:''' [[News#2010.2F05.2F01_ASIX_SIGMA_now_supported|ASIX SIGMA support]]
* '''2010/04/06:''' VCD and Gnuplot output
</small>
</small>



Revision as of 12:26, 19 November 2011

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various logic analyzer hardware products. It is licensed under the terms of the GNU GPL. Design goals and features include:

  • Broad hardware support. Supports many different logic analyzers from various vendors.
  • Cross-platform. Works on Linux, Mac OS X, Windows, and FreeBSD (and on x86, ARM, Sparc, PowerPC, ...).
  • Scriptable protocol decoding. Extendable with protocol decoders and analyzers written in Python.
  • Format support. Supports various input/output formats (binary, ASCII, hex, CSV, gnuplot, VCD, ...).

Supported hardware

Saleae Logic.jpg Nuvola OK.png
Saleae Logic
Eeelec xla esla100.jpg Nuvola OK.png
EE Elec. XLA/ESLA100
ASIX SIGMA.jpg Nuvola OK.png
ASIX SIGMA
Openbench logic sniffer front.jpg Nuvola OK.png
Openbench Logic Sniffer
Zeroplus Logic Cube.jpg Nuvola OK.png
Zeroplus Logic Cube LAP-C
Chronovu la8 device.jpg Nuvola OK.png
ChronoVu LA8
Robomotic minilogic.jpg Nuvola OK.png
Robomotic MiniLogic
Logic-shrimp-front.png Nuvola OK.png
Logic Shrimp
Lcsoft-miniboard-front.png Nuvola OK.png
Lcsoft Mini Board
Cwav usbee sx.jpg Nuvola Orange.png
CWAV USBee SX
Braintechnology usb lps.jpg Nuvola Orange.png
Braintechnology USB-LPS
Intronix Logicport.jpg Nuvola Orange.png
Intronix Logicport
Ant18e closed.jpg Nuvola Orange.png
RockyLogic Ant18e
File:MSO-19.JPG Nuvola Orange.png
Link Instruments MSO-19
File:Buspirate v3 front.jpg Nuvola Red.png
Buspirate
Picoscope 2203 front.jpg Nuvola Red.png
Pico Tech PicoScope 2203
Ikalogic scanalogic2 device with probes.jpg Nuvola Red.png
Ikalogic SCANALOGIC-2 PRO
Microchip pickit2 device front.jpg Nuvola Red.png
Microchip PICkit2
Minila mockup.jpg Nuvola Red.png
MiniLA Mockup
Acute pkla1216 front.jpg Nuvola Red.png
Acute PKLA-1216

Sigrok stone.png Documentation

Sigrok stone.png Development

Sigrok stone.png Getting in touch

Small logic analyzer collection


Sigrok stone.png News / Events


IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!