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0588ed70 1##
50bd5d25 2## This file is part of the libsigrokdecode project.
0588ed70 3##
d94ff143 4## Copyright (C) 2010-2013 Uwe Hermann <uwe@hermann-uwe.de>
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5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, write to the Free Software
18## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19##
20
ab4aa33c 21# I²C protocol decoder
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22
23# TODO: Look into arbitration, collision detection, clock synchronisation, etc.
9e95e4d8 24# TODO: Implement support for 10bit slave addresses.
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25# TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0).
26# TODO: Implement support for detecting various bus errors.
23fb2e12 27
677d597b 28import sigrokdecode as srd
b2c19614 29
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30'''
31Protocol output format:
32
ab4aa33c 33I²C packet:
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34[<cmd>, <data>]
35
36<cmd> is one of:
37 - 'START' (START condition)
38 - 'START REPEAT' (Repeated START condition)
39 - 'ADDRESS READ' (Slave address, read)
40 - 'ADDRESS WRITE' (Slave address, write)
41 - 'DATA READ' (Data, read)
42 - 'DATA WRITE' (Data, write)
43 - 'STOP' (STOP condition)
44 - 'ACK' (ACK bit)
45 - 'NACK' (NACK bit)
46
47<data> is the data or address byte associated with the 'ADDRESS*' and 'DATA*'
48command. Slave addresses do not include bit 0 (the READ/WRITE indication bit).
49For example, a slave address field could be 0x51 (instead of 0xa2).
50For 'START', 'START REPEAT', 'STOP', 'ACK', and 'NACK' <data> is None.
51'''
52
d94ff143 53# CMD: [annotation-type-index, long annotation, short annotation]
1541976f 54proto = {
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55 'START': [0, 'Start', 'S'],
56 'START REPEAT': [1, 'Start repeat', 'Sr'],
57 'STOP': [2, 'Stop', 'P'],
58 'ACK': [3, 'ACK', 'A'],
59 'NACK': [4, 'NACK', 'N'],
60 'ADDRESS READ': [5, 'Address read', 'AR'],
61 'ADDRESS WRITE': [6, 'Address write', 'AW'],
62 'DATA READ': [7, 'Data read', 'DR'],
63 'DATA WRITE': [8, 'Data write', 'DW'],
15969949 64}
e5080882 65
677d597b 66class Decoder(srd.Decoder):
a2c2afd9 67 api_version = 1
67e847fd 68 id = 'i2c'
ab4aa33c 69 name = 'I²C'
9a12a6e7 70 longname = 'Inter-Integrated Circuit'
a465436e 71 desc = 'Two-wire, multi-master, serial bus.'
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72 license = 'gplv2+'
73 inputs = ['logic']
74 outputs = ['i2c']
bc5f5a43
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75 probes = [
76 {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'},
77 {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'},
78 ]
b77614bc 79 optional_probes = []
f39d2404 80 options = {
d94ff143 81 'address_format': ['Displayed slave address format', 'shifted'],
ad2dc0de 82 }
e97b6ef5 83 annotations = [
fbd226c3
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84 ['start', 'Start condition'],
85 ['repeat-start', 'Repeat start condition'],
86 ['stop', 'Stop condition'],
87 ['ack', 'ACK'],
88 ['nack', 'NACK'],
89 ['address-read', 'Address read'],
90 ['address-write', 'Address write'],
91 ['data-read', 'Data read'],
92 ['data-write', 'Data write'],
93 ['warnings', 'Human-readable warnings'],
15969949 94 ]
a929afa6 95 binary = (
5cb2cb02
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96 ('address-read', 'Address read'),
97 ('address-write', 'Address write'),
98 ('data-read', 'Data read'),
99 ('data-write', 'Data write'),
a929afa6 100 )
0588ed70 101
3643fc3f 102 def __init__(self, **kwargs):
8d2a9636 103 self.samplerate = None
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104 self.startsample = -1
105 self.samplenum = None
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106 self.bitcount = 0
107 self.databyte = 0
108 self.wr = -1
5dd9af5b 109 self.is_repeat_start = 0
2b716038 110 self.state = 'FIND START'
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111 self.oldscl = 1
112 self.oldsda = 1
d94ff143 113 self.oldpins = [1, 1]
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114 self.pdu_start = None
115 self.pdu_bits = 0
116
117 def metadata(self, key, value):
118 if key == srd.SRD_CONF_SAMPLERATE:
119 self.samplerate = value
f39d2404 120
8915b346 121 def start(self):
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122 self.out_proto = self.register(srd.OUTPUT_PYTHON)
123 self.out_ann = self.register(srd.OUTPUT_ANN)
be6733ca 124 self.out_binary = self.register(srd.OUTPUT_BINARY)
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125 self.out_bitrate = self.register(srd.OUTPUT_META,
126 meta=(int, 'Bitrate', 'Bitrate from Start bit to Stop bit'))
3643fc3f 127
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128 def putx(self, data):
129 self.put(self.startsample, self.samplenum, self.out_ann, data)
130
131 def putp(self, data):
132 self.put(self.startsample, self.samplenum, self.out_proto, data)
133
a929afa6
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134 def putb(self, data):
135 self.put(self.startsample, self.samplenum, self.out_binary, data)
136
7b86f0bc 137 def is_start_condition(self, scl, sda):
eb7082c9 138 # START condition (S): SDA = falling, SCL = high
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139 if (self.oldsda == 1 and sda == 0) and scl == 1:
140 return True
141 return False
142
143 def is_data_bit(self, scl, sda):
eb7082c9 144 # Data sampling of receiver: SCL = rising
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145 if self.oldscl == 0 and scl == 1:
146 return True
147 return False
148
149 def is_stop_condition(self, scl, sda):
eb7082c9 150 # STOP condition (P): SDA = rising, SCL = high
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151 if (self.oldsda == 0 and sda == 1) and scl == 1:
152 return True
153 return False
154
e5080882 155 def found_start(self, scl, sda):
c4975078 156 self.startsample = self.samplenum
8d2a9636
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157 self.pdu_start = self.samplenum
158 self.pdu_bits = 0
c4975078 159 cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START'
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160 self.putp([cmd, None])
161 self.putx([proto[cmd][0], proto[cmd][1:]])
2b716038 162 self.state = 'FIND ADDRESS'
7b86f0bc 163 self.bitcount = self.databyte = 0
5dd9af5b 164 self.is_repeat_start = 1
7b86f0bc 165 self.wr = -1
7b86f0bc 166
c4975078 167 # Gather 8 bits of data plus the ACK/NACK bit.
e5080882 168 def found_address_or_data(self, scl, sda):
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169 # Address and data are transmitted MSB-first.
170 self.databyte <<= 1
171 self.databyte |= sda
172
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173 if self.bitcount == 0:
174 self.startsample = self.samplenum
175
7b86f0bc 176 # Return if we haven't collected all 8 + 1 bits, yet.
c4975078 177 self.bitcount += 1
1b75abfd 178 if self.bitcount != 8:
eb7082c9 179 return
7b86f0bc 180
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181 # We triggered on the ACK/NACK bit, but won't report that until later.
182 self.startsample -= 1
183
d94ff143 184 d = self.databyte
2b716038 185 if self.state == 'FIND ADDRESS':
7b86f0bc 186 # The READ/WRITE bit is only in address bytes, not data bytes.
bf1c3f4d 187 self.wr = 0 if (self.databyte & 1) else 1
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188 if self.options['address_format'] == 'shifted':
189 d = d >> 1
15969949 190
a929afa6 191 bin_class = -1
2b716038 192 if self.state == 'FIND ADDRESS' and self.wr == 1:
a2d2aff2 193 cmd = 'ADDRESS WRITE'
a929afa6 194 bin_class = 1
2b716038 195 elif self.state == 'FIND ADDRESS' and self.wr == 0:
a2d2aff2 196 cmd = 'ADDRESS READ'
a929afa6 197 bin_class = 0
2b716038 198 elif self.state == 'FIND DATA' and self.wr == 1:
a2d2aff2 199 cmd = 'DATA WRITE'
a929afa6 200 bin_class = 3
2b716038 201 elif self.state == 'FIND DATA' and self.wr == 0:
a2d2aff2 202 cmd = 'DATA READ'
a929afa6 203 bin_class = 2
eb7082c9 204
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205 self.putp([cmd, d])
206 self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d),
207 '%s: %02X' % (proto[cmd][2], d), '%02X' % d]])
a929afa6 208 self.putb((bin_class, bytes([d])))
7b86f0bc 209
1b75abfd 210 # Done with this packet.
7b86f0bc 211 self.startsample = -1
1b75abfd 212 self.bitcount = self.databyte = 0
2b716038 213 self.state = 'FIND ACK'
7b86f0bc 214
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215 def get_ack(self, scl, sda):
216 self.startsample = self.samplenum
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217 cmd = 'NACK' if (sda == 1) else 'ACK'
218 self.putp([cmd, None])
219 self.putx([proto[cmd][0], proto[cmd][1:]])
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220 # There could be multiple data bytes in a row, so either find
221 # another data byte or a STOP condition next.
2b716038 222 self.state = 'FIND DATA'
7b86f0bc 223
e5080882 224 def found_stop(self, scl, sda):
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225 # Meta bitrate
226 elapsed = 1 / float(self.samplerate) * (self.samplenum - self.pdu_start + 1)
227 bitrate = int(1 / elapsed * self.pdu_bits)
228 self.put(self.startsample, self.samplenum, self.out_bitrate, bitrate)
229
c4975078 230 self.startsample = self.samplenum
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231 cmd = 'STOP'
232 self.putp([cmd, None])
233 self.putx([proto[cmd][0], proto[cmd][1:]])
2b716038 234 self.state = 'FIND START'
5dd9af5b 235 self.is_repeat_start = 0
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236 self.wr = -1
237
2b9837d9 238 def decode(self, ss, es, data):
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239 if self.samplerate is None:
240 raise Exception("Cannot decode without samplerate.")
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241 for (self.samplenum, pins) in data:
242
243 # Ignore identical samples early on (for performance reasons).
244 if self.oldpins == pins:
245 continue
246 self.oldpins, (scl, sda) = pins, pins
f39d2404 247
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248 self.pdu_bits += 1
249
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250 # TODO: Wait until the bus is idle (SDA = SCL = 1) first?
251
7b86f0bc 252 # State machine.
2b716038 253 if self.state == 'FIND START':
7b86f0bc 254 if self.is_start_condition(scl, sda):
e5080882 255 self.found_start(scl, sda)
2b716038 256 elif self.state == 'FIND ADDRESS':
7b86f0bc 257 if self.is_data_bit(scl, sda):
e5080882 258 self.found_address_or_data(scl, sda)
2b716038 259 elif self.state == 'FIND DATA':
7b86f0bc 260 if self.is_data_bit(scl, sda):
e5080882 261 self.found_address_or_data(scl, sda)
7b86f0bc 262 elif self.is_start_condition(scl, sda):
e5080882 263 self.found_start(scl, sda)
7b86f0bc 264 elif self.is_stop_condition(scl, sda):
e5080882 265 self.found_stop(scl, sda)
2b716038 266 elif self.state == 'FIND ACK':
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267 if self.is_data_bit(scl, sda):
268 self.get_ack(scl, sda)
7b86f0bc 269 else:
0eeeb544 270 raise Exception('Invalid state: %s' % self.state)
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271
272 # Save current SDA/SCL values for the next round.
273 self.oldscl = scl
274 self.oldsda = sda
275