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== <span style="font-variant:small-caps">Supported hardware</span> == | == <span style="font-variant:small-caps">Supported hardware</span> == | ||
<gallery widths=" | <gallery widths="135px" heights="70px" perrow="5"> | ||
File:Saleae Logic.jpg|<small> | File:Saleae Logic.jpg|<small>[[File:Nuvola OK.png|14px]] [[Saleae Logic]]</small> | ||
File:Eeelec xla esla100.jpg|<small> | File:Eeelec xla esla100.jpg|<small>[[File:Nuvola OK.png|14px]] [[EE Electronics XLA ESLA100|EE Eleec. XLA/ESLA100]]</small> | ||
File:ASIX SIGMA.jpg|<small> | File:ASIX SIGMA.jpg|<small>[[File:Nuvola OK.png|14px]] [[ASIX SIGMA]]</small> | ||
File:Openbench logic sniffer front.jpg|<small> | File:Openbench logic sniffer front.jpg|<small>[[File:Nuvola OK.png|12px]] [[Openbench Logic Sniffer]]</small> | ||
File:Zeroplus Logic Cube.jpg|<small> | File:Zeroplus Logic Cube.jpg|<small>[[File:Nuvola OK.png|12px]] [[ZEROPLUS Logic Cube LAP-C|Zeroplus Logic Cube LAP-C]]</small> | ||
File:Cwav usbee sx.jpg|<small> | File:Cwav usbee sx.jpg|<small>[[File:Nuvola Orange.png|14px]] [[CWAV USBee SX]]</small> | ||
File:Braintechnology usb lps.jpg|<small> | File:Braintechnology usb lps.jpg|<small>[[File:Nuvola Orange.png|14px]] [[Braintechnology USB-LPS]]</small> | ||
File: | File:Intronix Logicport.jpg|<small>[[File:Nuvola Orange.png|14px]] [[Intronix Logicport]]</small> | ||
File: | File:MSO-19.JPG|<small>[[File:Nuvola Orange.png|14px]] [[Link Instruments MSO-19]]</small> | ||
File:MSO-19.JPG|<small> | File:Buspirate v3 front.jpg|<small>[[File:Nuvola Red.png|14px]] [[Buspirate]]</small> | ||
File:Picoscope 2203 front.jpg|<small> | File:Picoscope 2203 front.jpg|<small>[[File:Nuvola Red.png|14px]] [[Pico Technology PicoScope 2203|Pico Tech PicoScope 2203]]</small> | ||
File:Sigrok gnuplot output.png|<small> | File:Sigrok gnuplot output.png|<small>[[File:Nuvola Red.png|14px]] [[ChronoVu LA8]]</small> | ||
File:Sigrok gnuplot output.png|<small> | File:Sigrok gnuplot output.png|<small>[[File:Nuvola Red.png|12px]] [[Ikalogic SCANALOGIC-2 PRO]]</small> | ||
File:Ant18e closed.jpg|<small> | File:Ant18e closed.jpg|<small>[[File:Nuvola Red.png|14px]] [[RockyLogic Ant18e]]</small> | ||
</gallery> | </gallery> | ||
Revision as of 00:16, 21 January 2011
The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL. Design goals
Supported hardware
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IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!