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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL. Design goals Broad hardware support. Supports a wide variety of logic analyzers from various vendors with different capabilities. Cross-platform. Works on Linux, Mac OS X and Windows, and on many architectures including x86, ARM, Sparc and PowerPC. Scriptable protocol decoding. Extendable with protocol decoders and analyzers written in Python. Format support. Supports various input and output formats (raw, ASCII, hex, CSV, gnuplot, VCD, others). Supported hardware Saleae Logic (supported) EE Electronics XLA/ESLA100 (supported) ASIX SIGMA (supported) Openbench Logic Sniffer (supported) ZEROPLUS Logic Cube LAP-C (work in progress) CWAV USBee SX (coming up) Braintechnology USB-LPS (planned) Buspirate v3 front.jpg Buspirate (planned) Intronix Logicport (planned) MSO-19.JPG Link Instruments MSO-19 (planned) Pico Tech PicoScope 2203 (planned) ChronoVu LA8 (planned) Ikalogic SCANALOGIC-2 PRO (planned) RockyLogic Ant18e (planned) Documentation Downloads Building: Linux, Mac OS X, Windows Status FAQ Supported hardware Command-line Cross-platform GUI Input output formats Protocol decoders Logic Analyzer Comparison Development Browse Source Code TODO Design Ideas Protocol Decoder API Formats and structures Hardware plugin API Input API Output API Misc News Current events Press Logo Getting in touch Mailing lists: sigrok-devel (archive), sigrok-commits (archive) IRC: #sigrok on Freenode identi.ca: sigrok group Sites: SF, Fm, ohloh, del.icio.us

Small logic analyzer collection News 2011/01/20: sigrok 0.1 released 2010/12/27: sigrok @ 27C3 2010/05/01: ASIX SIGMA support 2010/04/06: VCD and Gnuplot output 2010/04/01: ZEROPLUS Logic Cube LAP-C support 2010/03/30: libsigrokdecode started 2010/03/19: GUI: i18n support 2010/03/17: Session save support 2010/03/16: GUI started 2010/03/14: Official project start

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