spiflash: Updates due to recent PD chages.

[sigrok-test.git] / decoder / test / spiflash / winbond_w25q80dv_ce_without_wren.output

diff --git a/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output b/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output
index 50f9f8508540a7c1187b57964adb9dcedd9a5b7d..41864143ad70021d1363eb862e7fc1e67c197e32 100644 (file)
--- a/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output
+++ b/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output
@@ -7,3 +7,4 @@ Status register writes are allowed.
 "
 28-45 spiflash: field: "Status register"
 8-45 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
 "
 28-45 spiflash: field: "Status register"
 8-45 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"

+66-84 spiflash: ce: "Command: Chip erase (CE)" "Command: Chip erase" "Cmd: Chip erase" "Cmd: CE" "CE"