1 148-175 uart: ['STARTBIT', 1, 0]
2 174-357 uart: ['DATA', 1, (124, [[0, 174, 200], [0, 200, 226], [1, 226, 252], [1, 252, 278], [1, 278, 304], [1, 304, 330], [1, 330, 356]])]
3 356-383 uart: ['STOPBIT', 1, 1]
4 148-383 uart: ['FRAME', 1, (124, True)]
5 383-618 uart: ['IDLE', 1, 0]
6 637-664 uart: ['STARTBIT', 1, 0]
7 663-846 uart: ['DATA', 1, (125, [[1, 663, 689], [0, 689, 715], [1, 715, 741], [1, 741, 767], [1, 767, 793], [1, 793, 819], [1, 819, 845]])]
8 845-872 uart: ['STOPBIT', 1, 1]
9 637-872 uart: ['FRAME', 1, (125, True)]
10 872-1107 uart: ['IDLE', 1, 0]
11 1128-1155 uart: ['STARTBIT', 1, 0]
12 1154-1337 uart: ['DATA', 1, (126, [[0, 1154, 1180], [1, 1180, 1206], [1, 1206, 1232], [1, 1232, 1258], [1, 1258, 1284], [1, 1284, 1310], [1, 1310, 1336]])]
13 1336-1363 uart: ['STOPBIT', 1, 1]
14 1128-1363 uart: ['FRAME', 1, (126, True)]
15 1363-1598 uart: ['IDLE', 1, 0]
16 1616-1643 uart: ['STARTBIT', 1, 0]
17 1642-1825 uart: ['DATA', 1, (127, [[1, 1642, 1668], [1, 1668, 1694], [1, 1694, 1720], [1, 1720, 1746], [1, 1746, 1772], [1, 1772, 1798], [1, 1798, 1824]])]
18 1824-1851 uart: ['STOPBIT', 1, 1]
19 1616-1851 uart: ['FRAME', 1, (127, True)]
20 1851-2086 uart: ['IDLE', 1, 0]
21 2105-2132 uart: ['STARTBIT', 1, 0]
22 2131-2314 uart: ['DATA', 1, (0, [[0, 2131, 2157], [0, 2157, 2183], [0, 2183, 2209], [0, 2209, 2235], [0, 2235, 2261], [0, 2261, 2287], [0, 2287, 2313]])]
23 2313-2340 uart: ['STOPBIT', 1, 1]
24 2105-2340 uart: ['FRAME', 1, (0, True)]
25 2340-2575 uart: ['IDLE', 1, 0]
26 2593-2620 uart: ['STARTBIT', 1, 0]
27 2619-2802 uart: ['DATA', 1, (1, [[1, 2619, 2645], [0, 2645, 2671], [0, 2671, 2697], [0, 2697, 2723], [0, 2723, 2749], [0, 2749, 2775], [0, 2775, 2801]])]
28 2801-2828 uart: ['STOPBIT', 1, 1]
29 2593-2828 uart: ['FRAME', 1, (1, True)]
30 2828-3063 uart: ['IDLE', 1, 0]
31 3084-3111 uart: ['STARTBIT', 1, 0]
32 3110-3293 uart: ['DATA', 1, (2, [[0, 3110, 3136], [1, 3136, 3162], [0, 3162, 3188], [0, 3188, 3214], [0, 3214, 3240], [0, 3240, 3266], [0, 3266, 3292]])]
33 3292-3319 uart: ['STOPBIT', 1, 1]
34 3084-3319 uart: ['FRAME', 1, (2, True)]
35 3319-3554 uart: ['IDLE', 1, 0]
36 3575-3602 uart: ['STARTBIT', 1, 0]
37 3601-3784 uart: ['DATA', 1, (3, [[1, 3601, 3627], [1, 3627, 3653], [0, 3653, 3679], [0, 3679, 3705], [0, 3705, 3731], [0, 3731, 3757], [0, 3757, 3783]])]
38 3783-3810 uart: ['STOPBIT', 1, 1]
39 3575-3810 uart: ['FRAME', 1, (3, True)]
40 3810-4045 uart: ['IDLE', 1, 0]
41 4065-4092 uart: ['STARTBIT', 1, 0]
42 4091-4274 uart: ['DATA', 1, (4, [[0, 4091, 4117], [0, 4117, 4143], [1, 4143, 4169], [0, 4169, 4195], [0, 4195, 4221], [0, 4221, 4247], [0, 4247, 4273]])]
43 4273-4300 uart: ['STOPBIT', 1, 1]
44 4065-4300 uart: ['FRAME', 1, (4, True)]
45 4300-4535 uart: ['IDLE', 1, 0]
46 4556-4583 uart: ['STARTBIT', 1, 0]
47 4582-4765 uart: ['DATA', 1, (5, [[1, 4582, 4608], [0, 4608, 4634], [1, 4634, 4660], [0, 4660, 4686], [0, 4686, 4712], [0, 4712, 4738], [0, 4738, 4764]])]
48 4764-4791 uart: ['STOPBIT', 1, 1]
49 4556-4791 uart: ['FRAME', 1, (5, True)]
50 4791-5026 uart: ['IDLE', 1, 0]
51 5048-5075 uart: ['STARTBIT', 1, 0]
52 5074-5257 uart: ['DATA', 1, (6, [[0, 5074, 5100], [1, 5100, 5126], [1, 5126, 5152], [0, 5152, 5178], [0, 5178, 5204], [0, 5204, 5230], [0, 5230, 5256]])]
53 5256-5283 uart: ['STOPBIT', 1, 1]
54 5048-5283 uart: ['FRAME', 1, (6, True)]
55 5283-5518 uart: ['IDLE', 1, 0]
56 5539-5566 uart: ['STARTBIT', 1, 0]
57 5565-5748 uart: ['DATA', 1, (7, [[1, 5565, 5591], [1, 5591, 5617], [1, 5617, 5643], [0, 5643, 5669], [0, 5669, 5695], [0, 5695, 5721], [0, 5721, 5747]])]
58 5747-5774 uart: ['STOPBIT', 1, 1]
59 5539-5774 uart: ['FRAME', 1, (7, True)]
60 5774-6009 uart: ['IDLE', 1, 0]
61 6030-6057 uart: ['STARTBIT', 1, 0]
62 6056-6239 uart: ['DATA', 1, (8, [[0, 6056, 6082], [0, 6082, 6108], [0, 6108, 6134], [1, 6134, 6160], [0, 6160, 6186], [0, 6186, 6212], [0, 6212, 6238]])]
63 6238-6265 uart: ['STOPBIT', 1, 1]
64 6030-6265 uart: ['FRAME', 1, (8, True)]
65 6265-6500 uart: ['IDLE', 1, 0]
66 6520-6547 uart: ['STARTBIT', 1, 0]
67 6546-6729 uart: ['DATA', 1, (9, [[1, 6546, 6572], [0, 6572, 6598], [0, 6598, 6624], [1, 6624, 6650], [0, 6650, 6676], [0, 6676, 6702], [0, 6702, 6728]])]
68 6728-6755 uart: ['STOPBIT', 1, 1]
69 6520-6755 uart: ['FRAME', 1, (9, True)]
70 6755-6990 uart: ['IDLE', 1, 0]
71 7013-7040 uart: ['STARTBIT', 1, 0]
72 7039-7222 uart: ['DATA', 1, (10, [[0, 7039, 7065], [1, 7065, 7091], [0, 7091, 7117], [1, 7117, 7143], [0, 7143, 7169], [0, 7169, 7195], [0, 7195, 7221]])]
73 7221-7248 uart: ['STOPBIT', 1, 1]
74 7013-7248 uart: ['FRAME', 1, (10, True)]
75 7248-7483 uart: ['IDLE', 1, 0]
76 7505-7532 uart: ['STARTBIT', 1, 0]
77 7531-7714 uart: ['DATA', 1, (11, [[1, 7531, 7557], [1, 7557, 7583], [0, 7583, 7609], [1, 7609, 7635], [0, 7635, 7661], [0, 7661, 7687], [0, 7687, 7713]])]
78 7713-7740 uart: ['STOPBIT', 1, 1]
79 7505-7740 uart: ['FRAME', 1, (11, True)]
80 7740-7975 uart: ['IDLE', 1, 0]
81 7998-8025 uart: ['STARTBIT', 1, 0]
82 8024-8207 uart: ['DATA', 1, (12, [[0, 8024, 8050], [0, 8050, 8076], [1, 8076, 8102], [1, 8102, 8128], [0, 8128, 8154], [0, 8154, 8180], [0, 8180, 8206]])]
83 8206-8233 uart: ['STOPBIT', 1, 1]
84 7998-8233 uart: ['FRAME', 1, (12, True)]
85 8233-8468 uart: ['IDLE', 1, 0]
86 8489-8516 uart: ['STARTBIT', 1, 0]
87 8515-8698 uart: ['DATA', 1, (13, [[1, 8515, 8541], [0, 8541, 8567], [1, 8567, 8593], [1, 8593, 8619], [0, 8619, 8645], [0, 8645, 8671], [0, 8671, 8697]])]
88 8697-8724 uart: ['STOPBIT', 1, 1]
89 8489-8724 uart: ['FRAME', 1, (13, True)]
90 8724-8959 uart: ['IDLE', 1, 0]
91 8981-9008 uart: ['STARTBIT', 1, 0]
92 9007-9190 uart: ['DATA', 1, (14, [[0, 9007, 9033], [1, 9033, 9059], [1, 9059, 9085], [1, 9085, 9111], [0, 9111, 9137], [0, 9137, 9163], [0, 9163, 9189]])]
93 9189-9216 uart: ['STOPBIT', 1, 1]
94 8981-9216 uart: ['FRAME', 1, (14, True)]
95 9216-9451 uart: ['IDLE', 1, 0]
96 9472-9499 uart: ['STARTBIT', 1, 0]
97 9498-9681 uart: ['DATA', 1, (15, [[1, 9498, 9524], [1, 9524, 9550], [1, 9550, 9576], [1, 9576, 9602], [0, 9602, 9628], [0, 9628, 9654], [0, 9654, 9680]])]
98 9680-9707 uart: ['STOPBIT', 1, 1]
99 9472-9707 uart: ['FRAME', 1, (15, True)]
100 9707-9942 uart: ['IDLE', 1, 0]
101 9962-9989 uart: ['STARTBIT', 1, 0]
102 9988-10171 uart: ['DATA', 1, (16, [[0, 9988, 10014], [0, 10014, 10040], [0, 10040, 10066], [0, 10066, 10092], [1, 10092, 10118], [0, 10118, 10144], [0, 10144, 10170]])]
103 10170-10197 uart: ['STOPBIT', 1, 1]
104 9962-10197 uart: ['FRAME', 1, (16, True)]
105 10197-10432 uart: ['IDLE', 1, 0]
106 10453-10480 uart: ['STARTBIT', 1, 0]
107 10479-10662 uart: ['DATA', 1, (17, [[1, 10479, 10505], [0, 10505, 10531], [0, 10531, 10557], [0, 10557, 10583], [1, 10583, 10609], [0, 10609, 10635], [0, 10635, 10661]])]
108 10661-10688 uart: ['STOPBIT', 1, 1]
109 10453-10688 uart: ['FRAME', 1, (17, True)]
110 10688-10923 uart: ['IDLE', 1, 0]
111 10945-10972 uart: ['STARTBIT', 1, 0]
112 10971-11154 uart: ['DATA', 1, (18, [[0, 10971, 10997], [1, 10997, 11023], [0, 11023, 11049], [0, 11049, 11075], [1, 11075, 11101], [0, 11101, 11127], [0, 11127, 11153]])]
113 11153-11180 uart: ['STOPBIT', 1, 1]
114 10945-11180 uart: ['FRAME', 1, (18, True)]
115 11180-11415 uart: ['IDLE', 1, 0]
116 11438-11465 uart: ['STARTBIT', 1, 0]
117 11464-11647 uart: ['DATA', 1, (19, [[1, 11464, 11490], [1, 11490, 11516], [0, 11516, 11542], [0, 11542, 11568], [1, 11568, 11594], [0, 11594, 11620], [0, 11620, 11646]])]
118 11646-11673 uart: ['STOPBIT', 1, 1]
119 11438-11673 uart: ['FRAME', 1, (19, True)]
120 11673-11908 uart: ['IDLE', 1, 0]
121 11931-11958 uart: ['STARTBIT', 1, 0]
122 11957-12140 uart: ['DATA', 1, (20, [[0, 11957, 11983], [0, 11983, 12009], [1, 12009, 12035], [0, 12035, 12061], [1, 12061, 12087], [0, 12087, 12113], [0, 12113, 12139]])]
123 12139-12166 uart: ['STOPBIT', 1, 1]
124 11931-12166 uart: ['FRAME', 1, (20, True)]
125 12166-12401 uart: ['IDLE', 1, 0]
126 12423-12450 uart: ['STARTBIT', 1, 0]
127 12449-12632 uart: ['DATA', 1, (21, [[1, 12449, 12475], [0, 12475, 12501], [1, 12501, 12527], [0, 12527, 12553], [1, 12553, 12579], [0, 12579, 12605], [0, 12605, 12631]])]
128 12631-12658 uart: ['STOPBIT', 1, 1]
129 12423-12658 uart: ['FRAME', 1, (21, True)]
130 12658-12893 uart: ['IDLE', 1, 0]
131 12918-12945 uart: ['STARTBIT', 1, 0]
132 12944-13127 uart: ['DATA', 1, (22, [[0, 12944, 12970], [1, 12970, 12996], [1, 12996, 13022], [0, 13022, 13048], [1, 13048, 13074], [0, 13074, 13100], [0, 13100, 13126]])]
133 13126-13153 uart: ['STOPBIT', 1, 1]
134 12918-13153 uart: ['FRAME', 1, (22, True)]
135 13153-13388 uart: ['IDLE', 1, 0]
136 13410-13437 uart: ['STARTBIT', 1, 0]
137 13436-13619 uart: ['DATA', 1, (23, [[1, 13436, 13462], [1, 13462, 13488], [1, 13488, 13514], [0, 13514, 13540], [1, 13540, 13566], [0, 13566, 13592], [0, 13592, 13618]])]
138 13618-13645 uart: ['STOPBIT', 1, 1]
139 13410-13645 uart: ['FRAME', 1, (23, True)]
140 13645-13880 uart: ['IDLE', 1, 0]
141 13903-13930 uart: ['STARTBIT', 1, 0]
142 13929-14112 uart: ['DATA', 1, (24, [[0, 13929, 13955], [0, 13955, 13981], [0, 13981, 14007], [1, 14007, 14033], [1, 14033, 14059], [0, 14059, 14085], [0, 14085, 14111]])]
143 14111-14138 uart: ['STOPBIT', 1, 1]
144 13903-14138 uart: ['FRAME', 1, (24, True)]
145 14138-14373 uart: ['IDLE', 1, 0]
146 14394-14421 uart: ['STARTBIT', 1, 0]
147 14420-14603 uart: ['DATA', 1, (25, [[1, 14420, 14446], [0, 14446, 14472], [0, 14472, 14498], [1, 14498, 14524], [1, 14524, 14550], [0, 14550, 14576], [0, 14576, 14602]])]
148 14602-14629 uart: ['STOPBIT', 1, 1]
149 14394-14629 uart: ['FRAME', 1, (25, True)]
150 14629-14864 uart: ['IDLE', 1, 0]
151 14886-14913 uart: ['STARTBIT', 1, 0]
152 14912-15095 uart: ['DATA', 1, (26, [[0, 14912, 14938], [1, 14938, 14964], [0, 14964, 14990], [1, 14990, 15016], [1, 15016, 15042], [0, 15042, 15068], [0, 15068, 15094]])]
153 15094-15121 uart: ['STOPBIT', 1, 1]
154 14886-15121 uart: ['FRAME', 1, (26, True)]
155 15121-15356 uart: ['IDLE', 1, 0]
156 15379-15406 uart: ['STARTBIT', 1, 0]
157 15405-15588 uart: ['DATA', 1, (27, [[1, 15405, 15431], [1, 15431, 15457], [0, 15457, 15483], [1, 15483, 15509], [1, 15509, 15535], [0, 15535, 15561], [0, 15561, 15587]])]
158 15587-15614 uart: ['STOPBIT', 1, 1]
159 15379-15614 uart: ['FRAME', 1, (27, True)]
160 15614-15849 uart: ['IDLE', 1, 0]
161 15871-15898 uart: ['STARTBIT', 1, 0]
162 15897-16080 uart: ['DATA', 1, (28, [[0, 15897, 15923], [0, 15923, 15949], [1, 15949, 15975], [1, 15975, 16001], [1, 16001, 16027], [0, 16027, 16053], [0, 16053, 16079]])]
163 16079-16106 uart: ['STOPBIT', 1, 1]
164 15871-16106 uart: ['FRAME', 1, (28, True)]
165 16106-16341 uart: ['IDLE', 1, 0]
166 16362-16389 uart: ['STARTBIT', 1, 0]
167 16388-16571 uart: ['DATA', 1, (29, [[1, 16388, 16414], [0, 16414, 16440], [1, 16440, 16466], [1, 16466, 16492], [1, 16492, 16518], [0, 16518, 16544], [0, 16544, 16570]])]
168 16570-16597 uart: ['STOPBIT', 1, 1]
169 16362-16597 uart: ['FRAME', 1, (29, True)]
170 16597-16832 uart: ['IDLE', 1, 0]
171 16855-16882 uart: ['STARTBIT', 1, 0]
172 16881-17064 uart: ['DATA', 1, (30, [[0, 16881, 16907], [1, 16907, 16933], [1, 16933, 16959], [1, 16959, 16985], [1, 16985, 17011], [0, 17011, 17037], [0, 17037, 17063]])]
173 17063-17090 uart: ['STOPBIT', 1, 1]
174 16855-17090 uart: ['FRAME', 1, (30, True)]
175 17090-17325 uart: ['IDLE', 1, 0]
176 17345-17372 uart: ['STARTBIT', 1, 0]
177 17371-17554 uart: ['DATA', 1, (31, [[1, 17371, 17397], [1, 17397, 17423], [1, 17423, 17449], [1, 17449, 17475], [1, 17475, 17501], [0, 17501, 17527], [0, 17527, 17553]])]
178 17553-17580 uart: ['STOPBIT', 1, 1]
179 17345-17580 uart: ['FRAME', 1, (31, True)]
180 17580-17815 uart: ['IDLE', 1, 0]
181 17836-17863 uart: ['STARTBIT', 1, 0]
182 17862-18045 uart: ['DATA', 1, (32, [[0, 17862, 17888], [0, 17888, 17914], [0, 17914, 17940], [0, 17940, 17966], [0, 17966, 17992], [1, 17992, 18018], [0, 18018, 18044]])]
183 18044-18071 uart: ['STOPBIT', 1, 1]
184 17836-18071 uart: ['FRAME', 1, (32, True)]
185 18071-18306 uart: ['IDLE', 1, 0]
186 18326-18353 uart: ['STARTBIT', 1, 0]
187 18352-18535 uart: ['DATA', 1, (33, [[1, 18352, 18378], [0, 18378, 18404], [0, 18404, 18430], [0, 18430, 18456], [0, 18456, 18482], [1, 18482, 18508], [0, 18508, 18534]])]
188 18534-18561 uart: ['STOPBIT', 1, 1]
189 18326-18561 uart: ['FRAME', 1, (33, True)]
190 18561-18796 uart: ['IDLE', 1, 0]
191 18819-18846 uart: ['STARTBIT', 1, 0]
192 18845-19028 uart: ['DATA', 1, (34, [[0, 18845, 18871], [1, 18871, 18897], [0, 18897, 18923], [0, 18923, 18949], [0, 18949, 18975], [1, 18975, 19001], [0, 19001, 19027]])]
193 19027-19054 uart: ['STOPBIT', 1, 1]
194 18819-19054 uart: ['FRAME', 1, (34, True)]
195 19054-19289 uart: ['IDLE', 1, 0]
196 19312-19339 uart: ['STARTBIT', 1, 0]
197 19338-19521 uart: ['DATA', 1, (35, [[1, 19338, 19364], [1, 19364, 19390], [0, 19390, 19416], [0, 19416, 19442], [0, 19442, 19468], [1, 19468, 19494], [0, 19494, 19520]])]
198 19520-19547 uart: ['STOPBIT', 1, 1]
199 19312-19547 uart: ['FRAME', 1, (35, True)]
200 19547-19782 uart: ['IDLE', 1, 0]
201 19804-19831 uart: ['STARTBIT', 1, 0]
202 19830-20013 uart: ['DATA', 1, (36, [[0, 19830, 19856], [0, 19856, 19882], [1, 19882, 19908], [0, 19908, 19934], [0, 19934, 19960], [1, 19960, 19986], [0, 19986, 20012]])]
203 20012-20039 uart: ['STOPBIT', 1, 1]
204 19804-20039 uart: ['FRAME', 1, (36, True)]
205 20039-20274 uart: ['IDLE', 1, 0]
206 20297-20324 uart: ['STARTBIT', 1, 0]
207 20323-20506 uart: ['DATA', 1, (37, [[1, 20323, 20349], [0, 20349, 20375], [1, 20375, 20401], [0, 20401, 20427], [0, 20427, 20453], [1, 20453, 20479], [0, 20479, 20505]])]
208 20505-20532 uart: ['STOPBIT', 1, 1]
209 20297-20532 uart: ['FRAME', 1, (37, True)]
210 20532-20767 uart: ['IDLE', 1, 0]
211 20791-20818 uart: ['STARTBIT', 1, 0]
212 20817-21000 uart: ['DATA', 1, (38, [[0, 20817, 20843], [1, 20843, 20869], [1, 20869, 20895], [0, 20895, 20921], [0, 20921, 20947], [1, 20947, 20973], [0, 20973, 20999]])]
213 20999-21026 uart: ['STOPBIT', 1, 1]
214 20791-21026 uart: ['FRAME', 1, (38, True)]
215 21026-21261 uart: ['IDLE', 1, 0]
216 21284-21311 uart: ['STARTBIT', 1, 0]
217 21310-21493 uart: ['DATA', 1, (39, [[1, 21310, 21336], [1, 21336, 21362], [1, 21362, 21388], [0, 21388, 21414], [0, 21414, 21440], [1, 21440, 21466], [0, 21466, 21492]])]
218 21492-21519 uart: ['STOPBIT', 1, 1]
219 21284-21519 uart: ['FRAME', 1, (39, True)]
220 21519-21754 uart: ['IDLE', 1, 0]
221 21777-21804 uart: ['STARTBIT', 1, 0]
222 21803-21986 uart: ['DATA', 1, (40, [[0, 21803, 21829], [0, 21829, 21855], [0, 21855, 21881], [1, 21881, 21907], [0, 21907, 21933], [1, 21933, 21959], [0, 21959, 21985]])]
223 21985-22012 uart: ['STOPBIT', 1, 1]
224 21777-22012 uart: ['FRAME', 1, (40, True)]
225 22012-22247 uart: ['IDLE', 1, 0]
226 22269-22296 uart: ['STARTBIT', 1, 0]
227 22295-22478 uart: ['DATA', 1, (41, [[1, 22295, 22321], [0, 22321, 22347], [0, 22347, 22373], [1, 22373, 22399], [0, 22399, 22425], [1, 22425, 22451], [0, 22451, 22477]])]
228 22477-22504 uart: ['STOPBIT', 1, 1]
229 22269-22504 uart: ['FRAME', 1, (41, True)]
230 22504-22739 uart: ['IDLE', 1, 0]
231 22764-22791 uart: ['STARTBIT', 1, 0]
232 22790-22973 uart: ['DATA', 1, (42, [[0, 22790, 22816], [1, 22816, 22842], [0, 22842, 22868], [1, 22868, 22894], [0, 22894, 22920], [1, 22920, 22946], [0, 22946, 22972]])]
233 22972-22999 uart: ['STOPBIT', 1, 1]
234 22764-22999 uart: ['FRAME', 1, (42, True)]
235 22999-23234 uart: ['IDLE', 1, 0]
236 23258-23285 uart: ['STARTBIT', 1, 0]
237 23284-23467 uart: ['DATA', 1, (43, [[1, 23284, 23310], [1, 23310, 23336], [0, 23336, 23362], [1, 23362, 23388], [0, 23388, 23414], [1, 23414, 23440], [0, 23440, 23466]])]
238 23466-23493 uart: ['STOPBIT', 1, 1]
239 23258-23493 uart: ['FRAME', 1, (43, True)]
240 23493-23728 uart: ['IDLE', 1, 0]
241 23753-23780 uart: ['STARTBIT', 1, 0]
242 23779-23962 uart: ['DATA', 1, (44, [[0, 23779, 23805], [0, 23805, 23831], [1, 23831, 23857], [1, 23857, 23883], [0, 23883, 23909], [1, 23909, 23935], [0, 23935, 23961]])]
243 23961-23988 uart: ['STOPBIT', 1, 1]
244 23753-23988 uart: ['FRAME', 1, (44, True)]
245 23988-24223 uart: ['IDLE', 1, 0]
246 24246-24273 uart: ['STARTBIT', 1, 0]
247 24272-24455 uart: ['DATA', 1, (45, [[1, 24272, 24298], [0, 24298, 24324], [1, 24324, 24350], [1, 24350, 24376], [0, 24376, 24402], [1, 24402, 24428], [0, 24428, 24454]])]
248 24454-24481 uart: ['STOPBIT', 1, 1]
249 24246-24481 uart: ['FRAME', 1, (45, True)]
250 24481-24716 uart: ['IDLE', 1, 0]
251 24740-24767 uart: ['STARTBIT', 1, 0]
252 24766-24949 uart: ['DATA', 1, (46, [[0, 24766, 24792], [1, 24792, 24818], [1, 24818, 24844], [1, 24844, 24870], [0, 24870, 24896], [1, 24896, 24922], [0, 24922, 24948]])]
253 24948-24975 uart: ['STOPBIT', 1, 1]
254 24740-24975 uart: ['FRAME', 1, (46, True)]
255 24975-25210 uart: ['IDLE', 1, 0]
256 25233-25260 uart: ['STARTBIT', 1, 0]
257 25259-25442 uart: ['DATA', 1, (47, [[1, 25259, 25285], [1, 25285, 25311], [1, 25311, 25337], [1, 25337, 25363], [0, 25363, 25389], [1, 25389, 25415], [0, 25415, 25441]])]
258 25441-25468 uart: ['STOPBIT', 1, 1]
259 25233-25468 uart: ['FRAME', 1, (47, True)]
260 25468-25703 uart: ['IDLE', 1, 0]
261 25725-25752 uart: ['STARTBIT', 1, 0]
262 25751-25934 uart: ['DATA', 1, (48, [[0, 25751, 25777], [0, 25777, 25803], [0, 25803, 25829], [0, 25829, 25855], [1, 25855, 25881], [1, 25881, 25907], [0, 25907, 25933]])]
263 25933-25960 uart: ['STOPBIT', 1, 1]
264 25725-25960 uart: ['FRAME', 1, (48, True)]
265 25960-26195 uart: ['IDLE', 1, 0]
266 26216-26243 uart: ['STARTBIT', 1, 0]
267 26242-26425 uart: ['DATA', 1, (49, [[1, 26242, 26268], [0, 26268, 26294], [0, 26294, 26320], [0, 26320, 26346], [1, 26346, 26372], [1, 26372, 26398], [0, 26398, 26424]])]
268 26424-26451 uart: ['STOPBIT', 1, 1]
269 26216-26451 uart: ['FRAME', 1, (49, True)]
270 26451-26686 uart: ['IDLE', 1, 0]
271 26709-26736 uart: ['STARTBIT', 1, 0]
272 26735-26918 uart: ['DATA', 1, (50, [[0, 26735, 26761], [1, 26761, 26787], [0, 26787, 26813], [0, 26813, 26839], [1, 26839, 26865], [1, 26865, 26891], [0, 26891, 26917]])]
273 26917-26944 uart: ['STOPBIT', 1, 1]
274 26709-26944 uart: ['FRAME', 1, (50, True)]
275 26944-27179 uart: ['IDLE', 1, 0]
276 27201-27228 uart: ['STARTBIT', 1, 0]
277 27227-27410 uart: ['DATA', 1, (51, [[1, 27227, 27253], [1, 27253, 27279], [0, 27279, 27305], [0, 27305, 27331], [1, 27331, 27357], [1, 27357, 27383], [0, 27383, 27409]])]
278 27409-27436 uart: ['STOPBIT', 1, 1]
279 27201-27436 uart: ['FRAME', 1, (51, True)]
280 27436-27671 uart: ['IDLE', 1, 0]
281 27694-27721 uart: ['STARTBIT', 1, 0]
282 27720-27903 uart: ['DATA', 1, (52, [[0, 27720, 27746], [0, 27746, 27772], [1, 27772, 27798], [0, 27798, 27824], [1, 27824, 27850], [1, 27850, 27876], [0, 27876, 27902]])]
283 27902-27929 uart: ['STOPBIT', 1, 1]
284 27694-27929 uart: ['FRAME', 1, (52, True)]
285 27929-28164 uart: ['IDLE', 1, 0]
286 28186-28213 uart: ['STARTBIT', 1, 0]
287 28212-28395 uart: ['DATA', 1, (53, [[1, 28212, 28238], [0, 28238, 28264], [1, 28264, 28290], [0, 28290, 28316], [1, 28316, 28342], [1, 28342, 28368], [0, 28368, 28394]])]
288 28394-28421 uart: ['STOPBIT', 1, 1]
289 28186-28421 uart: ['FRAME', 1, (53, True)]
290 28421-28656 uart: ['IDLE', 1, 0]
291 28681-28708 uart: ['STARTBIT', 1, 0]
292 28707-28890 uart: ['DATA', 1, (54, [[0, 28707, 28733], [1, 28733, 28759], [1, 28759, 28785], [0, 28785, 28811], [1, 28811, 28837], [1, 28837, 28863], [0, 28863, 28889]])]
293 28889-28916 uart: ['STOPBIT', 1, 1]
294 28681-28916 uart: ['FRAME', 1, (54, True)]
295 28916-29151 uart: ['IDLE', 1, 0]
296 29174-29201 uart: ['STARTBIT', 1, 0]
297 29200-29383 uart: ['DATA', 1, (55, [[1, 29200, 29226], [1, 29226, 29252], [1, 29252, 29278], [0, 29278, 29304], [1, 29304, 29330], [1, 29330, 29356], [0, 29356, 29382]])]
298 29382-29409 uart: ['STOPBIT', 1, 1]
299 29174-29409 uart: ['FRAME', 1, (55, True)]
300 29409-29644 uart: ['IDLE', 1, 0]
301 29666-29693 uart: ['STARTBIT', 1, 0]
302 29692-29875 uart: ['DATA', 1, (56, [[0, 29692, 29718], [0, 29718, 29744], [0, 29744, 29770], [1, 29770, 29796], [1, 29796, 29822], [1, 29822, 29848], [0, 29848, 29874]])]
303 29874-29901 uart: ['STOPBIT', 1, 1]
304 29666-29901 uart: ['FRAME', 1, (56, True)]
305 29901-30136 uart: ['IDLE', 1, 0]
306 30157-30184 uart: ['STARTBIT', 1, 0]
307 30183-30366 uart: ['DATA', 1, (57, [[1, 30183, 30209], [0, 30209, 30235], [0, 30235, 30261], [1, 30261, 30287], [1, 30287, 30313], [1, 30313, 30339], [0, 30339, 30365]])]
308 30365-30392 uart: ['STOPBIT', 1, 1]
309 30157-30392 uart: ['FRAME', 1, (57, True)]
310 30392-30627 uart: ['IDLE', 1, 0]
311 30649-30676 uart: ['STARTBIT', 1, 0]
312 30675-30858 uart: ['DATA', 1, (58, [[0, 30675, 30701], [1, 30701, 30727], [0, 30727, 30753], [1, 30753, 30779], [1, 30779, 30805], [1, 30805, 30831], [0, 30831, 30857]])]
313 30857-30884 uart: ['STOPBIT', 1, 1]
314 30649-30884 uart: ['FRAME', 1, (58, True)]
315 30884-31119 uart: ['IDLE', 1, 0]
316 31142-31169 uart: ['STARTBIT', 1, 0]
317 31168-31351 uart: ['DATA', 1, (59, [[1, 31168, 31194], [1, 31194, 31220], [0, 31220, 31246], [1, 31246, 31272], [1, 31272, 31298], [1, 31298, 31324], [0, 31324, 31350]])]
318 31350-31377 uart: ['STOPBIT', 1, 1]
319 31142-31377 uart: ['FRAME', 1, (59, True)]
320 31377-31612 uart: ['IDLE', 1, 0]
321 31635-31662 uart: ['STARTBIT', 1, 0]
322 31661-31844 uart: ['DATA', 1, (60, [[0, 31661, 31687], [0, 31687, 31713], [1, 31713, 31739], [1, 31739, 31765], [1, 31765, 31791], [1, 31791, 31817], [0, 31817, 31843]])]
323 31843-31870 uart: ['STOPBIT', 1, 1]
324 31635-31870 uart: ['FRAME', 1, (60, True)]
325 31870-32105 uart: ['IDLE', 1, 0]
326 32125-32152 uart: ['STARTBIT', 1, 0]
327 32151-32334 uart: ['DATA', 1, (61, [[1, 32151, 32177], [0, 32177, 32203], [1, 32203, 32229], [1, 32229, 32255], [1, 32255, 32281], [1, 32281, 32307], [0, 32307, 32333]])]
328 32333-32360 uart: ['STOPBIT', 1, 1]
329 32125-32360 uart: ['FRAME', 1, (61, True)]
330 32360-32595 uart: ['IDLE', 1, 0]
331 32618-32645 uart: ['STARTBIT', 1, 0]
332 32644-32827 uart: ['DATA', 1, (62, [[0, 32644, 32670], [1, 32670, 32696], [1, 32696, 32722], [1, 32722, 32748], [1, 32748, 32774], [1, 32774, 32800], [0, 32800, 32826]])]
333 32826-32853 uart: ['STOPBIT', 1, 1]
334 32618-32853 uart: ['FRAME', 1, (62, True)]
335 32853-33088 uart: ['IDLE', 1, 0]
336 33108-33135 uart: ['STARTBIT', 1, 0]
337 33134-33317 uart: ['DATA', 1, (63, [[1, 33134, 33160], [1, 33160, 33186], [1, 33186, 33212], [1, 33212, 33238], [1, 33238, 33264], [1, 33264, 33290], [0, 33290, 33316]])]
338 33316-33343 uart: ['STOPBIT', 1, 1]
339 33108-33343 uart: ['FRAME', 1, (63, True)]
340 33343-33578 uart: ['IDLE', 1, 0]
341 33599-33626 uart: ['STARTBIT', 1, 0]
342 33625-33808 uart: ['DATA', 1, (64, [[0, 33625, 33651], [0, 33651, 33677], [0, 33677, 33703], [0, 33703, 33729], [0, 33729, 33755], [0, 33755, 33781], [1, 33781, 33807]])]
343 33807-33834 uart: ['STOPBIT', 1, 1]
344 33599-33834 uart: ['FRAME', 1, (64, True)]
345 33834-34069 uart: ['IDLE', 1, 0]
346 34088-34115 uart: ['STARTBIT', 1, 0]
347 34114-34297 uart: ['DATA', 1, (65, [[1, 34114, 34140], [0, 34140, 34166], [0, 34166, 34192], [0, 34192, 34218], [0, 34218, 34244], [0, 34244, 34270], [1, 34270, 34296]])]
348 34296-34323 uart: ['STOPBIT', 1, 1]
349 34088-34323 uart: ['FRAME', 1, (65, True)]
350 34323-34558 uart: ['IDLE', 1, 0]
351 34578-34605 uart: ['STARTBIT', 1, 0]
352 34604-34787 uart: ['DATA', 1, (66, [[0, 34604, 34630], [1, 34630, 34656], [0, 34656, 34682], [0, 34682, 34708], [0, 34708, 34734], [0, 34734, 34760], [1, 34760, 34786]])]
353 34786-34813 uart: ['STOPBIT', 1, 1]
354 34578-34813 uart: ['FRAME', 1, (66, True)]
355 34813-35048 uart: ['IDLE', 1, 0]
356 35069-35096 uart: ['STARTBIT', 1, 0]
357 35095-35278 uart: ['DATA', 1, (67, [[1, 35095, 35121], [1, 35121, 35147], [0, 35147, 35173], [0, 35173, 35199], [0, 35199, 35225], [0, 35225, 35251], [1, 35251, 35277]])]
358 35277-35304 uart: ['STOPBIT', 1, 1]
359 35069-35304 uart: ['FRAME', 1, (67, True)]
360 35304-35539 uart: ['IDLE', 1, 0]
361 35559-35586 uart: ['STARTBIT', 1, 0]
362 35585-35768 uart: ['DATA', 1, (68, [[0, 35585, 35611], [0, 35611, 35637], [1, 35637, 35663], [0, 35663, 35689], [0, 35689, 35715], [0, 35715, 35741], [1, 35741, 35767]])]
363 35767-35794 uart: ['STOPBIT', 1, 1]
364 35559-35794 uart: ['FRAME', 1, (68, True)]
365 35794-36029 uart: ['IDLE', 1, 0]
366 36050-36077 uart: ['STARTBIT', 1, 0]
367 36076-36259 uart: ['DATA', 1, (69, [[1, 36076, 36102], [0, 36102, 36128], [1, 36128, 36154], [0, 36154, 36180], [0, 36180, 36206], [0, 36206, 36232], [1, 36232, 36258]])]
368 36258-36285 uart: ['STOPBIT', 1, 1]
369 36050-36285 uart: ['FRAME', 1, (69, True)]
370 36285-36520 uart: ['IDLE', 1, 0]
371 36543-36570 uart: ['STARTBIT', 1, 0]
372 36569-36752 uart: ['DATA', 1, (70, [[0, 36569, 36595], [1, 36595, 36621], [1, 36621, 36647], [0, 36647, 36673], [0, 36673, 36699], [0, 36699, 36725], [1, 36725, 36751]])]
373 36751-36778 uart: ['STOPBIT', 1, 1]
374 36543-36778 uart: ['FRAME', 1, (70, True)]
375 36778-37013 uart: ['IDLE', 1, 0]
376 37033-37060 uart: ['STARTBIT', 1, 0]
377 37059-37242 uart: ['DATA', 1, (71, [[1, 37059, 37085], [1, 37085, 37111], [1, 37111, 37137], [0, 37137, 37163], [0, 37163, 37189], [0, 37189, 37215], [1, 37215, 37241]])]
378 37241-37268 uart: ['STOPBIT', 1, 1]
379 37033-37268 uart: ['FRAME', 1, (71, True)]
380 37268-37503 uart: ['IDLE', 1, 0]
381 37524-37551 uart: ['STARTBIT', 1, 0]
382 37550-37733 uart: ['DATA', 1, (72, [[0, 37550, 37576], [0, 37576, 37602], [0, 37602, 37628], [1, 37628, 37654], [0, 37654, 37680], [0, 37680, 37706], [1, 37706, 37732]])]
383 37732-37759 uart: ['STOPBIT', 1, 1]
384 37524-37759 uart: ['FRAME', 1, (72, True)]
385 37759-37994 uart: ['IDLE', 1, 0]
386 38014-38041 uart: ['STARTBIT', 1, 0]
387 38040-38223 uart: ['DATA', 1, (73, [[1, 38040, 38066], [0, 38066, 38092], [0, 38092, 38118], [1, 38118, 38144], [0, 38144, 38170], [0, 38170, 38196], [1, 38196, 38222]])]
388 38222-38249 uart: ['STOPBIT', 1, 1]
389 38014-38249 uart: ['FRAME', 1, (73, True)]
390 38249-38484 uart: ['IDLE', 1, 0]
391 38507-38534 uart: ['STARTBIT', 1, 0]
392 38533-38716 uart: ['DATA', 1, (74, [[0, 38533, 38559], [1, 38559, 38585], [0, 38585, 38611], [1, 38611, 38637], [0, 38637, 38663], [0, 38663, 38689], [1, 38689, 38715]])]
393 38715-38742 uart: ['STOPBIT', 1, 1]
394 38507-38742 uart: ['FRAME', 1, (74, True)]
395 38742-38977 uart: ['IDLE', 1, 0]
396 39000-39027 uart: ['STARTBIT', 1, 0]
397 39026-39209 uart: ['DATA', 1, (75, [[1, 39026, 39052], [1, 39052, 39078], [0, 39078, 39104], [1, 39104, 39130], [0, 39130, 39156], [0, 39156, 39182], [1, 39182, 39208]])]
398 39208-39235 uart: ['STOPBIT', 1, 1]
399 39000-39235 uart: ['FRAME', 1, (75, True)]
400 39235-39470 uart: ['IDLE', 1, 0]
401 39492-39519 uart: ['STARTBIT', 1, 0]
402 39518-39701 uart: ['DATA', 1, (76, [[0, 39518, 39544], [0, 39544, 39570], [1, 39570, 39596], [1, 39596, 39622], [0, 39622, 39648], [0, 39648, 39674], [1, 39674, 39700]])]
403 39700-39727 uart: ['STOPBIT', 1, 1]
404 39492-39727 uart: ['FRAME', 1, (76, True)]
405 39727-39962 uart: ['IDLE', 1, 0]
406 39983-40010 uart: ['STARTBIT', 1, 0]
407 40009-40192 uart: ['DATA', 1, (77, [[1, 40009, 40035], [0, 40035, 40061], [1, 40061, 40087], [1, 40087, 40113], [0, 40113, 40139], [0, 40139, 40165], [1, 40165, 40191]])]
408 40191-40218 uart: ['STOPBIT', 1, 1]
409 39983-40218 uart: ['FRAME', 1, (77, True)]
410 40218-40453 uart: ['IDLE', 1, 0]
411 40475-40502 uart: ['STARTBIT', 1, 0]
412 40501-40684 uart: ['DATA', 1, (78, [[0, 40501, 40527], [1, 40527, 40553], [1, 40553, 40579], [1, 40579, 40605], [0, 40605, 40631], [0, 40631, 40657], [1, 40657, 40683]])]
413 40683-40710 uart: ['STOPBIT', 1, 1]
414 40475-40710 uart: ['FRAME', 1, (78, True)]
415 40710-40945 uart: ['IDLE', 1, 0]
416 40966-40993 uart: ['STARTBIT', 1, 0]
417 40992-41175 uart: ['DATA', 1, (79, [[1, 40992, 41018], [1, 41018, 41044], [1, 41044, 41070], [1, 41070, 41096], [0, 41096, 41122], [0, 41122, 41148], [1, 41148, 41174]])]
418 41174-41201 uart: ['STOPBIT', 1, 1]
419 40966-41201 uart: ['FRAME', 1, (79, True)]
420 41201-41436 uart: ['IDLE', 1, 0]
421 41457-41484 uart: ['STARTBIT', 1, 0]
422 41483-41666 uart: ['DATA', 1, (80, [[0, 41483, 41509], [0, 41509, 41535], [0, 41535, 41561], [0, 41561, 41587], [1, 41587, 41613], [0, 41613, 41639], [1, 41639, 41665]])]
423 41665-41692 uart: ['STOPBIT', 1, 1]
424 41457-41692 uart: ['FRAME', 1, (80, True)]
425 41692-41927 uart: ['IDLE', 1, 0]
426 41947-41974 uart: ['STARTBIT', 1, 0]
427 41973-42156 uart: ['DATA', 1, (81, [[1, 41973, 41999], [0, 41999, 42025], [0, 42025, 42051], [0, 42051, 42077], [1, 42077, 42103], [0, 42103, 42129], [1, 42129, 42155]])]
428 42155-42182 uart: ['STOPBIT', 1, 1]
429 41947-42182 uart: ['FRAME', 1, (81, True)]
430 42182-42417 uart: ['IDLE', 1, 0]
431 42440-42467 uart: ['STARTBIT', 1, 0]
432 42466-42649 uart: ['DATA', 1, (82, [[0, 42466, 42492], [1, 42492, 42518], [0, 42518, 42544], [0, 42544, 42570], [1, 42570, 42596], [0, 42596, 42622], [1, 42622, 42648]])]
433 42648-42675 uart: ['STOPBIT', 1, 1]
434 42440-42675 uart: ['FRAME', 1, (82, True)]
435 42675-42910 uart: ['IDLE', 1, 0]
436 42932-42959 uart: ['STARTBIT', 1, 0]
437 42958-43141 uart: ['DATA', 1, (83, [[1, 42958, 42984], [1, 42984, 43010], [0, 43010, 43036], [0, 43036, 43062], [1, 43062, 43088], [0, 43088, 43114], [1, 43114, 43140]])]
438 43140-43167 uart: ['STOPBIT', 1, 1]
439 42932-43167 uart: ['FRAME', 1, (83, True)]
440 43167-43402 uart: ['IDLE', 1, 0]
441 43426-43453 uart: ['STARTBIT', 1, 0]
442 43452-43635 uart: ['DATA', 1, (84, [[0, 43452, 43478], [0, 43478, 43504], [1, 43504, 43530], [0, 43530, 43556], [1, 43556, 43582], [0, 43582, 43608], [1, 43608, 43634]])]
443 43634-43661 uart: ['STOPBIT', 1, 1]
444 43426-43661 uart: ['FRAME', 1, (84, True)]
445 43661-43896 uart: ['IDLE', 1, 0]
446 43919-43946 uart: ['STARTBIT', 1, 0]
447 43945-44128 uart: ['DATA', 1, (85, [[1, 43945, 43971], [0, 43971, 43997], [1, 43997, 44023], [0, 44023, 44049], [1, 44049, 44075], [0, 44075, 44101], [1, 44101, 44127]])]
448 44127-44154 uart: ['STOPBIT', 1, 1]
449 43919-44154 uart: ['FRAME', 1, (85, True)]
450 44154-44389 uart: ['IDLE', 1, 0]
451 44413-44440 uart: ['STARTBIT', 1, 0]
452 44439-44622 uart: ['DATA', 1, (86, [[0, 44439, 44465], [1, 44465, 44491], [1, 44491, 44517], [0, 44517, 44543], [1, 44543, 44569], [0, 44569, 44595], [1, 44595, 44621]])]
453 44621-44648 uart: ['STOPBIT', 1, 1]
454 44413-44648 uart: ['FRAME', 1, (86, True)]
455 44648-44883 uart: ['IDLE', 1, 0]
456 44906-44933 uart: ['STARTBIT', 1, 0]
457 44932-45115 uart: ['DATA', 1, (87, [[1, 44932, 44958], [1, 44958, 44984], [1, 44984, 45010], [0, 45010, 45036], [1, 45036, 45062], [0, 45062, 45088], [1, 45088, 45114]])]
458 45114-45141 uart: ['STOPBIT', 1, 1]
459 44906-45141 uart: ['FRAME', 1, (87, True)]
460 45141-45376 uart: ['IDLE', 1, 0]
461 45398-45425 uart: ['STARTBIT', 1, 0]
462 45424-45607 uart: ['DATA', 1, (88, [[0, 45424, 45450], [0, 45450, 45476], [0, 45476, 45502], [1, 45502, 45528], [1, 45528, 45554], [0, 45554, 45580], [1, 45580, 45606]])]
463 45606-45633 uart: ['STOPBIT', 1, 1]
464 45398-45633 uart: ['FRAME', 1, (88, True)]
465 45633-45868 uart: ['IDLE', 1, 0]
466 45889-45916 uart: ['STARTBIT', 1, 0]
467 45915-46098 uart: ['DATA', 1, (89, [[1, 45915, 45941], [0, 45941, 45967], [0, 45967, 45993], [1, 45993, 46019], [1, 46019, 46045], [0, 46045, 46071], [1, 46071, 46097]])]
468 46097-46124 uart: ['STOPBIT', 1, 1]
469 45889-46124 uart: ['FRAME', 1, (89, True)]
470 46124-46359 uart: ['IDLE', 1, 0]
471 46382-46409 uart: ['STARTBIT', 1, 0]
472 46408-46591 uart: ['DATA', 1, (90, [[0, 46408, 46434], [1, 46434, 46460], [0, 46460, 46486], [1, 46486, 46512], [1, 46512, 46538], [0, 46538, 46564], [1, 46564, 46590]])]
473 46590-46617 uart: ['STOPBIT', 1, 1]
474 46382-46617 uart: ['FRAME', 1, (90, True)]
475 46617-46852 uart: ['IDLE', 1, 0]
476 46874-46901 uart: ['STARTBIT', 1, 0]
477 46900-47083 uart: ['DATA', 1, (91, [[1, 46900, 46926], [1, 46926, 46952], [0, 46952, 46978], [1, 46978, 47004], [1, 47004, 47030], [0, 47030, 47056], [1, 47056, 47082]])]
478 47082-47109 uart: ['STOPBIT', 1, 1]
479 46874-47109 uart: ['FRAME', 1, (91, True)]
480 47109-47344 uart: ['IDLE', 1, 0]
481 47367-47394 uart: ['STARTBIT', 1, 0]
482 47393-47576 uart: ['DATA', 1, (92, [[0, 47393, 47419], [0, 47419, 47445], [1, 47445, 47471], [1, 47471, 47497], [1, 47497, 47523], [0, 47523, 47549], [1, 47549, 47575]])]
483 47575-47602 uart: ['STOPBIT', 1, 1]
484 47367-47602 uart: ['FRAME', 1, (92, True)]
485 47602-47837 uart: ['IDLE', 1, 0]
486 47857-47884 uart: ['STARTBIT', 1, 0]
487 47883-48066 uart: ['DATA', 1, (93, [[1, 47883, 47909], [0, 47909, 47935], [1, 47935, 47961], [1, 47961, 47987], [1, 47987, 48013], [0, 48013, 48039], [1, 48039, 48065]])]
488 48065-48092 uart: ['STOPBIT', 1, 1]
489 47857-48092 uart: ['FRAME', 1, (93, True)]
490 48092-48327 uart: ['IDLE', 1, 0]
491 48350-48377 uart: ['STARTBIT', 1, 0]
492 48376-48559 uart: ['DATA', 1, (94, [[0, 48376, 48402], [1, 48402, 48428], [1, 48428, 48454], [1, 48454, 48480], [1, 48480, 48506], [0, 48506, 48532], [1, 48532, 48558]])]
493 48558-48585 uart: ['STOPBIT', 1, 1]
494 48350-48585 uart: ['FRAME', 1, (94, True)]
495 48585-48820 uart: ['IDLE', 1, 0]
496 48841-48868 uart: ['STARTBIT', 1, 0]
497 48867-49050 uart: ['DATA', 1, (95, [[1, 48867, 48893], [1, 48893, 48919], [1, 48919, 48945], [1, 48945, 48971], [1, 48971, 48997], [0, 48997, 49023], [1, 49023, 49049]])]
498 49049-49076 uart: ['STOPBIT', 1, 1]
499 48841-49076 uart: ['FRAME', 1, (95, True)]
500 49076-49311 uart: ['IDLE', 1, 0]
501 49331-49358 uart: ['STARTBIT', 1, 0]
502 49357-49540 uart: ['DATA', 1, (96, [[0, 49357, 49383], [0, 49383, 49409], [0, 49409, 49435], [0, 49435, 49461], [0, 49461, 49487], [1, 49487, 49513], [1, 49513, 49539]])]
503 49539-49566 uart: ['STOPBIT', 1, 1]
504 49331-49566 uart: ['FRAME', 1, (96, True)]
505 49566-49801 uart: ['IDLE', 1, 0]
506 49820-49847 uart: ['STARTBIT', 1, 0]
507 49846-50029 uart: ['DATA', 1, (97, [[1, 49846, 49872], [0, 49872, 49898], [0, 49898, 49924], [0, 49924, 49950], [0, 49950, 49976], [1, 49976, 50002], [1, 50002, 50028]])]
508 50028-50055 uart: ['STOPBIT', 1, 1]
509 49820-50055 uart: ['FRAME', 1, (97, True)]
510 50055-50290 uart: ['IDLE', 1, 0]
511 50310-50337 uart: ['STARTBIT', 1, 0]
512 50336-50519 uart: ['DATA', 1, (98, [[0, 50336, 50362], [1, 50362, 50388], [0, 50388, 50414], [0, 50414, 50440], [0, 50440, 50466], [1, 50466, 50492], [1, 50492, 50518]])]
513 50518-50545 uart: ['STOPBIT', 1, 1]
514 50310-50545 uart: ['FRAME', 1, (98, True)]
515 50545-50780 uart: ['IDLE', 1, 0]
516 50801-50828 uart: ['STARTBIT', 1, 0]
517 50827-51010 uart: ['DATA', 1, (99, [[1, 50827, 50853], [1, 50853, 50879], [0, 50879, 50905], [0, 50905, 50931], [0, 50931, 50957], [1, 50957, 50983], [1, 50983, 51009]])]
518 51009-51036 uart: ['STOPBIT', 1, 1]
519 50801-51036 uart: ['FRAME', 1, (99, True)]
520 51036-51271 uart: ['IDLE', 1, 0]
521 51292-51319 uart: ['STARTBIT', 1, 0]
522 51318-51501 uart: ['DATA', 1, (100, [[0, 51318, 51344], [0, 51344, 51370], [1, 51370, 51396], [0, 51396, 51422], [0, 51422, 51448], [1, 51448, 51474], [1, 51474, 51500]])]
523 51500-51527 uart: ['STOPBIT', 1, 1]
524 51292-51527 uart: ['FRAME', 1, (100, True)]
525 51527-51762 uart: ['IDLE', 1, 0]
526 51782-51809 uart: ['STARTBIT', 1, 0]
527 51808-51991 uart: ['DATA', 1, (101, [[1, 51808, 51834], [0, 51834, 51860], [1, 51860, 51886], [0, 51886, 51912], [0, 51912, 51938], [1, 51938, 51964], [1, 51964, 51990]])]
528 51990-52017 uart: ['STOPBIT', 1, 1]
529 51782-52017 uart: ['FRAME', 1, (101, True)]
530 52017-52252 uart: ['IDLE', 1, 0]
531 52275-52302 uart: ['STARTBIT', 1, 0]
532 52301-52484 uart: ['DATA', 1, (102, [[0, 52301, 52327], [1, 52327, 52353], [1, 52353, 52379], [0, 52379, 52405], [0, 52405, 52431], [1, 52431, 52457], [1, 52457, 52483]])]
533 52483-52510 uart: ['STOPBIT', 1, 1]
534 52275-52510 uart: ['FRAME', 1, (102, True)]
535 52510-52745 uart: ['IDLE', 1, 0]
536 52765-52792 uart: ['STARTBIT', 1, 0]
537 52791-52974 uart: ['DATA', 1, (103, [[1, 52791, 52817], [1, 52817, 52843], [1, 52843, 52869], [0, 52869, 52895], [0, 52895, 52921], [1, 52921, 52947], [1, 52947, 52973]])]
538 52973-53000 uart: ['STOPBIT', 1, 1]
539 52765-53000 uart: ['FRAME', 1, (103, True)]
540 53000-53235 uart: ['IDLE', 1, 0]
541 53256-53283 uart: ['STARTBIT', 1, 0]
542 53282-53465 uart: ['DATA', 1, (104, [[0, 53282, 53308], [0, 53308, 53334], [0, 53334, 53360], [1, 53360, 53386], [0, 53386, 53412], [1, 53412, 53438], [1, 53438, 53464]])]
543 53464-53491 uart: ['STOPBIT', 1, 1]
544 53256-53491 uart: ['FRAME', 1, (104, True)]
545 53491-53726 uart: ['IDLE', 1, 0]
546 53747-53774 uart: ['STARTBIT', 1, 0]
547 53773-53956 uart: ['DATA', 1, (105, [[1, 53773, 53799], [0, 53799, 53825], [0, 53825, 53851], [1, 53851, 53877], [0, 53877, 53903], [1, 53903, 53929], [1, 53929, 53955]])]
548 53955-53982 uart: ['STOPBIT', 1, 1]
549 53747-53982 uart: ['FRAME', 1, (105, True)]
550 53982-54217 uart: ['IDLE', 1, 0]
551 54239-54266 uart: ['STARTBIT', 1, 0]
552 54265-54448 uart: ['DATA', 1, (106, [[0, 54265, 54291], [1, 54291, 54317], [0, 54317, 54343], [1, 54343, 54369], [0, 54369, 54395], [1, 54395, 54421], [1, 54421, 54447]])]
553 54447-54474 uart: ['STOPBIT', 1, 1]
554 54239-54474 uart: ['FRAME', 1, (106, True)]
555 54474-54709 uart: ['IDLE', 1, 0]
556 54732-54759 uart: ['STARTBIT', 1, 0]
557 54758-54941 uart: ['DATA', 1, (107, [[1, 54758, 54784], [1, 54784, 54810], [0, 54810, 54836], [1, 54836, 54862], [0, 54862, 54888], [1, 54888, 54914], [1, 54914, 54940]])]
558 54940-54967 uart: ['STOPBIT', 1, 1]
559 54732-54967 uart: ['FRAME', 1, (107, True)]
560 54967-55202 uart: ['IDLE', 1, 0]
561 55224-55251 uart: ['STARTBIT', 1, 0]
562 55250-55433 uart: ['DATA', 1, (108, [[0, 55250, 55276], [0, 55276, 55302], [1, 55302, 55328], [1, 55328, 55354], [0, 55354, 55380], [1, 55380, 55406], [1, 55406, 55432]])]
563 55432-55459 uart: ['STOPBIT', 1, 1]
564 55224-55459 uart: ['FRAME', 1, (108, True)]
565 55459-55694 uart: ['IDLE', 1, 0]
566 55715-55742 uart: ['STARTBIT', 1, 0]
567 55741-55924 uart: ['DATA', 1, (109, [[1, 55741, 55767], [0, 55767, 55793], [1, 55793, 55819], [1, 55819, 55845], [0, 55845, 55871], [1, 55871, 55897], [1, 55897, 55923]])]
568 55923-55950 uart: ['STOPBIT', 1, 1]
569 55715-55950 uart: ['FRAME', 1, (109, True)]
570 55950-56185 uart: ['IDLE', 1, 0]
571 56208-56235 uart: ['STARTBIT', 1, 0]
572 56234-56417 uart: ['DATA', 1, (110, [[0, 56234, 56260], [1, 56260, 56286], [1, 56286, 56312], [1, 56312, 56338], [0, 56338, 56364], [1, 56364, 56390], [1, 56390, 56416]])]
573 56416-56443 uart: ['STOPBIT', 1, 1]
574 56208-56443 uart: ['FRAME', 1, (110, True)]
575 56443-56678 uart: ['IDLE', 1, 0]
576 56698-56725 uart: ['STARTBIT', 1, 0]
577 56724-56907 uart: ['DATA', 1, (111, [[1, 56724, 56750], [1, 56750, 56776], [1, 56776, 56802], [1, 56802, 56828], [0, 56828, 56854], [1, 56854, 56880], [1, 56880, 56906]])]
578 56906-56933 uart: ['STOPBIT', 1, 1]
579 56698-56933 uart: ['FRAME', 1, (111, True)]
580 56933-57168 uart: ['IDLE', 1, 0]
581 57189-57216 uart: ['STARTBIT', 1, 0]
582 57215-57398 uart: ['DATA', 1, (112, [[0, 57215, 57241], [0, 57241, 57267], [0, 57267, 57293], [0, 57293, 57319], [1, 57319, 57345], [1, 57345, 57371], [1, 57371, 57397]])]
583 57397-57424 uart: ['STOPBIT', 1, 1]
584 57189-57424 uart: ['FRAME', 1, (112, True)]
585 57424-57659 uart: ['IDLE', 1, 0]
586 57677-57704 uart: ['STARTBIT', 1, 0]
587 57703-57886 uart: ['DATA', 1, (113, [[1, 57703, 57729], [0, 57729, 57755], [0, 57755, 57781], [0, 57781, 57807], [1, 57807, 57833], [1, 57833, 57859], [1, 57859, 57885]])]
588 57885-57912 uart: ['STOPBIT', 1, 1]
589 57677-57912 uart: ['FRAME', 1, (113, True)]
590 57912-58147 uart: ['IDLE', 1, 0]
591 58168-58195 uart: ['STARTBIT', 1, 0]
592 58194-58377 uart: ['DATA', 1, (114, [[0, 58194, 58220], [1, 58220, 58246], [0, 58246, 58272], [0, 58272, 58298], [1, 58298, 58324], [1, 58324, 58350], [1, 58350, 58376]])]
593 58376-58403 uart: ['STOPBIT', 1, 1]
594 58168-58403 uart: ['FRAME', 1, (114, True)]
595 58403-58638 uart: ['IDLE', 1, 0]
596 58659-58686 uart: ['STARTBIT', 1, 0]
597 58685-58868 uart: ['DATA', 1, (115, [[1, 58685, 58711], [1, 58711, 58737], [0, 58737, 58763], [0, 58763, 58789], [1, 58789, 58815], [1, 58815, 58841], [1, 58841, 58867]])]
598 58867-58894 uart: ['STOPBIT', 1, 1]
599 58659-58894 uart: ['FRAME', 1, (115, True)]
600 58894-59129 uart: ['IDLE', 1, 0]
601 59149-59176 uart: ['STARTBIT', 1, 0]
602 59175-59358 uart: ['DATA', 1, (116, [[0, 59175, 59201], [0, 59201, 59227], [1, 59227, 59253], [0, 59253, 59279], [1, 59279, 59305], [1, 59305, 59331], [1, 59331, 59357]])]
603 59357-59384 uart: ['STOPBIT', 1, 1]
604 59149-59384 uart: ['FRAME', 1, (116, True)]
605 59384-59619 uart: ['IDLE', 1, 0]
606 59640-59667 uart: ['STARTBIT', 1, 0]
607 59666-59849 uart: ['DATA', 1, (117, [[1, 59666, 59692], [0, 59692, 59718], [1, 59718, 59744], [0, 59744, 59770], [1, 59770, 59796], [1, 59796, 59822], [1, 59822, 59848]])]
608 59848-59875 uart: ['STOPBIT', 1, 1]
609 59640-59875 uart: ['FRAME', 1, (117, True)]
610 59875-60110 uart: ['IDLE', 1, 0]
611 60132-60159 uart: ['STARTBIT', 1, 0]
612 60158-60341 uart: ['DATA', 1, (118, [[0, 60158, 60184], [1, 60184, 60210], [1, 60210, 60236], [0, 60236, 60262], [1, 60262, 60288], [1, 60288, 60314], [1, 60314, 60340]])]
613 60340-60367 uart: ['STOPBIT', 1, 1]
614 60132-60367 uart: ['FRAME', 1, (118, True)]
615 60367-60602 uart: ['IDLE', 1, 0]
616 60623-60650 uart: ['STARTBIT', 1, 0]
617 60649-60832 uart: ['DATA', 1, (119, [[1, 60649, 60675], [1, 60675, 60701], [1, 60701, 60727], [0, 60727, 60753], [1, 60753, 60779], [1, 60779, 60805], [1, 60805, 60831]])]
618 60831-60858 uart: ['STOPBIT', 1, 1]
619 60623-60858 uart: ['FRAME', 1, (119, True)]
620 60858-61093 uart: ['IDLE', 1, 0]
621 61114-61141 uart: ['STARTBIT', 1, 0]
622 61140-61323 uart: ['DATA', 1, (120, [[0, 61140, 61166], [0, 61166, 61192], [0, 61192, 61218], [1, 61218, 61244], [1, 61244, 61270], [1, 61270, 61296], [1, 61296, 61322]])]
623 61322-61349 uart: ['STOPBIT', 1, 1]
624 61114-61349 uart: ['FRAME', 1, (120, True)]
625 61349-61584 uart: ['IDLE', 1, 0]
626 61602-61629 uart: ['STARTBIT', 1, 0]
627 61628-61811 uart: ['DATA', 1, (121, [[1, 61628, 61654], [0, 61654, 61680], [0, 61680, 61706], [1, 61706, 61732], [1, 61732, 61758], [1, 61758, 61784], [1, 61784, 61810]])]
628 61810-61837 uart: ['STOPBIT', 1, 1]
629 61602-61837 uart: ['FRAME', 1, (121, True)]
630 61837-62072 uart: ['IDLE', 1, 0]
631 62093-62120 uart: ['STARTBIT', 1, 0]
632 62119-62302 uart: ['DATA', 1, (122, [[0, 62119, 62145], [1, 62145, 62171], [0, 62171, 62197], [1, 62197, 62223], [1, 62223, 62249], [1, 62249, 62275], [1, 62275, 62301]])]
633 62301-62328 uart: ['STOPBIT', 1, 1]
634 62093-62328 uart: ['FRAME', 1, (122, True)]
635 62328-62563 uart: ['IDLE', 1, 0]
636 62583-62610 uart: ['STARTBIT', 1, 0]
637 62609-62792 uart: ['DATA', 1, (123, [[1, 62609, 62635], [1, 62635, 62661], [0, 62661, 62687], [1, 62687, 62713], [1, 62713, 62739], [1, 62739, 62765], [1, 62765, 62791]])]
638 62791-62818 uart: ['STOPBIT', 1, 1]
639 62583-62818 uart: ['FRAME', 1, (123, True)]
640 62818-63053 uart: ['IDLE', 1, 0]
641 63074-63101 uart: ['STARTBIT', 1, 0]
642 63100-63283 uart: ['DATA', 1, (124, [[0, 63100, 63126], [0, 63126, 63152], [1, 63152, 63178], [1, 63178, 63204], [1, 63204, 63230], [1, 63230, 63256], [1, 63256, 63282]])]
643 63282-63309 uart: ['STOPBIT', 1, 1]
644 63074-63309 uart: ['FRAME', 1, (124, True)]
645 63309-63544 uart: ['IDLE', 1, 0]
646 63563-63590 uart: ['STARTBIT', 1, 0]
647 63589-63772 uart: ['DATA', 1, (125, [[1, 63589, 63615], [0, 63615, 63641], [1, 63641, 63667], [1, 63667, 63693], [1, 63693, 63719], [1, 63719, 63745], [1, 63745, 63771]])]
648 63771-63798 uart: ['STOPBIT', 1, 1]
649 63563-63798 uart: ['FRAME', 1, (125, True)]
650 63798-64033 uart: ['IDLE', 1, 0]
651 64053-64080 uart: ['STARTBIT', 1, 0]
652 64079-64262 uart: ['DATA', 1, (126, [[0, 64079, 64105], [1, 64105, 64131], [1, 64131, 64157], [1, 64157, 64183], [1, 64183, 64209], [1, 64209, 64235], [1, 64235, 64261]])]
653 64261-64288 uart: ['STOPBIT', 1, 1]
654 64053-64288 uart: ['FRAME', 1, (126, True)]
655 64288-64523 uart: ['IDLE', 1, 0]
656 64542-64569 uart: ['STARTBIT', 1, 0]
657 64568-64751 uart: ['DATA', 1, (127, [[1, 64568, 64594], [1, 64594, 64620], [1, 64620, 64646], [1, 64646, 64672], [1, 64672, 64698], [1, 64698, 64724], [1, 64724, 64750]])]
658 64750-64777 uart: ['STOPBIT', 1, 1]
659 64542-64777 uart: ['FRAME', 1, (127, True)]
660 64777-65012 uart: ['IDLE', 1, 0]
661 65030-65057 uart: ['STARTBIT', 1, 0]
662 65056-65239 uart: ['DATA', 1, (0, [[0, 65056, 65082], [0, 65082, 65108], [0, 65108, 65134], [0, 65134, 65160], [0, 65160, 65186], [0, 65186, 65212], [0, 65212, 65238]])]
663 65238-65265 uart: ['STOPBIT', 1, 1]
664 65030-65265 uart: ['FRAME', 1, (0, True)]
665 65265-65500 uart: ['IDLE', 1, 0]
666 65519-65546 uart: ['STARTBIT', 1, 0]
667 65545-65728 uart: ['DATA', 1, (1, [[1, 65545, 65571], [0, 65571, 65597], [0, 65597, 65623], [0, 65623, 65649], [0, 65649, 65675], [0, 65675, 65701], [0, 65701, 65727]])]
668 65727-65754 uart: ['STOPBIT', 1, 1]
669 65519-65754 uart: ['FRAME', 1, (1, True)]
670 65754-65989 uart: ['IDLE', 1, 0]
671 66010-66037 uart: ['STARTBIT', 1, 0]
672 66036-66219 uart: ['DATA', 1, (2, [[0, 66036, 66062], [1, 66062, 66088], [0, 66088, 66114], [0, 66114, 66140], [0, 66140, 66166], [0, 66166, 66192], [0, 66192, 66218]])]
673 66218-66245 uart: ['STOPBIT', 1, 1]
674 66010-66245 uart: ['FRAME', 1, (2, True)]
675 66245-66480 uart: ['IDLE', 1, 0]
676 66500-66527 uart: ['STARTBIT', 1, 0]
677 66526-66709 uart: ['DATA', 1, (3, [[1, 66526, 66552], [1, 66552, 66578], [0, 66578, 66604], [0, 66604, 66630], [0, 66630, 66656], [0, 66656, 66682], [0, 66682, 66708]])]
678 66708-66735 uart: ['STOPBIT', 1, 1]
679 66500-66735 uart: ['FRAME', 1, (3, True)]
680 66735-66970 uart: ['IDLE', 1, 0]
681 66991-67018 uart: ['STARTBIT', 1, 0]
682 67017-67200 uart: ['DATA', 1, (4, [[0, 67017, 67043], [0, 67043, 67069], [1, 67069, 67095], [0, 67095, 67121], [0, 67121, 67147], [0, 67147, 67173], [0, 67173, 67199]])]
683 67199-67226 uart: ['STOPBIT', 1, 1]
684 66991-67226 uart: ['FRAME', 1, (4, True)]
685 67226-67461 uart: ['IDLE', 1, 0]
686 67481-67508 uart: ['STARTBIT', 1, 0]
687 67507-67690 uart: ['DATA', 1, (5, [[1, 67507, 67533], [0, 67533, 67559], [1, 67559, 67585], [0, 67585, 67611], [0, 67611, 67637], [0, 67637, 67663], [0, 67663, 67689]])]
688 67689-67716 uart: ['STOPBIT', 1, 1]
689 67481-67716 uart: ['FRAME', 1, (5, True)]
690 67716-67951 uart: ['IDLE', 1, 0]
691 67974-68001 uart: ['STARTBIT', 1, 0]
692 68000-68183 uart: ['DATA', 1, (6, [[0, 68000, 68026], [1, 68026, 68052], [1, 68052, 68078], [0, 68078, 68104], [0, 68104, 68130], [0, 68130, 68156], [0, 68156, 68182]])]
693 68182-68209 uart: ['STOPBIT', 1, 1]
694 67974-68209 uart: ['FRAME', 1, (6, True)]
695 68209-68444 uart: ['IDLE', 1, 0]
696 68465-68492 uart: ['STARTBIT', 1, 0]
697 68491-68674 uart: ['DATA', 1, (7, [[1, 68491, 68517], [1, 68517, 68543], [1, 68543, 68569], [0, 68569, 68595], [0, 68595, 68621], [0, 68621, 68647], [0, 68647, 68673]])]
698 68673-68700 uart: ['STOPBIT', 1, 1]
699 68465-68700 uart: ['FRAME', 1, (7, True)]
700 68700-68935 uart: ['IDLE', 1, 0]
701 68955-68982 uart: ['STARTBIT', 1, 0]
702 68981-69164 uart: ['DATA', 1, (8, [[0, 68981, 69007], [0, 69007, 69033], [0, 69033, 69059], [1, 69059, 69085], [0, 69085, 69111], [0, 69111, 69137], [0, 69137, 69163]])]
703 69163-69190 uart: ['STOPBIT', 1, 1]
704 68955-69190 uart: ['FRAME', 1, (8, True)]
projects / sigrok-test.git / blob