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avr_isp: add test for ATmega328/P
[sigrok-test.git] / decoder / test / spiflash / write_ascii.output
CommitLineData
ffa3848b
UH
127808-27829 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
227833-27854 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3Internal write enable latch is not set.
4Block protection bits (BP3-BP0): 0x0.
5Device is not in continuously program mode (CP mode).
6Status register writes are allowed.
7"
ffa3848b
UH
827833-27854 spiflash: field: "Status register"
927808-27854 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
1027854-27873 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
11Internal write enable latch is not set.
12Block protection bits (BP3-BP0): 0x0.
13Device is not in continuously program mode (CP mode).
14Status register writes are allowed.
15"
ffa3848b
UH
1627854-27873 spiflash: field: "Status register"
1727808-27873 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
1875209-75228 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
1980425-80444 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
2080446-80465 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
2180467-80486 spiflash: bit: "Address bits 15..8: 0x61" "Addr bits 15..8: 0x61" "Addr bits 15..8" "A15..A8"
2280487-80508 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
2380446-80508 spiflash: field: "Address: 0x016100" "Addr: 0x016100" "0x016100"
2480508-86359 spiflash: field: "Data (256 bytes)"
2580425-86359 spiflash: pp: "Page program (addr 0x016100, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
2687321-87342 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
2787346-87367 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
28Internal write enable latch is set.
29Block protection bits (BP3-BP0): 0x0.
30Device is not in continuously program mode (CP mode).
31Status register writes are allowed.
32"
ffa3848b
UH
3387346-87367 spiflash: field: "Status register"
3487321-87367 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
3587367-87388 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
36Internal write enable latch is set.
37Block protection bits (BP3-BP0): 0x0.
38Device is not in continuously program mode (CP mode).
39Status register writes are allowed.
40"
ffa3848b
UH
4187367-87388 spiflash: field: "Status register"
4287321-87388 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
43127360-127379 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
44127385-127404 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
45Internal write enable latch is not set.
46Block protection bits (BP3-BP0): 0x0.
47Device is not in continuously program mode (CP mode).
48Status register writes are allowed.
49"
ffa3848b
UH
50127385-127404 spiflash: field: "Status register"
51127360-127404 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
52127405-127426 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
53Internal write enable latch is not set.
54Block protection bits (BP3-BP0): 0x0.
55Device is not in continuously program mode (CP mode).
56Status register writes are allowed.
57"
ffa3848b
UH
58127405-127426 spiflash: field: "Status register"
59127360-127426 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
60179904-179925 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
61181036-181057 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
62181057-181078 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
63181078-181099 spiflash: bit: "Address bits 15..8: 0x62" "Addr bits 15..8: 0x62" "Addr bits 15..8" "A15..A8"
64181099-181118 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
65181057-181118 spiflash: field: "Address: 0x016200" "Addr: 0x016200" "0x016200"
66181120-186453 spiflash: field: "Data (256 bytes)"
67181036-186453 spiflash: pp: "Page program (addr 0x016200, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
68187196-187215 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
69187221-187240 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
70Internal write enable latch is set.
71Block protection bits (BP3-BP0): 0x0.
72Device is not in continuously program mode (CP mode).
73Status register writes are allowed.
74"
ffa3848b
UH
75187221-187240 spiflash: field: "Status register"
76187196-187240 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
77187242-187261 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
78Internal write enable latch is set.
79Block protection bits (BP3-BP0): 0x0.
80Device is not in continuously program mode (CP mode).
81Status register writes are allowed.
82"
ffa3848b
UH
83187242-187261 spiflash: field: "Status register"
84187196-187261 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
85227730-227751 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
86227755-227776 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
87Internal write enable latch is not set.
88Block protection bits (BP3-BP0): 0x0.
89Device is not in continuously program mode (CP mode).
90Status register writes are allowed.
91"
ffa3848b
UH
92227755-227776 spiflash: field: "Status register"
93227730-227776 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
94227776-227797 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
95Internal write enable latch is not set.
96Block protection bits (BP3-BP0): 0x0.
97Device is not in continuously program mode (CP mode).
98Status register writes are allowed.
99"
ffa3848b
UH
100227776-227797 spiflash: field: "Status register"
101227730-227797 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
102279896-279915 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
103281020-281039 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
104281040-281061 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
105281061-281082 spiflash: bit: "Address bits 15..8: 0x63" "Addr bits 15..8: 0x63" "Addr bits 15..8" "A15..A8"
106281082-281103 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
107281040-281103 spiflash: field: "Address: 0x016300" "Addr: 0x016300" "0x016300"
108281103-286436 spiflash: field: "Data (256 bytes)"
109281020-286436 spiflash: pp: "Page program (addr 0x016300, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
110287293-287312 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
111287318-287337 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
112Internal write enable latch is set.
113Block protection bits (BP3-BP0): 0x0.
114Device is not in continuously program mode (CP mode).
115Status register writes are allowed.
116"
ffa3848b
UH
117287318-287337 spiflash: field: "Status register"
118287293-287337 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
119287339-287358 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
120Internal write enable latch is set.
121Block protection bits (BP3-BP0): 0x0.
122Device is not in continuously program mode (CP mode).
123Status register writes are allowed.
124"
ffa3848b
UH
125287339-287358 spiflash: field: "Status register"
126287293-287358 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
127327923-327942 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
128327948-327967 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
129Internal write enable latch is not set.
130Block protection bits (BP3-BP0): 0x0.
131Device is not in continuously program mode (CP mode).
132Status register writes are allowed.
133"
ffa3848b
UH
134327948-327967 spiflash: field: "Status register"
135327923-327967 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
136327968-327989 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
137Internal write enable latch is not set.
138Block protection bits (BP3-BP0): 0x0.
139Device is not in continuously program mode (CP mode).
140Status register writes are allowed.
141"
ffa3848b
UH
142327968-327989 spiflash: field: "Status register"
143327923-327989 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
144379877-379898 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
145381006-381025 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
146381026-381047 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
147381047-381068 spiflash: bit: "Address bits 15..8: 0x64" "Addr bits 15..8: 0x64" "Addr bits 15..8" "A15..A8"
148381068-381089 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
149381026-381089 spiflash: field: "Address: 0x016400" "Addr: 0x016400" "0x016400"
150381089-386422 spiflash: field: "Data (256 bytes)"
151381006-386423 spiflash: pp: "Page program (addr 0x016400, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
152387281-387300 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
153387306-387325 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
154Internal write enable latch is set.
155Block protection bits (BP3-BP0): 0x0.
156Device is not in continuously program mode (CP mode).
157Status register writes are allowed.
158"
ffa3848b
UH
159387306-387325 spiflash: field: "Status register"
160387281-387325 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
161387327-387346 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
162Internal write enable latch is set.
163Block protection bits (BP3-BP0): 0x0.
164Device is not in continuously program mode (CP mode).
165Status register writes are allowed.
166"
ffa3848b
UH
167387327-387346 spiflash: field: "Status register"
168387281-387346 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
169427704-427723 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
170427729-427748 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
171Internal write enable latch is not set.
172Block protection bits (BP3-BP0): 0x0.
173Device is not in continuously program mode (CP mode).
174Status register writes are allowed.
175"
ffa3848b
UH
176427729-427748 spiflash: field: "Status register"
177427704-427748 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
178427750-427769 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
179Internal write enable latch is not set.
180Block protection bits (BP3-BP0): 0x0.
181Device is not in continuously program mode (CP mode).
182Status register writes are allowed.
183"
ffa3848b
UH
184427750-427769 spiflash: field: "Status register"
185427704-427769 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
186475053-475074 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
187479968-479987 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
188479989-480008 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
189480010-480029 spiflash: bit: "Address bits 15..8: 0x65" "Addr bits 15..8: 0x65" "Addr bits 15..8" "A15..A8"
190480030-480051 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
191479989-480051 spiflash: field: "Address: 0x016500" "Addr: 0x016500" "0x016500"
192480051-485383 spiflash: field: "Data (256 bytes)"
193479968-485385 spiflash: pp: "Page program (addr 0x016500, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
194486102-486121 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
195486127-486146 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
196Internal write enable latch is set.
197Block protection bits (BP3-BP0): 0x0.
198Device is not in continuously program mode (CP mode).
199Status register writes are allowed.
200"
ffa3848b
UH
201486127-486146 spiflash: field: "Status register"
202486102-486146 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
203486148-486167 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
204Internal write enable latch is set.
205Block protection bits (BP3-BP0): 0x0.
206Device is not in continuously program mode (CP mode).
207Status register writes are allowed.
208"
ffa3848b
UH
209486148-486167 spiflash: field: "Status register"
210486102-486167 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
211525686-525707 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
212525711-525732 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
213Internal write enable latch is not set.
214Block protection bits (BP3-BP0): 0x0.
215Device is not in continuously program mode (CP mode).
216Status register writes are allowed.
217"
ffa3848b
UH
218525711-525732 spiflash: field: "Status register"
219525686-525732 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
220525732-525751 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
221Internal write enable latch is not set.
222Block protection bits (BP3-BP0): 0x0.
223Device is not in continuously program mode (CP mode).
224Status register writes are allowed.
225"
ffa3848b
UH
226525732-525751 spiflash: field: "Status register"
227525686-525751 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
228579864-579885 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
229580978-580997 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
230580999-581018 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
231581019-581040 spiflash: bit: "Address bits 15..8: 0x66" "Addr bits 15..8: 0x66" "Addr bits 15..8" "A15..A8"
232581040-581061 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
233580999-581061 spiflash: field: "Address: 0x016600" "Addr: 0x016600" "0x016600"
234581061-586394 spiflash: field: "Data (256 bytes)"
235580978-586395 spiflash: pp: "Page program (addr 0x016600, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
236587264-587283 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
237587289-587308 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
238Internal write enable latch is set.
239Block protection bits (BP3-BP0): 0x0.
240Device is not in continuously program mode (CP mode).
241Status register writes are allowed.
242"
ffa3848b
UH
243587289-587308 spiflash: field: "Status register"
244587264-587308 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
245587310-587329 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
246Internal write enable latch is set.
247Block protection bits (BP3-BP0): 0x0.
248Device is not in continuously program mode (CP mode).
249Status register writes are allowed.
250"
ffa3848b
UH
251587310-587329 spiflash: field: "Status register"
252587264-587329 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
253627728-627747 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
254627753-627772 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
255Internal write enable latch is not set.
256Block protection bits (BP3-BP0): 0x0.
257Device is not in continuously program mode (CP mode).
258Status register writes are allowed.
259"
ffa3848b
UH
260627753-627772 spiflash: field: "Status register"
261627728-627772 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
262627774-627793 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
263Internal write enable latch is not set.
264Block protection bits (BP3-BP0): 0x0.
265Device is not in continuously program mode (CP mode).
266Status register writes are allowed.
267"
ffa3848b
UH
268627774-627793 spiflash: field: "Status register"
269627728-627793 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
270679830-679849 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
271680964-680983 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
272680985-681004 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
273681005-681026 spiflash: bit: "Address bits 15..8: 0x67" "Addr bits 15..8: 0x67" "Addr bits 15..8" "A15..A8"
274681026-681047 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
275680985-681047 spiflash: field: "Address: 0x016700" "Addr: 0x016700" "0x016700"
276681047-686380 spiflash: field: "Data (256 bytes)"
277680964-686381 spiflash: pp: "Page program (addr 0x016700, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
278687241-687262 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
279687266-687287 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
280Internal write enable latch is set.
281Block protection bits (BP3-BP0): 0x0.
282Device is not in continuously program mode (CP mode).
283Status register writes are allowed.
284"
ffa3848b
UH
285687266-687287 spiflash: field: "Status register"
286687241-687287 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
287687287-687306 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
288Internal write enable latch is set.
289Block protection bits (BP3-BP0): 0x0.
290Device is not in continuously program mode (CP mode).
291Status register writes are allowed.
292"
ffa3848b
UH
293687287-687306 spiflash: field: "Status register"
294687241-687306 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
295727660-727679 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
296727685-727704 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
297Internal write enable latch is not set.
298Block protection bits (BP3-BP0): 0x0.
299Device is not in continuously program mode (CP mode).
300Status register writes are allowed.
301"
ffa3848b
UH
302727685-727704 spiflash: field: "Status register"
303727660-727704 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
304727706-727725 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
305Internal write enable latch is not set.
306Block protection bits (BP3-BP0): 0x0.
307Device is not in continuously program mode (CP mode).
308Status register writes are allowed.
309"
ffa3848b
UH
310727706-727725 spiflash: field: "Status register"
311727660-727725 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
312779824-779843 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
313780948-780969 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
314780969-780990 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
315780990-781009 spiflash: bit: "Address bits 15..8: 0x68" "Addr bits 15..8: 0x68" "Addr bits 15..8" "A15..A8"
316781011-781030 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
317780969-781030 spiflash: field: "Address: 0x016800" "Addr: 0x016800" "0x016800"
318781032-786363 spiflash: field: "Data (256 bytes)"
319780948-786365 spiflash: pp: "Page program (addr 0x016800, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
320787224-787243 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
321787249-787268 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
322Internal write enable latch is set.
323Block protection bits (BP3-BP0): 0x0.
324Device is not in continuously program mode (CP mode).
325Status register writes are allowed.
326"
ffa3848b
UH
327787249-787268 spiflash: field: "Status register"
328787224-787268 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
329787270-787289 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
330Internal write enable latch is set.
331Block protection bits (BP3-BP0): 0x0.
332Device is not in continuously program mode (CP mode).
333Status register writes are allowed.
334"
ffa3848b
UH
335787270-787289 spiflash: field: "Status register"
336787224-787289 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
337825635-825654 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
338825660-825679 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
339Internal write enable latch is not set.
340Block protection bits (BP3-BP0): 0x0.
341Device is not in continuously program mode (CP mode).
342Status register writes are allowed.
343"
ffa3848b
UH
344825660-825679 spiflash: field: "Status register"
345825635-825679 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
346825681-825700 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
347Internal write enable latch is not set.
348Block protection bits (BP3-BP0): 0x0.
349Device is not in continuously program mode (CP mode).
350Status register writes are allowed.
351"
ffa3848b
UH
352825681-825700 spiflash: field: "Status register"
353825635-825700 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
354879799-879820 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
355880940-880959 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
356880961-880980 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
357880981-881002 spiflash: bit: "Address bits 15..8: 0x69" "Addr bits 15..8: 0x69" "Addr bits 15..8" "A15..A8"
358881002-881023 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
359880961-881023 spiflash: field: "Address: 0x016900" "Addr: 0x016900" "0x016900"
360881023-886356 spiflash: field: "Data (256 bytes)"
361880940-886357 spiflash: pp: "Page program (addr 0x016900, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
362887211-887230 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
363887236-887255 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
364Internal write enable latch is set.
365Block protection bits (BP3-BP0): 0x0.
366Device is not in continuously program mode (CP mode).
367Status register writes are allowed.
368"
ffa3848b
UH
369887236-887255 spiflash: field: "Status register"
370887211-887255 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
371887257-887276 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
372Internal write enable latch is set.
373Block protection bits (BP3-BP0): 0x0.
374Device is not in continuously program mode (CP mode).
375Status register writes are allowed.
376"
ffa3848b
UH
377887257-887276 spiflash: field: "Status register"
378887211-887276 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
379925654-925675 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
380925679-925700 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
381Internal write enable latch is not set.
382Block protection bits (BP3-BP0): 0x0.
383Device is not in continuously program mode (CP mode).
384Status register writes are allowed.
385"
ffa3848b
UH
386925679-925700 spiflash: field: "Status register"
387925654-925700 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
388925700-925719 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
389Internal write enable latch is not set.
390Block protection bits (BP3-BP0): 0x0.
391Device is not in continuously program mode (CP mode).
392Status register writes are allowed.
393"
ffa3848b
UH
394925700-925719 spiflash: field: "Status register"
395925654-925719 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
396979779-979800 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
397980925-980944 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
398980946-980965 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
399980967-980986 spiflash: bit: "Address bits 15..8: 0x6a" "Addr bits 15..8: 0x6a" "Addr bits 15..8" "A15..A8"
400980987-981008 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
401980946-981008 spiflash: field: "Address: 0x016a00" "Addr: 0x016a00" "0x016a00"
402981008-986340 spiflash: field: "Data (256 bytes)"
403980925-986342 spiflash: pp: "Page program (addr 0x016a00, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
404987204-987223 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
405987229-987248 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
406Internal write enable latch is set.
407Block protection bits (BP3-BP0): 0x0.
408Device is not in continuously program mode (CP mode).
409Status register writes are allowed.
410"
ffa3848b
UH
411987229-987248 spiflash: field: "Status register"
412987204-987248 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
413987249-987270 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
414Internal write enable latch is set.
415Block protection bits (BP3-BP0): 0x0.
416Device is not in continuously program mode (CP mode).
417Status register writes are allowed.
418"
ffa3848b
UH
419987249-987270 spiflash: field: "Status register"
420987204-987270 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4211025608-1025627 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4221025633-1025652 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
423Internal write enable latch is not set.
424Block protection bits (BP3-BP0): 0x0.
425Device is not in continuously program mode (CP mode).
426Status register writes are allowed.
427"
ffa3848b
UH
4281025633-1025652 spiflash: field: "Status register"
4291025608-1025652 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4301025653-1025674 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
431Internal write enable latch is not set.
432Block protection bits (BP3-BP0): 0x0.
433Device is not in continuously program mode (CP mode).
434Status register writes are allowed.
435"
ffa3848b
UH
4361025653-1025674 spiflash: field: "Status register"
4371025608-1025674 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4381074791-1074812 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
4391079896-1079915 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
4401079916-1079937 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
4411079937-1079958 spiflash: bit: "Address bits 15..8: 0x6b" "Addr bits 15..8: 0x6b" "Addr bits 15..8" "A15..A8"
4421079958-1079979 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
4431079916-1079979 spiflash: field: "Address: 0x016b00" "Addr: 0x016b00" "0x016b00"
4441079979-1085312 spiflash: field: "Data (256 bytes)"
4451079896-1085313 spiflash: pp: "Page program (addr 0x016b00, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
4461086031-1086050 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4471086056-1086075 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
448Internal write enable latch is set.
449Block protection bits (BP3-BP0): 0x0.
450Device is not in continuously program mode (CP mode).
451Status register writes are allowed.
452"
ffa3848b
UH
4531086056-1086075 spiflash: field: "Status register"
4541086031-1086075 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4551086077-1086096 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
456Internal write enable latch is set.
457Block protection bits (BP3-BP0): 0x0.
458Device is not in continuously program mode (CP mode).
459Status register writes are allowed.
460"
ffa3848b
UH
4611086077-1086096 spiflash: field: "Status register"
4621086031-1086096 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4631125602-1125623 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4641125627-1125648 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
465Internal write enable latch is not set.
466Block protection bits (BP3-BP0): 0x0.
467Device is not in continuously program mode (CP mode).
468Status register writes are allowed.
469"
ffa3848b
UH
4701125627-1125648 spiflash: field: "Status register"
4711125602-1125648 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4721125648-1125667 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
473Internal write enable latch is not set.
474Block protection bits (BP3-BP0): 0x0.
475Device is not in continuously program mode (CP mode).
476Status register writes are allowed.
477"
ffa3848b
UH
4781125648-1125667 spiflash: field: "Status register"
4791125602-1125667 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4801179768-1179787 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
4811180902-1180921 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
4821180922-1180943 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
4831180943-1180964 spiflash: bit: "Address bits 15..8: 0x6c" "Addr bits 15..8: 0x6c" "Addr bits 15..8" "A15..A8"
4841180964-1180985 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
4851180922-1180985 spiflash: field: "Address: 0x016c00" "Addr: 0x016c00" "0x016c00"
4861180985-1186318 spiflash: field: "Data (256 bytes)"
4871180902-1186319 spiflash: pp: "Page program (addr 0x016c00, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
4881187174-1187193 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4891187199-1187218 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
490Internal write enable latch is set.
491Block protection bits (BP3-BP0): 0x0.
492Device is not in continuously program mode (CP mode).
493Status register writes are allowed.
494"
ffa3848b
UH
4951187199-1187218 spiflash: field: "Status register"
4961187174-1187218 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
4971187219-1187240 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
498Internal write enable latch is set.
499Block protection bits (BP3-BP0): 0x0.
500Device is not in continuously program mode (CP mode).
501Status register writes are allowed.
502"
ffa3848b
UH
5031187219-1187240 spiflash: field: "Status register"
5041187174-1187240 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5051227741-1227762 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5061227766-1227787 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
507Internal write enable latch is not set.
508Block protection bits (BP3-BP0): 0x0.
509Device is not in continuously program mode (CP mode).
510Status register writes are allowed.
511"
ffa3848b
UH
5121227766-1227787 spiflash: field: "Status register"
5131227741-1227787 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5141227787-1227808 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
515Internal write enable latch is not set.
516Block protection bits (BP3-BP0): 0x0.
517Device is not in continuously program mode (CP mode).
518Status register writes are allowed.
519"
ffa3848b
UH
5201227787-1227808 spiflash: field: "Status register"
5211227741-1227808 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5221279741-1279762 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
5231280886-1280907 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
5241280907-1280928 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
5251280928-1280949 spiflash: bit: "Address bits 15..8: 0x6d" "Addr bits 15..8: 0x6d" "Addr bits 15..8" "A15..A8"
5261280949-1280968 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
5271280907-1280968 spiflash: field: "Address: 0x016d00" "Addr: 0x016d00" "0x016d00"
5281280970-1286303 spiflash: field: "Data (256 bytes)"
5291280886-1286303 spiflash: pp: "Page program (addr 0x016d00, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
5301287055-1287074 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5311287080-1287099 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
532Internal write enable latch is set.
533Block protection bits (BP3-BP0): 0x0.
534Device is not in continuously program mode (CP mode).
535Status register writes are allowed.
536"
ffa3848b
UH
5371287080-1287099 spiflash: field: "Status register"
5381287055-1287099 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5391287100-1287121 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
540Internal write enable latch is set.
541Block protection bits (BP3-BP0): 0x0.
542Device is not in continuously program mode (CP mode).
543Status register writes are allowed.
544"
ffa3848b
UH
5451287100-1287121 spiflash: field: "Status register"
5461287055-1287121 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5471325459-1325478 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5481325484-1325503 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
549Internal write enable latch is not set.
550Block protection bits (BP3-BP0): 0x0.
551Device is not in continuously program mode (CP mode).
552Status register writes are allowed.
553"
ffa3848b
UH
5541325484-1325503 spiflash: field: "Status register"
5551325459-1325503 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5561325505-1325524 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
557Internal write enable latch is not set.
558Block protection bits (BP3-BP0): 0x0.
559Device is not in continuously program mode (CP mode).
560Status register writes are allowed.
561"
ffa3848b
UH
5621325505-1325524 spiflash: field: "Status register"
5631325459-1325524 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5641375039-1375058 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
5651379449-1379470 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
5661379470-1379491 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
5671379491-1379510 spiflash: bit: "Address bits 15..8: 0x6e" "Addr bits 15..8: 0x6e" "Addr bits 15..8" "A15..A8"
5681379512-1379531 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
5691379470-1379531 spiflash: field: "Address: 0x016e00" "Addr: 0x016e00" "0x016e00"
5701379533-1384864 spiflash: field: "Data (256 bytes)"
5711379449-1384866 spiflash: pp: "Page program (addr 0x016e00, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
5721385972-1385991 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5731385997-1386016 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
574Internal write enable latch is set.
575Block protection bits (BP3-BP0): 0x0.
576Device is not in continuously program mode (CP mode).
577Status register writes are allowed.
578"
ffa3848b
UH
5791385997-1386016 spiflash: field: "Status register"
5801385972-1386016 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5811386017-1386038 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
582Internal write enable latch is set.
583Block protection bits (BP3-BP0): 0x0.
584Device is not in continuously program mode (CP mode).
585Status register writes are allowed.
586"
ffa3848b
UH
5871386017-1386038 spiflash: field: "Status register"
5881385972-1386038 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5891425548-1425569 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5901425573-1425594 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
591Internal write enable latch is not set.
592Block protection bits (BP3-BP0): 0x0.
593Device is not in continuously program mode (CP mode).
594Status register writes are allowed.
595"
ffa3848b
UH
5961425573-1425594 spiflash: field: "Status register"
5971425548-1425594 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
5981425594-1425613 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
599Internal write enable latch is not set.
600Block protection bits (BP3-BP0): 0x0.
601Device is not in continuously program mode (CP mode).
602Status register writes are allowed.
603"
ffa3848b
UH
6041425594-1425613 spiflash: field: "Status register"
6051425548-1425613 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6061475031-1475050 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
6071479303-1479322 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
6081479324-1479343 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
6091479344-1479365 spiflash: bit: "Address bits 15..8: 0x6f" "Addr bits 15..8: 0x6f" "Addr bits 15..8" "A15..A8"
6101479365-1479386 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
6111479324-1479386 spiflash: field: "Address: 0x016f00" "Addr: 0x016f00" "0x016f00"
6121479386-1484718 spiflash: field: "Data (256 bytes)"
6131479303-1484720 spiflash: pp: "Page program (addr 0x016f00, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
6141485967-1485986 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6151485992-1486011 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
616Internal write enable latch is set.
617Block protection bits (BP3-BP0): 0x0.
618Device is not in continuously program mode (CP mode).
619Status register writes are allowed.
620"
ffa3848b
UH
6211485992-1486011 spiflash: field: "Status register"
6221485967-1486011 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6231486013-1486032 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
624Internal write enable latch is set.
625Block protection bits (BP3-BP0): 0x0.
626Device is not in continuously program mode (CP mode).
627Status register writes are allowed.
628"
ffa3848b
UH
6291486013-1486032 spiflash: field: "Status register"
6301485967-1486032 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6311525434-1525455 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6321525459-1525480 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
633Internal write enable latch is not set.
634Block protection bits (BP3-BP0): 0x0.
635Device is not in continuously program mode (CP mode).
636Status register writes are allowed.
637"
ffa3848b
UH
6381525459-1525480 spiflash: field: "Status register"
6391525434-1525480 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6401525480-1525501 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
641Internal write enable latch is not set.
642Block protection bits (BP3-BP0): 0x0.
643Device is not in continuously program mode (CP mode).
644Status register writes are allowed.
645"
ffa3848b
UH
6461525480-1525501 spiflash: field: "Status register"
6471525434-1525501 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6481575417-1575438 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
6491578920-1578941 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
6501578941-1578960 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
6511578962-1578981 spiflash: bit: "Address bits 15..8: 0x70" "Addr bits 15..8: 0x70" "Addr bits 15..8" "A15..A8"
6521578983-1579002 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
6531578941-1579002 spiflash: field: "Address: 0x017000" "Addr: 0x017000" "0x017000"
6541579003-1584335 spiflash: field: "Data (256 bytes)"
6551578920-1584337 spiflash: pp: "Page program (addr 0x017000, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
6561585947-1585968 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6571585972-1585993 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
658Internal write enable latch is set.
659Block protection bits (BP3-BP0): 0x0.
660Device is not in continuously program mode (CP mode).
661Status register writes are allowed.
662"
ffa3848b
UH
6631585972-1585993 spiflash: field: "Status register"
6641585947-1585993 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6651585993-1586014 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
666Internal write enable latch is set.
667Block protection bits (BP3-BP0): 0x0.
668Device is not in continuously program mode (CP mode).
669Status register writes are allowed.
670"
ffa3848b
UH
6711585993-1586014 spiflash: field: "Status register"
6721585947-1586014 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6731625419-1625438 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6741625444-1625463 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
675Internal write enable latch is not set.
676Block protection bits (BP3-BP0): 0x0.
677Device is not in continuously program mode (CP mode).
678Status register writes are allowed.
679"
ffa3848b
UH
6801625444-1625463 spiflash: field: "Status register"
6811625419-1625463 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6821625464-1625485 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
683Internal write enable latch is not set.
684Block protection bits (BP3-BP0): 0x0.
685Device is not in continuously program mode (CP mode).
686Status register writes are allowed.
687"
ffa3848b
UH
6881625464-1625485 spiflash: field: "Status register"
6891625419-1625485 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6901674991-1675012 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
6911679819-1679840 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
6921679840-1679859 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
6931679861-1679880 spiflash: bit: "Address bits 15..8: 0x71" "Addr bits 15..8: 0x71" "Addr bits 15..8" "A15..A8"
6941679882-1679901 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
6951679840-1679901 spiflash: field: "Address: 0x017100" "Addr: 0x017100" "0x017100"
6961679902-1685234 spiflash: field: "Data (256 bytes)"
6971679819-1685236 spiflash: pp: "Page program (addr 0x017100, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
6981685942-1685961 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
6991685967-1685986 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
700Internal write enable latch is set.
701Block protection bits (BP3-BP0): 0x0.
702Device is not in continuously program mode (CP mode).
703Status register writes are allowed.
704"
ffa3848b
UH
7051685967-1685986 spiflash: field: "Status register"
7061685942-1685986 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7071685988-1686007 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
708Internal write enable latch is set.
709Block protection bits (BP3-BP0): 0x0.
710Device is not in continuously program mode (CP mode).
711Status register writes are allowed.
712"
ffa3848b
UH
7131685988-1686007 spiflash: field: "Status register"
7141685942-1686007 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7151725516-1725535 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7161725541-1725560 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
717Internal write enable latch is not set.
718Block protection bits (BP3-BP0): 0x0.
719Device is not in continuously program mode (CP mode).
720Status register writes are allowed.
721"
ffa3848b
UH
7221725541-1725560 spiflash: field: "Status register"
7231725516-1725560 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7241725561-1725582 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
725Internal write enable latch is not set.
726Block protection bits (BP3-BP0): 0x0.
727Device is not in continuously program mode (CP mode).
728Status register writes are allowed.
729"
ffa3848b
UH
7301725561-1725582 spiflash: field: "Status register"
7311725516-1725582 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7321779688-1779707 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
7331780950-1780969 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
7341780971-1780990 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
7351780991-1781012 spiflash: bit: "Address bits 15..8: 0x72" "Addr bits 15..8: 0x72" "Addr bits 15..8" "A15..A8"
7361781012-1781033 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
7371780971-1781033 spiflash: field: "Address: 0x017200" "Addr: 0x017200" "0x017200"
7381781033-1786366 spiflash: field: "Data (256 bytes)"
7391780950-1786367 spiflash: pp: "Page program (addr 0x017200, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
7401787089-1787110 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7411787114-1787135 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
742Internal write enable latch is set.
743Block protection bits (BP3-BP0): 0x0.
744Device is not in continuously program mode (CP mode).
745Status register writes are allowed.
746"
ffa3848b
UH
7471787114-1787135 spiflash: field: "Status register"
7481787089-1787135 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7491787135-1787154 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
750Internal write enable latch is set.
751Block protection bits (BP3-BP0): 0x0.
752Device is not in continuously program mode (CP mode).
753Status register writes are allowed.
754"
ffa3848b
UH
7551787135-1787154 spiflash: field: "Status register"
7561787089-1787154 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7571825502-1825523 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7581825527-1825548 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
759Internal write enable latch is not set.
760Block protection bits (BP3-BP0): 0x0.
761Device is not in continuously program mode (CP mode).
762Status register writes are allowed.
763"
ffa3848b
UH
7641825527-1825548 spiflash: field: "Status register"
7651825502-1825548 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7661825548-1825569 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
767Internal write enable latch is not set.
768Block protection bits (BP3-BP0): 0x0.
769Device is not in continuously program mode (CP mode).
770Status register writes are allowed.
771"
ffa3848b
UH
7721825548-1825569 spiflash: field: "Status register"
7731825502-1825569 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7741874676-1874697 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
7751879748-1879769 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
7761879769-1879790 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
7771879790-1879809 spiflash: bit: "Address bits 15..8: 0x73" "Addr bits 15..8: 0x73" "Addr bits 15..8" "A15..A8"
7781879811-1879830 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
7791879769-1879830 spiflash: field: "Address: 0x017300" "Addr: 0x017300" "0x017300"
7801879832-1885165 spiflash: field: "Data (256 bytes)"
7811879748-1885165 spiflash: pp: "Page program (addr 0x017300, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
7821885913-1885934 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7831885938-1885959 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
784Internal write enable latch is set.
785Block protection bits (BP3-BP0): 0x0.
786Device is not in continuously program mode (CP mode).
787Status register writes are allowed.
788"
ffa3848b
UH
7891885938-1885959 spiflash: field: "Status register"
7901885913-1885959 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7911885959-1885980 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
792Internal write enable latch is set.
793Block protection bits (BP3-BP0): 0x0.
794Device is not in continuously program mode (CP mode).
795Status register writes are allowed.
796"
ffa3848b
UH
7971885959-1885980 spiflash: field: "Status register"
7981885913-1885980 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
7991925483-1925502 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8001925508-1925527 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
801Internal write enable latch is not set.
802Block protection bits (BP3-BP0): 0x0.
803Device is not in continuously program mode (CP mode).
804Status register writes are allowed.
805"
ffa3848b
UH
8061925508-1925527 spiflash: field: "Status register"
8071925483-1925527 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8081925528-1925549 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
809Internal write enable latch is not set.
810Block protection bits (BP3-BP0): 0x0.
811Device is not in continuously program mode (CP mode).
812Status register writes are allowed.
813"
ffa3848b
UH
8141925528-1925549 spiflash: field: "Status register"
8151925483-1925549 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8161979667-1979688 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
8171980788-1980809 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
8181980809-1980828 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
8191980830-1980849 spiflash: bit: "Address bits 15..8: 0x74" "Addr bits 15..8: 0x74" "Addr bits 15..8" "A15..A8"
8201980851-1980870 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
8211980809-1980870 spiflash: field: "Address: 0x017400" "Addr: 0x017400" "0x017400"
8221980871-1986203 spiflash: field: "Data (256 bytes)"
8231980788-1986205 spiflash: pp: "Page program (addr 0x017400, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
8241987066-1987085 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8251987091-1987110 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
826Internal write enable latch is set.
827Block protection bits (BP3-BP0): 0x0.
828Device is not in continuously program mode (CP mode).
829Status register writes are allowed.
830"
ffa3848b
UH
8311987091-1987110 spiflash: field: "Status register"
8321987066-1987110 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8331987112-1987131 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
834Internal write enable latch is set.
835Block protection bits (BP3-BP0): 0x0.
836Device is not in continuously program mode (CP mode).
837Status register writes are allowed.
838"
ffa3848b
UH
8391987112-1987131 spiflash: field: "Status register"
8401987066-1987131 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8412025473-2025492 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8422025498-2025517 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
843Internal write enable latch is not set.
844Block protection bits (BP3-BP0): 0x0.
845Device is not in continuously program mode (CP mode).
846Status register writes are allowed.
847"
ffa3848b
UH
8482025498-2025517 spiflash: field: "Status register"
8492025473-2025517 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8502025518-2025539 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
851Internal write enable latch is not set.
852Block protection bits (BP3-BP0): 0x0.
853Device is not in continuously program mode (CP mode).
854Status register writes are allowed.
855"
ffa3848b
UH
8562025518-2025539 spiflash: field: "Status register"
8572025473-2025539 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8582074937-2074958 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
8592079741-2079762 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
8602079762-2079783 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
8612079783-2079802 spiflash: bit: "Address bits 15..8: 0x75" "Addr bits 15..8: 0x75" "Addr bits 15..8" "A15..A8"
8622079804-2079823 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
8632079762-2079823 spiflash: field: "Address: 0x017500" "Addr: 0x017500" "0x017500"
8642079825-2085156 spiflash: field: "Data (256 bytes)"
8652079741-2085158 spiflash: pp: "Page program (addr 0x017500, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
8662085888-2085909 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8672085913-2085934 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
868Internal write enable latch is set.
869Block protection bits (BP3-BP0): 0x0.
870Device is not in continuously program mode (CP mode).
871Status register writes are allowed.
872"
ffa3848b
UH
8732085913-2085934 spiflash: field: "Status register"
8742085888-2085934 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8752085934-2085955 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
876Internal write enable latch is set.
877Block protection bits (BP3-BP0): 0x0.
878Device is not in continuously program mode (CP mode).
879Status register writes are allowed.
880"
ffa3848b
UH
8812085934-2085955 spiflash: field: "Status register"
8822085888-2085955 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8832125468-2125487 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8842125493-2125512 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
885Internal write enable latch is not set.
886Block protection bits (BP3-BP0): 0x0.
887Device is not in continuously program mode (CP mode).
888Status register writes are allowed.
889"
ffa3848b
UH
8902125493-2125512 spiflash: field: "Status register"
8912125468-2125512 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
8922125514-2125533 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
893Internal write enable latch is not set.
894Block protection bits (BP3-BP0): 0x0.
895Device is not in continuously program mode (CP mode).
896Status register writes are allowed.
897"
ffa3848b
UH
8982125514-2125533 spiflash: field: "Status register"
8992125468-2125533 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9002174536-2174557 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
9012179636-2179657 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
9022179657-2179676 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
9032179678-2179697 spiflash: bit: "Address bits 15..8: 0x76" "Addr bits 15..8: 0x76" "Addr bits 15..8" "A15..A8"
9042179699-2179718 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
9052179657-2179718 spiflash: field: "Address: 0x017600" "Addr: 0x017600" "0x017600"
9062179719-2185051 spiflash: field: "Data (256 bytes)"
9072179636-2185053 spiflash: pp: "Page program (addr 0x017600, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
9082185872-2185891 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9092185897-2185916 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
910Internal write enable latch is set.
911Block protection bits (BP3-BP0): 0x0.
912Device is not in continuously program mode (CP mode).
913Status register writes are allowed.
914"
ffa3848b
UH
9152185897-2185916 spiflash: field: "Status register"
9162185872-2185916 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9172185918-2185937 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
918Internal write enable latch is set.
919Block protection bits (BP3-BP0): 0x0.
920Device is not in continuously program mode (CP mode).
921Status register writes are allowed.
922"
ffa3848b
UH
9232185918-2185937 spiflash: field: "Status register"
9242185872-2185937 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9252230250-2230271 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9262230275-2230296 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
927Internal write enable latch is not set.
928Block protection bits (BP3-BP0): 0x0.
929Device is not in continuously program mode (CP mode).
930Status register writes are allowed.
931"
ffa3848b
UH
9322230275-2230296 spiflash: field: "Status register"
9332230250-2230296 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9342230296-2230317 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
935Internal write enable latch is not set.
936Block protection bits (BP3-BP0): 0x0.
937Device is not in continuously program mode (CP mode).
938Status register writes are allowed.
939"
ffa3848b
UH
9402230296-2230317 spiflash: field: "Status register"
9412230250-2230317 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9422274526-2274545 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
9432279738-2279759 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
9442279759-2279780 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
9452279780-2279801 spiflash: bit: "Address bits 15..8: 0x77" "Addr bits 15..8: 0x77" "Addr bits 15..8" "A15..A8"
9462279801-2279820 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
9472279759-2279820 spiflash: field: "Address: 0x017700" "Addr: 0x017700" "0x017700"
9482279822-2285155 spiflash: field: "Data (256 bytes)"
9492279738-2285155 spiflash: pp: "Page program (addr 0x017700, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
9502285865-2285884 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9512285890-2285909 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
952Internal write enable latch is set.
953Block protection bits (BP3-BP0): 0x0.
954Device is not in continuously program mode (CP mode).
955Status register writes are allowed.
956"
ffa3848b
UH
9572285890-2285909 spiflash: field: "Status register"
9582285865-2285909 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9592285911-2285930 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
960Internal write enable latch is set.
961Block protection bits (BP3-BP0): 0x0.
962Device is not in continuously program mode (CP mode).
963Status register writes are allowed.
964"
ffa3848b
UH
9652285911-2285930 spiflash: field: "Status register"
9662285865-2285930 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9672356730-2356749 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9682356755-2356774 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
969Internal write enable latch is not set.
970Block protection bits (BP3-BP0): 0x0.
971Device is not in continuously program mode (CP mode).
972Status register writes are allowed.
973"
ffa3848b
UH
9742356755-2356774 spiflash: field: "Status register"
9752356730-2356774 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9762356775-2356796 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
977Internal write enable latch is not set.
978Block protection bits (BP3-BP0): 0x0.
979Device is not in continuously program mode (CP mode).
980Status register writes are allowed.
981"
ffa3848b
UH
9822356775-2356796 spiflash: field: "Status register"
9832356730-2356796 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9842387394-2387415 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
9852392215-2392234 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
9862392235-2392256 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
9872392256-2392277 spiflash: bit: "Address bits 15..8: 0x78" "Addr bits 15..8: 0x78" "Addr bits 15..8" "A15..A8"
9882392277-2392298 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
9892392235-2392298 spiflash: field: "Address: 0x017800" "Addr: 0x017800" "0x017800"
9902392298-2397631 spiflash: field: "Data (256 bytes)"
9912392215-2397632 spiflash: pp: "Page program (addr 0x017800, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
9922398222-2398241 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
9932398247-2398266 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
994Internal write enable latch is set.
995Block protection bits (BP3-BP0): 0x0.
996Device is not in continuously program mode (CP mode).
997Status register writes are allowed.
998"
ffa3848b
UH
9992398247-2398266 spiflash: field: "Status register"
10002398222-2398266 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10012398267-2398288 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1002Internal write enable latch is set.
1003Block protection bits (BP3-BP0): 0x0.
1004Device is not in continuously program mode (CP mode).
1005Status register writes are allowed.
1006"
ffa3848b
UH
10072398267-2398288 spiflash: field: "Status register"
10082398222-2398288 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10092429571-2429592 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10102429596-2429617 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1011Internal write enable latch is not set.
1012Block protection bits (BP3-BP0): 0x0.
1013Device is not in continuously program mode (CP mode).
1014Status register writes are allowed.
1015"
ffa3848b
UH
10162429596-2429617 spiflash: field: "Status register"
10172429571-2429617 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10182429617-2429638 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1019Internal write enable latch is not set.
1020Block protection bits (BP3-BP0): 0x0.
1021Device is not in continuously program mode (CP mode).
1022Status register writes are allowed.
1023"
ffa3848b
UH
10242429617-2429638 spiflash: field: "Status register"
10252429571-2429638 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10262474901-2474922 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
10272479301-2479320 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
10282479321-2479342 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
10292479342-2479363 spiflash: bit: "Address bits 15..8: 0x79" "Addr bits 15..8: 0x79" "Addr bits 15..8" "A15..A8"
10302479363-2479384 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
10312479321-2479384 spiflash: field: "Address: 0x017900" "Addr: 0x017900" "0x017900"
10322479384-2484717 spiflash: field: "Data (256 bytes)"
10332479301-2484717 spiflash: pp: "Page program (addr 0x017900, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
10342485831-2485852 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10352485856-2485877 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1036Internal write enable latch is set.
1037Block protection bits (BP3-BP0): 0x0.
1038Device is not in continuously program mode (CP mode).
1039Status register writes are allowed.
1040"
ffa3848b
UH
10412485856-2485877 spiflash: field: "Status register"
10422485831-2485877 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10432485877-2485898 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1044Internal write enable latch is set.
1045Block protection bits (BP3-BP0): 0x0.
1046Device is not in continuously program mode (CP mode).
1047Status register writes are allowed.
1048"
ffa3848b
UH
10492485877-2485898 spiflash: field: "Status register"
10502485831-2485898 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10512530074-2530095 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10522530099-2530118 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1053Internal write enable latch is not set.
1054Block protection bits (BP3-BP0): 0x0.
1055Device is not in continuously program mode (CP mode).
1056Status register writes are allowed.
1057"
ffa3848b
UH
10582530099-2530118 spiflash: field: "Status register"
10592530074-2530118 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10602530120-2530139 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1061Internal write enable latch is not set.
1062Block protection bits (BP3-BP0): 0x0.
1063Device is not in continuously program mode (CP mode).
1064Status register writes are allowed.
1065"
ffa3848b
UH
10662530120-2530139 spiflash: field: "Status register"
10672530074-2530139 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10682579561-2579580 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
10692580708-2580729 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
10702580729-2580750 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
10712580750-2580769 spiflash: bit: "Address bits 15..8: 0x7a" "Addr bits 15..8: 0x7a" "Addr bits 15..8" "A15..A8"
10722580771-2580790 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
10732580729-2580790 spiflash: field: "Address: 0x017a00" "Addr: 0x017a00" "0x017a00"
10742580792-2586123 spiflash: field: "Data (256 bytes)"
10752580708-2586125 spiflash: pp: "Page program (addr 0x017a00, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
10762586843-2586864 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10772586868-2586889 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1078Internal write enable latch is set.
1079Block protection bits (BP3-BP0): 0x0.
1080Device is not in continuously program mode (CP mode).
1081Status register writes are allowed.
1082"
ffa3848b
UH
10832586868-2586889 spiflash: field: "Status register"
10842586843-2586889 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10852586889-2586908 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1086Internal write enable latch is set.
1087Block protection bits (BP3-BP0): 0x0.
1088Device is not in continuously program mode (CP mode).
1089Status register writes are allowed.
1090"
ffa3848b
UH
10912586889-2586908 spiflash: field: "Status register"
10922586843-2586908 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10932630058-2630079 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
10942630083-2630104 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1095Internal write enable latch is not set.
1096Block protection bits (BP3-BP0): 0x0.
1097Device is not in continuously program mode (CP mode).
1098Status register writes are allowed.
1099"
ffa3848b
UH
11002630083-2630104 spiflash: field: "Status register"
11012630058-2630104 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11022630104-2630125 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1103Internal write enable latch is not set.
1104Block protection bits (BP3-BP0): 0x0.
1105Device is not in continuously program mode (CP mode).
1106Status register writes are allowed.
1107"
ffa3848b
UH
11082630104-2630125 spiflash: field: "Status register"
11092630058-2630125 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11102674856-2674877 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
11112679689-2679708 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
11122679710-2679729 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
11132679731-2679750 spiflash: bit: "Address bits 15..8: 0x7b" "Addr bits 15..8: 0x7b" "Addr bits 15..8" "A15..A8"
11142679751-2679772 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
11152679710-2679772 spiflash: field: "Address: 0x017b00" "Addr: 0x017b00" "0x017b00"
11162679772-2685104 spiflash: field: "Data (256 bytes)"
11172679689-2685106 spiflash: pp: "Page program (addr 0x017b00, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
11182685805-2685824 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11192685830-2685849 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1120Internal write enable latch is set.
1121Block protection bits (BP3-BP0): 0x0.
1122Device is not in continuously program mode (CP mode).
1123Status register writes are allowed.
1124"
ffa3848b
UH
11252685830-2685849 spiflash: field: "Status register"
11262685805-2685849 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11272685850-2685871 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1128Internal write enable latch is set.
1129Block protection bits (BP3-BP0): 0x0.
1130Device is not in continuously program mode (CP mode).
1131Status register writes are allowed.
1132"
ffa3848b
UH
11332685850-2685871 spiflash: field: "Status register"
11342685805-2685871 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11352730569-2730588 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11362730594-2730613 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1137Internal write enable latch is not set.
1138Block protection bits (BP3-BP0): 0x0.
1139Device is not in continuously program mode (CP mode).
1140Status register writes are allowed.
1141"
ffa3848b
UH
11422730594-2730613 spiflash: field: "Status register"
11432730569-2730613 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11442730614-2730635 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1145Internal write enable latch is not set.
1146Block protection bits (BP3-BP0): 0x0.
1147Device is not in continuously program mode (CP mode).
1148Status register writes are allowed.
1149"
ffa3848b
UH
11502730614-2730635 spiflash: field: "Status register"
11512730569-2730635 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11522774844-2774863 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
11532779652-2779673 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
11542779673-2779692 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
11552779694-2779713 spiflash: bit: "Address bits 15..8: 0x7c" "Addr bits 15..8: 0x7c" "Addr bits 15..8" "A15..A8"
11562779715-2779734 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
11572779673-2779734 spiflash: field: "Address: 0x017c00" "Addr: 0x017c00" "0x017c00"
11582779735-2785067 spiflash: field: "Data (256 bytes)"
11592779652-2785069 spiflash: pp: "Page program (addr 0x017c00, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
11602785784-2785805 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11612785809-2785830 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1162Internal write enable latch is set.
1163Block protection bits (BP3-BP0): 0x0.
1164Device is not in continuously program mode (CP mode).
1165Status register writes are allowed.
1166"
ffa3848b
UH
11672785809-2785830 spiflash: field: "Status register"
11682785784-2785830 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11692785830-2785851 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1170Internal write enable latch is set.
1171Block protection bits (BP3-BP0): 0x0.
1172Device is not in continuously program mode (CP mode).
1173Status register writes are allowed.
1174"
ffa3848b
UH
11752785830-2785851 spiflash: field: "Status register"
11762785784-2785851 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11772830553-2830572 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11782830578-2830597 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1179Internal write enable latch is not set.
1180Block protection bits (BP3-BP0): 0x0.
1181Device is not in continuously program mode (CP mode).
1182Status register writes are allowed.
1183"
ffa3848b
UH
11842830578-2830597 spiflash: field: "Status register"
11852830553-2830597 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11862830598-2830619 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1187Internal write enable latch is not set.
1188Block protection bits (BP3-BP0): 0x0.
1189Device is not in continuously program mode (CP mode).
1190Status register writes are allowed.
1191"
ffa3848b
UH
11922830598-2830619 spiflash: field: "Status register"
11932830553-2830619 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
11942874827-2874848 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
11952879643-2879664 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
11962879664-2879683 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
11972879685-2879704 spiflash: bit: "Address bits 15..8: 0x7d" "Addr bits 15..8: 0x7d" "Addr bits 15..8" "A15..A8"
11982879706-2879725 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
11992879664-2879725 spiflash: field: "Address: 0x017d00" "Addr: 0x017d00" "0x017d00"
12002879726-2885058 spiflash: field: "Data (256 bytes)"
12012879643-2885060 spiflash: pp: "Page program (addr 0x017d00, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
12022885788-2885809 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12032885813-2885834 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1204Internal write enable latch is set.
1205Block protection bits (BP3-BP0): 0x0.
1206Device is not in continuously program mode (CP mode).
1207Status register writes are allowed.
1208"
ffa3848b
UH
12092885813-2885834 spiflash: field: "Status register"
12102885788-2885834 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12112885834-2885853 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1212Internal write enable latch is set.
1213Block protection bits (BP3-BP0): 0x0.
1214Device is not in continuously program mode (CP mode).
1215Status register writes are allowed.
1216"
ffa3848b
UH
12172885834-2885853 spiflash: field: "Status register"
12182885788-2885853 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12192930022-2930043 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12202930047-2930068 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1221Internal write enable latch is not set.
1222Block protection bits (BP3-BP0): 0x0.
1223Device is not in continuously program mode (CP mode).
1224Status register writes are allowed.
1225"
ffa3848b
UH
12262930047-2930068 spiflash: field: "Status register"
12272930022-2930068 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12282930068-2930087 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1229Internal write enable latch is not set.
1230Block protection bits (BP3-BP0): 0x0.
1231Device is not in continuously program mode (CP mode).
1232Status register writes are allowed.
1233"
ffa3848b
UH
12342930068-2930087 spiflash: field: "Status register"
12352930022-2930087 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12362976008-2976029 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
12372977946-2977965 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
12382977967-2977986 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
12392977988-2978007 spiflash: bit: "Address bits 15..8: 0x7e" "Addr bits 15..8: 0x7e" "Addr bits 15..8" "A15..A8"
12402978008-2978029 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
12412977967-2978029 spiflash: field: "Address: 0x017e00" "Addr: 0x017e00" "0x017e00"
12422978029-2983361 spiflash: field: "Data (256 bytes)"
12432977946-2983363 spiflash: pp: "Page program (addr 0x017e00, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
12442984184-2984203 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12452984209-2984228 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1246Internal write enable latch is set.
1247Block protection bits (BP3-BP0): 0x0.
1248Device is not in continuously program mode (CP mode).
1249Status register writes are allowed.
1250"
ffa3848b
UH
12512984209-2984228 spiflash: field: "Status register"
12522984184-2984228 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12532984230-2984249 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1254Internal write enable latch is set.
1255Block protection bits (BP3-BP0): 0x0.
1256Device is not in continuously program mode (CP mode).
1257Status register writes are allowed.
1258"
ffa3848b
UH
12592984230-2984249 spiflash: field: "Status register"
12602984184-2984249 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12613025330-3025351 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12623025355-3025376 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1263Internal write enable latch is not set.
1264Block protection bits (BP3-BP0): 0x0.
1265Device is not in continuously program mode (CP mode).
1266Status register writes are allowed.
1267"
ffa3848b
UH
12683025355-3025376 spiflash: field: "Status register"
12693025330-3025376 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12703025376-3025397 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1271Internal write enable latch is not set.
1272Block protection bits (BP3-BP0): 0x0.
1273Device is not in continuously program mode (CP mode).
1274Status register writes are allowed.
1275"
ffa3848b
UH
12763025376-3025397 spiflash: field: "Status register"
12773025330-3025397 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12783079515-3079534 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
12793080640-3080661 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
12803080661-3080682 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
12813080682-3080701 spiflash: bit: "Address bits 15..8: 0x7f" "Addr bits 15..8: 0x7f" "Addr bits 15..8" "A15..A8"
12823080703-3080722 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
12833080661-3080722 spiflash: field: "Address: 0x017f00" "Addr: 0x017f00" "0x017f00"
12843080724-3086055 spiflash: field: "Data (256 bytes)"
12853080640-3086057 spiflash: pp: "Page program (addr 0x017f00, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
12863086919-3086940 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12873086944-3086965 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1288Internal write enable latch is set.
1289Block protection bits (BP3-BP0): 0x0.
1290Device is not in continuously program mode (CP mode).
1291Status register writes are allowed.
1292"
ffa3848b
UH
12933086944-3086965 spiflash: field: "Status register"
12943086919-3086965 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
12953086965-3086986 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1296Internal write enable latch is set.
1297Block protection bits (BP3-BP0): 0x0.
1298Device is not in continuously program mode (CP mode).
1299Status register writes are allowed.
1300"
ffa3848b
UH
13013086965-3086986 spiflash: field: "Status register"
13023086919-3086986 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13033125334-3125353 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13043125359-3125378 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1305Internal write enable latch is not set.
1306Block protection bits (BP3-BP0): 0x0.
1307Device is not in continuously program mode (CP mode).
1308Status register writes are allowed.
1309"
ffa3848b
UH
13103125359-3125378 spiflash: field: "Status register"
13113125334-3125378 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13123125380-3125399 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1313Internal write enable latch is not set.
1314Block protection bits (BP3-BP0): 0x0.
1315Device is not in continuously program mode (CP mode).
1316Status register writes are allowed.
1317"
ffa3848b
UH
13183125380-3125399 spiflash: field: "Status register"
13193125334-3125399 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13203178059-3178080 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
13213183137-3183158 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
13223183158-3183177 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
13233183179-3183198 spiflash: bit: "Address bits 15..8: 0x80" "Addr bits 15..8: 0x80" "Addr bits 15..8" "A15..A8"
13243183200-3183219 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
13253183158-3183219 spiflash: field: "Address: 0x018000" "Addr: 0x018000" "0x018000"
13263183220-3189058 spiflash: field: "Data (256 bytes)"
13273183137-3189060 spiflash: pp: "Page program (addr 0x018000, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
13283190417-3190436 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13293190442-3190461 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1330Internal write enable latch is set.
1331Block protection bits (BP3-BP0): 0x0.
1332Device is not in continuously program mode (CP mode).
1333Status register writes are allowed.
1334"
ffa3848b
UH
13353190442-3190461 spiflash: field: "Status register"
13363190417-3190461 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13373190462-3190483 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1338Internal write enable latch is set.
1339Block protection bits (BP3-BP0): 0x0.
1340Device is not in continuously program mode (CP mode).
1341Status register writes are allowed.
1342"
ffa3848b
UH
13433190462-3190483 spiflash: field: "Status register"
13443190417-3190483 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13453230112-3230131 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13463230137-3230156 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1347Internal write enable latch is not set.
1348Block protection bits (BP3-BP0): 0x0.
1349Device is not in continuously program mode (CP mode).
1350Status register writes are allowed.
1351"
ffa3848b
UH
13523230137-3230156 spiflash: field: "Status register"
13533230112-3230156 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13543230158-3230177 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1355Internal write enable latch is not set.
1356Block protection bits (BP3-BP0): 0x0.
1357Device is not in continuously program mode (CP mode).
1358Status register writes are allowed.
1359"
ffa3848b
UH
13603230158-3230177 spiflash: field: "Status register"
13613230112-3230177 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13623274767-3274786 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
13633279585-3279604 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
13643279606-3279625 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
13653279627-3279646 spiflash: bit: "Address bits 15..8: 0x81" "Addr bits 15..8: 0x81" "Addr bits 15..8" "A15..A8"
13663279647-3279668 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
13673279606-3279668 spiflash: field: "Address: 0x018100" "Addr: 0x018100" "0x018100"
13683279668-3285000 spiflash: field: "Data (256 bytes)"
13693279585-3285002 spiflash: pp: "Page program (addr 0x018100, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
13703285712-3285731 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13713285737-3285756 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1372Internal write enable latch is set.
1373Block protection bits (BP3-BP0): 0x0.
1374Device is not in continuously program mode (CP mode).
1375Status register writes are allowed.
1376"
ffa3848b
UH
13773285737-3285756 spiflash: field: "Status register"
13783285712-3285756 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13793285758-3285777 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1380Internal write enable latch is set.
1381Block protection bits (BP3-BP0): 0x0.
1382Device is not in continuously program mode (CP mode).
1383Status register writes are allowed.
1384"
ffa3848b
UH
13853285758-3285777 spiflash: field: "Status register"
13863285712-3285777 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13873325298-3325317 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13883325323-3325342 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1389Internal write enable latch is not set.
1390Block protection bits (BP3-BP0): 0x0.
1391Device is not in continuously program mode (CP mode).
1392Status register writes are allowed.
1393"
ffa3848b
UH
13943325323-3325342 spiflash: field: "Status register"
13953325298-3325342 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
13963325343-3325364 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1397Internal write enable latch is not set.
1398Block protection bits (BP3-BP0): 0x0.
1399Device is not in continuously program mode (CP mode).
1400Status register writes are allowed.
1401"
ffa3848b
UH
14023325343-3325364 spiflash: field: "Status register"
14033325298-3325364 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14043374877-3374896 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
14053379573-3379592 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
14063379594-3379613 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
14073379614-3379635 spiflash: bit: "Address bits 15..8: 0x82" "Addr bits 15..8: 0x82" "Addr bits 15..8" "A15..A8"
14083379635-3379656 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
14093379594-3379656 spiflash: field: "Address: 0x018200" "Addr: 0x018200" "0x018200"
14103379656-3384989 spiflash: field: "Data (256 bytes)"
14113379573-3384990 spiflash: pp: "Page program (addr 0x018200, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
14123385713-3385734 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14133385738-3385759 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1414Internal write enable latch is set.
1415Block protection bits (BP3-BP0): 0x0.
1416Device is not in continuously program mode (CP mode).
1417Status register writes are allowed.
1418"
ffa3848b
UH
14193385738-3385759 spiflash: field: "Status register"
14203385713-3385759 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14213385759-3385780 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1422Internal write enable latch is set.
1423Block protection bits (BP3-BP0): 0x0.
1424Device is not in continuously program mode (CP mode).
1425Status register writes are allowed.
1426"
ffa3848b
UH
14273385759-3385780 spiflash: field: "Status register"
14283385713-3385780 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14293425281-3425300 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14303425306-3425325 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1431Internal write enable latch is not set.
1432Block protection bits (BP3-BP0): 0x0.
1433Device is not in continuously program mode (CP mode).
1434Status register writes are allowed.
1435"
ffa3848b
UH
14363425306-3425325 spiflash: field: "Status register"
14373425281-3425325 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14383425327-3425346 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1439Internal write enable latch is not set.
1440Block protection bits (BP3-BP0): 0x0.
1441Device is not in continuously program mode (CP mode).
1442Status register writes are allowed.
1443"
ffa3848b
UH
14443425327-3425346 spiflash: field: "Status register"
14453425281-3425346 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14463479446-3479465 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
14473480720-3480739 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
14483480741-3480760 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
14493480762-3480781 spiflash: bit: "Address bits 15..8: 0x83" "Addr bits 15..8: 0x83" "Addr bits 15..8" "A15..A8"
14503480782-3480803 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
14513480741-3480803 spiflash: field: "Address: 0x018300" "Addr: 0x018300" "0x018300"
14523480803-3486135 spiflash: field: "Data (256 bytes)"
14533480720-3486137 spiflash: pp: "Page program (addr 0x018300, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
14543486863-3486882 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14553486888-3486907 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1456Internal write enable latch is set.
1457Block protection bits (BP3-BP0): 0x0.
1458Device is not in continuously program mode (CP mode).
1459Status register writes are allowed.
1460"
ffa3848b
UH
14613486888-3486907 spiflash: field: "Status register"
14623486863-3486907 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14633486909-3486928 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1464Internal write enable latch is set.
1465Block protection bits (BP3-BP0): 0x0.
1466Device is not in continuously program mode (CP mode).
1467Status register writes are allowed.
1468"
ffa3848b
UH
14693486909-3486928 spiflash: field: "Status register"
14703486863-3486928 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14713525265-3525286 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14723525290-3525311 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1473Internal write enable latch is not set.
1474Block protection bits (BP3-BP0): 0x0.
1475Device is not in continuously program mode (CP mode).
1476Status register writes are allowed.
1477"
ffa3848b
UH
14783525290-3525311 spiflash: field: "Status register"
14793525265-3525311 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14803525311-3525332 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1481Internal write enable latch is not set.
1482Block protection bits (BP3-BP0): 0x0.
1483Device is not in continuously program mode (CP mode).
1484Status register writes are allowed.
1485"
ffa3848b
UH
14863525311-3525332 spiflash: field: "Status register"
14873525265-3525332 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14883574741-3574760 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
14893579545-3579566 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
14903579566-3579587 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
14913579587-3579606 spiflash: bit: "Address bits 15..8: 0x84" "Addr bits 15..8: 0x84" "Addr bits 15..8" "A15..A8"
14923579608-3579627 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
14933579566-3579627 spiflash: field: "Address: 0x018400" "Addr: 0x018400" "0x018400"
14943579629-3584960 spiflash: field: "Data (256 bytes)"
14953579545-3584962 spiflash: pp: "Page program (addr 0x018400, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
14963585674-3585695 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
14973585699-3585720 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1498Internal write enable latch is set.
1499Block protection bits (BP3-BP0): 0x0.
1500Device is not in continuously program mode (CP mode).
1501Status register writes are allowed.
1502"
ffa3848b
UH
15033585699-3585720 spiflash: field: "Status register"
15043585674-3585720 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15053585720-3585741 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1506Internal write enable latch is set.
1507Block protection bits (BP3-BP0): 0x0.
1508Device is not in continuously program mode (CP mode).
1509Status register writes are allowed.
1510"
ffa3848b
UH
15113585720-3585741 spiflash: field: "Status register"
15123585674-3585741 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15133630452-3630471 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15143630477-3630496 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1515Internal write enable latch is not set.
1516Block protection bits (BP3-BP0): 0x0.
1517Device is not in continuously program mode (CP mode).
1518Status register writes are allowed.
1519"
ffa3848b
UH
15203630477-3630496 spiflash: field: "Status register"
15213630452-3630496 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15223630497-3630518 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1523Internal write enable latch is not set.
1524Block protection bits (BP3-BP0): 0x0.
1525Device is not in continuously program mode (CP mode).
1526Status register writes are allowed.
1527"
ffa3848b
UH
15283630497-3630518 spiflash: field: "Status register"
15293630452-3630518 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15303674336-3674357 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
15313679541-3679560 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
15323679562-3679581 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
15333679583-3679602 spiflash: bit: "Address bits 15..8: 0x85" "Addr bits 15..8: 0x85" "Addr bits 15..8" "A15..A8"
15343679603-3679624 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
15353679562-3679624 spiflash: field: "Address: 0x018500" "Addr: 0x018500" "0x018500"
15363679624-3684956 spiflash: field: "Data (256 bytes)"
15373679541-3684958 spiflash: pp: "Page program (addr 0x018500, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
15383685697-3685716 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15393685722-3685741 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1540Internal write enable latch is set.
1541Block protection bits (BP3-BP0): 0x0.
1542Device is not in continuously program mode (CP mode).
1543Status register writes are allowed.
1544"
ffa3848b
UH
15453685722-3685741 spiflash: field: "Status register"
15463685697-3685741 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15473685742-3685763 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1548Internal write enable latch is set.
1549Block protection bits (BP3-BP0): 0x0.
1550Device is not in continuously program mode (CP mode).
1551Status register writes are allowed.
1552"
ffa3848b
UH
15533685742-3685763 spiflash: field: "Status register"
15543685697-3685763 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15553725246-3725267 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15563725271-3725292 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1557Internal write enable latch is not set.
1558Block protection bits (BP3-BP0): 0x0.
1559Device is not in continuously program mode (CP mode).
1560Status register writes are allowed.
1561"
ffa3848b
UH
15623725271-3725292 spiflash: field: "Status register"
15633725246-3725292 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15643725292-3725311 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1565Internal write enable latch is not set.
1566Block protection bits (BP3-BP0): 0x0.
1567Device is not in continuously program mode (CP mode).
1568Status register writes are allowed.
1569"
ffa3848b
UH
15703725292-3725311 spiflash: field: "Status register"
15713725246-3725311 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15723774715-3774736 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
15733779523-3779542 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
15743779544-3779563 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
15753779564-3779585 spiflash: bit: "Address bits 15..8: 0x86" "Addr bits 15..8: 0x86" "Addr bits 15..8" "A15..A8"
15763779585-3779606 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
15773779544-3779606 spiflash: field: "Address: 0x018600" "Addr: 0x018600" "0x018600"
15783779606-3784939 spiflash: field: "Data (256 bytes)"
15793779523-3784940 spiflash: pp: "Page program (addr 0x018600, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
15803784954-3784975 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15813784979-3785000 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1582Internal write enable latch is set.
1583Block protection bits (BP3-BP0): 0x0.
1584Device is not in continuously program mode (CP mode).
1585Status register writes are allowed.
1586"
ffa3848b
UH
15873784979-3785000 spiflash: field: "Status register"
15883784954-3785000 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15893785000-3785021 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1590Internal write enable latch is set.
1591Block protection bits (BP3-BP0): 0x0.
1592Device is not in continuously program mode (CP mode).
1593Status register writes are allowed.
1594"
ffa3848b
UH
15953785000-3785021 spiflash: field: "Status register"
15963784954-3785021 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15973825313-3825332 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
15983825338-3825357 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1599Internal write enable latch is not set.
1600Block protection bits (BP3-BP0): 0x0.
1601Device is not in continuously program mode (CP mode).
1602Status register writes are allowed.
1603"
ffa3848b
UH
16043825338-3825357 spiflash: field: "Status register"
16053825313-3825357 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16063825359-3825378 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1607Internal write enable latch is not set.
1608Block protection bits (BP3-BP0): 0x0.
1609Device is not in continuously program mode (CP mode).
1610Status register writes are allowed.
1611"
ffa3848b
UH
16123825359-3825378 spiflash: field: "Status register"
16133825313-3825378 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16143874701-3874720 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
16153879113-3879132 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
16163879133-3879154 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
16173879154-3879175 spiflash: bit: "Address bits 15..8: 0x87" "Addr bits 15..8: 0x87" "Addr bits 15..8" "A15..A8"
16183879175-3879196 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
16193879133-3879196 spiflash: field: "Address: 0x018700" "Addr: 0x018700" "0x018700"
16203879196-3884529 spiflash: field: "Data (256 bytes)"
16213879113-3884530 spiflash: pp: "Page program (addr 0x018700, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
16223885641-3885662 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16233885666-3885687 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1624Internal write enable latch is set.
1625Block protection bits (BP3-BP0): 0x0.
1626Device is not in continuously program mode (CP mode).
1627Status register writes are allowed.
1628"
ffa3848b
UH
16293885666-3885687 spiflash: field: "Status register"
16303885641-3885687 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16313885687-3885708 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1632Internal write enable latch is set.
1633Block protection bits (BP3-BP0): 0x0.
1634Device is not in continuously program mode (CP mode).
1635Status register writes are allowed.
1636"
ffa3848b
UH
16373885687-3885708 spiflash: field: "Status register"
16383885641-3885708 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16393930025-3930044 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16403930050-3930069 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1641Internal write enable latch is not set.
1642Block protection bits (BP3-BP0): 0x0.
1643Device is not in continuously program mode (CP mode).
1644Status register writes are allowed.
1645"
ffa3848b
UH
16463930050-3930069 spiflash: field: "Status register"
16473930025-3930069 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16483930071-3930090 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1649Internal write enable latch is not set.
1650Block protection bits (BP3-BP0): 0x0.
1651Device is not in continuously program mode (CP mode).
1652Status register writes are allowed.
1653"
ffa3848b
UH
16543930071-3930090 spiflash: field: "Status register"
16553930025-3930090 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16563974690-3974709 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
16573979492-3979513 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
16583979513-3979532 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
16593979534-3979553 spiflash: bit: "Address bits 15..8: 0x88" "Addr bits 15..8: 0x88" "Addr bits 15..8" "A15..A8"
16603979555-3979574 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
16613979513-3979574 spiflash: field: "Address: 0x018800" "Addr: 0x018800" "0x018800"
16623979575-3984907 spiflash: field: "Data (256 bytes)"
16633979492-3984909 spiflash: pp: "Page program (addr 0x018800, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
16643985623-3985642 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16653985648-3985667 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1666Internal write enable latch is set.
1667Block protection bits (BP3-BP0): 0x0.
1668Device is not in continuously program mode (CP mode).
1669Status register writes are allowed.
1670"
ffa3848b
UH
16713985648-3985667 spiflash: field: "Status register"
16723985623-3985667 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16733985669-3985688 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1674Internal write enable latch is set.
1675Block protection bits (BP3-BP0): 0x0.
1676Device is not in continuously program mode (CP mode).
1677Status register writes are allowed.
1678"
ffa3848b
UH
16793985669-3985688 spiflash: field: "Status register"
16803985623-3985688 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16814029872-4029893 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16824029897-4029918 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1683Internal write enable latch is not set.
1684Block protection bits (BP3-BP0): 0x0.
1685Device is not in continuously program mode (CP mode).
1686Status register writes are allowed.
1687"
ffa3848b
UH
16884029897-4029918 spiflash: field: "Status register"
16894029872-4029918 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16904029918-4029937 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1691Internal write enable latch is not set.
1692Block protection bits (BP3-BP0): 0x0.
1693Device is not in continuously program mode (CP mode).
1694Status register writes are allowed.
1695"
ffa3848b
UH
16964029918-4029937 spiflash: field: "Status register"
16974029872-4029937 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
16984074670-4074689 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
16994079478-4079499 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
17004079499-4079518 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
17014079520-4079539 spiflash: bit: "Address bits 15..8: 0x89" "Addr bits 15..8: 0x89" "Addr bits 15..8" "A15..A8"
17024079541-4079560 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
17034079499-4079560 spiflash: field: "Address: 0x018900" "Addr: 0x018900" "0x018900"
17044079561-4084893 spiflash: field: "Data (256 bytes)"
17054079478-4084895 spiflash: pp: "Page program (addr 0x018900, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
17064085601-4085622 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17074085626-4085647 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1708Internal write enable latch is set.
1709Block protection bits (BP3-BP0): 0x0.
1710Device is not in continuously program mode (CP mode).
1711Status register writes are allowed.
1712"
ffa3848b
UH
17134085626-4085647 spiflash: field: "Status register"
17144085601-4085647 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17154085647-4085668 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1716Internal write enable latch is set.
1717Block protection bits (BP3-BP0): 0x0.
1718Device is not in continuously program mode (CP mode).
1719Status register writes are allowed.
1720"
ffa3848b
UH
17214085647-4085668 spiflash: field: "Status register"
17224085601-4085668 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17234129996-4130015 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17244130021-4130040 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1725Internal write enable latch is not set.
1726Block protection bits (BP3-BP0): 0x0.
1727Device is not in continuously program mode (CP mode).
1728Status register writes are allowed.
1729"
ffa3848b
UH
17304130021-4130040 spiflash: field: "Status register"
17314129996-4130040 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17324130042-4130061 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1733Internal write enable latch is not set.
1734Block protection bits (BP3-BP0): 0x0.
1735Device is not in continuously program mode (CP mode).
1736Status register writes are allowed.
1737"
ffa3848b
UH
17384130042-4130061 spiflash: field: "Status register"
17394129996-4130061 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17404174670-4174689 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
17414179463-4179482 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
17424179484-4179503 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
17434179505-4179524 spiflash: bit: "Address bits 15..8: 0x8a" "Addr bits 15..8: 0x8a" "Addr bits 15..8" "A15..A8"
17444179525-4179546 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
17454179484-4179546 spiflash: field: "Address: 0x018a00" "Addr: 0x018a00" "0x018a00"
17464179546-4184878 spiflash: field: "Data (256 bytes)"
17474179463-4184880 spiflash: pp: "Page program (addr 0x018a00, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
17484185584-4185603 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17494185609-4185628 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1750Internal write enable latch is set.
1751Block protection bits (BP3-BP0): 0x0.
1752Device is not in continuously program mode (CP mode).
1753Status register writes are allowed.
1754"
ffa3848b
UH
17554185609-4185628 spiflash: field: "Status register"
17564185584-4185628 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17574185629-4185650 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1758Internal write enable latch is set.
1759Block protection bits (BP3-BP0): 0x0.
1760Device is not in continuously program mode (CP mode).
1761Status register writes are allowed.
1762"
ffa3848b
UH
17634185629-4185650 spiflash: field: "Status register"
17644185584-4185650 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17654230365-4230384 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17664230390-4230409 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1767Internal write enable latch is not set.
1768Block protection bits (BP3-BP0): 0x0.
1769Device is not in continuously program mode (CP mode).
1770Status register writes are allowed.
1771"
ffa3848b
UH
17724230390-4230409 spiflash: field: "Status register"
17734230365-4230409 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17744230410-4230430 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1775Internal write enable latch is not set.
1776Block protection bits (BP3-BP0): 0x0.
1777Device is not in continuously program mode (CP mode).
1778Status register writes are allowed.
1779"
ffa3848b
UH
17804230410-4230430 spiflash: field: "Status register"
17814230365-4230430 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17824274637-4274656 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
17834279078-4279097 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
17844279099-4279118 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
17854279119-4279140 spiflash: bit: "Address bits 15..8: 0x8b" "Addr bits 15..8: 0x8b" "Addr bits 15..8" "A15..A8"
17864279140-4279161 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
17874279099-4279161 spiflash: field: "Address: 0x018b00" "Addr: 0x018b00" "0x018b00"
17884279161-4284494 spiflash: field: "Data (256 bytes)"
17894279078-4284495 spiflash: pp: "Page program (addr 0x018b00, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
17904285583-4285602 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17914285608-4285627 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1792Internal write enable latch is set.
1793Block protection bits (BP3-BP0): 0x0.
1794Device is not in continuously program mode (CP mode).
1795Status register writes are allowed.
1796"
ffa3848b
UH
17974285608-4285627 spiflash: field: "Status register"
17984285583-4285627 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
17994285628-4285649 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1800Internal write enable latch is set.
1801Block protection bits (BP3-BP0): 0x0.
1802Device is not in continuously program mode (CP mode).
1803Status register writes are allowed.
1804"
ffa3848b
UH
18054285628-4285649 spiflash: field: "Status register"
18064285583-4285649 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18074325155-4325176 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18084325180-4325201 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1809Internal write enable latch is not set.
1810Block protection bits (BP3-BP0): 0x0.
1811Device is not in continuously program mode (CP mode).
1812Status register writes are allowed.
1813"
ffa3848b
UH
18144325180-4325201 spiflash: field: "Status register"
18154325155-4325201 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18164325201-4325220 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1817Internal write enable latch is not set.
1818Block protection bits (BP3-BP0): 0x0.
1819Device is not in continuously program mode (CP mode).
1820Status register writes are allowed.
1821"
ffa3848b
UH
18224325201-4325220 spiflash: field: "Status register"
18234325155-4325220 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18244379316-4379335 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
18254380460-4380479 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
18264380480-4380501 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
18274380501-4380522 spiflash: bit: "Address bits 15..8: 0x8c" "Addr bits 15..8: 0x8c" "Addr bits 15..8" "A15..A8"
18284380522-4380543 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
18294380480-4380543 spiflash: field: "Address: 0x018c00" "Addr: 0x018c00" "0x018c00"
18304380543-4385876 spiflash: field: "Data (256 bytes)"
18314380460-4385877 spiflash: pp: "Page program (addr 0x018c00, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
18324386738-4386757 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18334386763-4386782 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1834Internal write enable latch is set.
1835Block protection bits (BP3-BP0): 0x0.
1836Device is not in continuously program mode (CP mode).
1837Status register writes are allowed.
1838"
ffa3848b
UH
18394386763-4386782 spiflash: field: "Status register"
18404386738-4386782 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18414386784-4386803 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1842Internal write enable latch is set.
1843Block protection bits (BP3-BP0): 0x0.
1844Device is not in continuously program mode (CP mode).
1845Status register writes are allowed.
1846"
ffa3848b
UH
18474386784-4386803 spiflash: field: "Status register"
18484386738-4386803 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18494425137-4425158 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18504425162-4425183 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1851Internal write enable latch is not set.
1852Block protection bits (BP3-BP0): 0x0.
1853Device is not in continuously program mode (CP mode).
1854Status register writes are allowed.
1855"
ffa3848b
UH
18564425162-4425183 spiflash: field: "Status register"
18574425137-4425183 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18584425183-4425204 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1859Internal write enable latch is not set.
1860Block protection bits (BP3-BP0): 0x0.
1861Device is not in continuously program mode (CP mode).
1862Status register writes are allowed.
1863"
ffa3848b
UH
18644425183-4425204 spiflash: field: "Status register"
18654425137-4425204 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18664474610-4474629 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
18674479426-4479447 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
18684479447-4479466 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
18694479468-4479487 spiflash: bit: "Address bits 15..8: 0x8d" "Addr bits 15..8: 0x8d" "Addr bits 15..8" "A15..A8"
18704479489-4479508 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
18714479447-4479508 spiflash: field: "Address: 0x018d00" "Addr: 0x018d00" "0x018d00"
18724479509-4484841 spiflash: field: "Data (256 bytes)"
18734479426-4484843 spiflash: pp: "Page program (addr 0x018d00, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
18744485563-4485584 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18754485588-4485609 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1876Internal write enable latch is set.
1877Block protection bits (BP3-BP0): 0x0.
1878Device is not in continuously program mode (CP mode).
1879Status register writes are allowed.
1880"
ffa3848b
UH
18814485588-4485609 spiflash: field: "Status register"
18824485563-4485609 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18834485609-4485630 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1884Internal write enable latch is set.
1885Block protection bits (BP3-BP0): 0x0.
1886Device is not in continuously program mode (CP mode).
1887Status register writes are allowed.
1888"
ffa3848b
UH
18894485609-4485630 spiflash: field: "Status register"
18904485563-4485630 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18914529940-4529959 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
18924529965-4529984 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1893Internal write enable latch is not set.
1894Block protection bits (BP3-BP0): 0x0.
1895Device is not in continuously program mode (CP mode).
1896Status register writes are allowed.
1897"
ffa3848b
UH
18984529965-4529984 spiflash: field: "Status register"
18994529940-4529984 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19004529985-4530006 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1901Internal write enable latch is not set.
1902Block protection bits (BP3-BP0): 0x0.
1903Device is not in continuously program mode (CP mode).
1904Status register writes are allowed.
1905"
ffa3848b
UH
19064529985-4530006 spiflash: field: "Status register"
19074529940-4530006 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19084574496-4574517 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
19094579413-4579432 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
19104579434-4579453 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
19114579455-4579474 spiflash: bit: "Address bits 15..8: 0x8e" "Addr bits 15..8: 0x8e" "Addr bits 15..8" "A15..A8"
19124579475-4579496 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
19134579434-4579496 spiflash: field: "Address: 0x018e00" "Addr: 0x018e00" "0x018e00"
19144579496-4584828 spiflash: field: "Data (256 bytes)"
19154579413-4584830 spiflash: pp: "Page program (addr 0x018e00, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
19164585545-4585564 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19174585570-4585589 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1918Internal write enable latch is set.
1919Block protection bits (BP3-BP0): 0x0.
1920Device is not in continuously program mode (CP mode).
1921Status register writes are allowed.
1922"
ffa3848b
UH
19234585570-4585589 spiflash: field: "Status register"
19244585545-4585589 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19254585591-4585610 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1926Internal write enable latch is set.
1927Block protection bits (BP3-BP0): 0x0.
1928Device is not in continuously program mode (CP mode).
1929Status register writes are allowed.
1930"
ffa3848b
UH
19314585591-4585610 spiflash: field: "Status register"
19324585545-4585610 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19334625109-4625128 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19344625134-4625153 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1935Internal write enable latch is not set.
1936Block protection bits (BP3-BP0): 0x0.
1937Device is not in continuously program mode (CP mode).
1938Status register writes are allowed.
1939"
ffa3848b
UH
19404625134-4625153 spiflash: field: "Status register"
19414625109-4625153 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19424625154-4625175 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1943Internal write enable latch is not set.
1944Block protection bits (BP3-BP0): 0x0.
1945Device is not in continuously program mode (CP mode).
1946Status register writes are allowed.
1947"
ffa3848b
UH
19484625154-4625175 spiflash: field: "Status register"
19494625109-4625175 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19504677707-4677728 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
19514682601-4682620 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
19524682621-4682642 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
19534682642-4682663 spiflash: bit: "Address bits 15..8: 0x8f" "Addr bits 15..8: 0x8f" "Addr bits 15..8" "A15..A8"
19544682663-4682684 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
19554682621-4682684 spiflash: field: "Address: 0x018f00" "Addr: 0x018f00" "0x018f00"
19564682684-4688017 spiflash: field: "Data (256 bytes)"
19574682601-4688018 spiflash: pp: "Page program (addr 0x018f00, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
19584688667-4688688 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19594688692-4688713 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1960Internal write enable latch is set.
1961Block protection bits (BP3-BP0): 0x0.
1962Device is not in continuously program mode (CP mode).
1963Status register writes are allowed.
1964"
ffa3848b
UH
19654688692-4688713 spiflash: field: "Status register"
19664688667-4688713 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19674688713-4688734 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
1968Internal write enable latch is set.
1969Block protection bits (BP3-BP0): 0x0.
1970Device is not in continuously program mode (CP mode).
1971Status register writes are allowed.
1972"
ffa3848b
UH
19734688713-4688734 spiflash: field: "Status register"
19744688667-4688734 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19754726654-4726675 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19764726679-4726700 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1977Internal write enable latch is not set.
1978Block protection bits (BP3-BP0): 0x0.
1979Device is not in continuously program mode (CP mode).
1980Status register writes are allowed.
1981"
ffa3848b
UH
19824726679-4726700 spiflash: field: "Status register"
19834726654-4726700 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19844726700-4726721 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
1985Internal write enable latch is not set.
1986Block protection bits (BP3-BP0): 0x0.
1987Device is not in continuously program mode (CP mode).
1988Status register writes are allowed.
1989"
ffa3848b
UH
19904726700-4726721 spiflash: field: "Status register"
19914726654-4726721 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
19924775103-4775122 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
19934778845-4778866 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
19944778866-4778887 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
19954778887-4778906 spiflash: bit: "Address bits 15..8: 0x90" "Addr bits 15..8: 0x90" "Addr bits 15..8" "A15..A8"
19964778908-4778927 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
19974778866-4778927 spiflash: field: "Address: 0x019000" "Addr: 0x019000" "0x019000"
19984778928-4784260 spiflash: field: "Data (256 bytes)"
19994778845-4784262 spiflash: pp: "Page program (addr 0x019000, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
20004785510-4785529 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20014785535-4785554 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2002Internal write enable latch is set.
2003Block protection bits (BP3-BP0): 0x0.
2004Device is not in continuously program mode (CP mode).
2005Status register writes are allowed.
2006"
ffa3848b
UH
20074785535-4785554 spiflash: field: "Status register"
20084785510-4785554 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20094785556-4785575 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2010Internal write enable latch is set.
2011Block protection bits (BP3-BP0): 0x0.
2012Device is not in continuously program mode (CP mode).
2013Status register writes are allowed.
2014"
ffa3848b
UH
20154785556-4785575 spiflash: field: "Status register"
20164785510-4785575 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20174830296-4830315 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20184830321-4830340 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2019Internal write enable latch is not set.
2020Block protection bits (BP3-BP0): 0x0.
2021Device is not in continuously program mode (CP mode).
2022Status register writes are allowed.
2023"
ffa3848b
UH
20244830321-4830340 spiflash: field: "Status register"
20254830296-4830340 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20264830341-4830362 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2027Internal write enable latch is not set.
2028Block protection bits (BP3-BP0): 0x0.
2029Device is not in continuously program mode (CP mode).
2030Status register writes are allowed.
2031"
ffa3848b
UH
20324830341-4830362 spiflash: field: "Status register"
20334830296-4830362 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20344879270-4879289 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
20354880500-4880520 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
20364880520-4880541 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
20374880541-4880562 spiflash: bit: "Address bits 15..8: 0x91" "Addr bits 15..8: 0x91" "Addr bits 15..8" "A15..A8"
20384880562-4880583 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
20394880520-4880583 spiflash: field: "Address: 0x019100" "Addr: 0x019100" "0x019100"
20404880583-4885916 spiflash: field: "Data (256 bytes)"
20414880500-4885916 spiflash: pp: "Page program (addr 0x019100, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
20424886675-4886694 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20434886700-4886719 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2044Internal write enable latch is set.
2045Block protection bits (BP3-BP0): 0x0.
2046Device is not in continuously program mode (CP mode).
2047Status register writes are allowed.
2048"
ffa3848b
UH
20494886700-4886719 spiflash: field: "Status register"
20504886675-4886719 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20514886721-4886740 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2052Internal write enable latch is set.
2053Block protection bits (BP3-BP0): 0x0.
2054Device is not in continuously program mode (CP mode).
2055Status register writes are allowed.
2056"
ffa3848b
UH
20574886721-4886740 spiflash: field: "Status register"
20584886675-4886740 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20594925091-4925112 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20604925116-4925137 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2061Internal write enable latch is not set.
2062Block protection bits (BP3-BP0): 0x0.
2063Device is not in continuously program mode (CP mode).
2064Status register writes are allowed.
2065"
ffa3848b
UH
20664925116-4925137 spiflash: field: "Status register"
20674925091-4925137 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20684925137-4925156 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2069Internal write enable latch is not set.
2070Block protection bits (BP3-BP0): 0x0.
2071Device is not in continuously program mode (CP mode).
2072Status register writes are allowed.
2073"
ffa3848b
UH
20744925137-4925156 spiflash: field: "Status register"
20754925091-4925156 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20764974546-4974567 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
20774978438-4978459 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
20784978459-4978478 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
20794978480-4978499 spiflash: bit: "Address bits 15..8: 0x92" "Addr bits 15..8: 0x92" "Addr bits 15..8" "A15..A8"
20804978501-4978520 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
20814978459-4978520 spiflash: field: "Address: 0x019200" "Addr: 0x019200" "0x019200"
20824978521-4983853 spiflash: field: "Data (256 bytes)"
20834978438-4983855 spiflash: pp: "Page program (addr 0x019200, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
20844983870-4983889 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20854983895-4983914 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2086Internal write enable latch is set.
2087Block protection bits (BP3-BP0): 0x0.
2088Device is not in continuously program mode (CP mode).
2089Status register writes are allowed.
2090"
ffa3848b
UH
20914983895-4983914 spiflash: field: "Status register"
20924983870-4983914 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
20934983916-4983936 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2094Internal write enable latch is set.
2095Block protection bits (BP3-BP0): 0x0.
2096Device is not in continuously program mode (CP mode).
2097Status register writes are allowed.
2098"
ffa3848b
UH
20994983916-4983936 spiflash: field: "Status register"
21004983870-4983936 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21015029741-5029762 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21025029766-5029787 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2103Internal write enable latch is not set.
2104Block protection bits (BP3-BP0): 0x0.
2105Device is not in continuously program mode (CP mode).
2106Status register writes are allowed.
2107"
ffa3848b
UH
21085029766-5029787 spiflash: field: "Status register"
21095029741-5029787 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21105029787-5029806 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2111Internal write enable latch is not set.
2112Block protection bits (BP3-BP0): 0x0.
2113Device is not in continuously program mode (CP mode).
2114Status register writes are allowed.
2115"
ffa3848b
UH
21165029787-5029806 spiflash: field: "Status register"
21175029741-5029806 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21185074528-5074549 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
21195079343-5079362 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
21205079364-5079383 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
21215079385-5079404 spiflash: bit: "Address bits 15..8: 0x93" "Addr bits 15..8: 0x93" "Addr bits 15..8" "A15..A8"
21225079405-5079426 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
21235079364-5079426 spiflash: field: "Address: 0x019300" "Addr: 0x019300" "0x019300"
21245079426-5084758 spiflash: field: "Data (256 bytes)"
21255079343-5084760 spiflash: pp: "Page program (addr 0x019300, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
21265085472-5085491 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21275085497-5085516 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2128Internal write enable latch is set.
2129Block protection bits (BP3-BP0): 0x0.
2130Device is not in continuously program mode (CP mode).
2131Status register writes are allowed.
2132"
ffa3848b
UH
21335085497-5085516 spiflash: field: "Status register"
21345085472-5085516 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21355085518-5085537 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2136Internal write enable latch is set.
2137Block protection bits (BP3-BP0): 0x0.
2138Device is not in continuously program mode (CP mode).
2139Status register writes are allowed.
2140"
ffa3848b
UH
21415085518-5085537 spiflash: field: "Status register"
21425085472-5085537 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21435124945-5124966 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21445124970-5124991 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2145Internal write enable latch is not set.
2146Block protection bits (BP3-BP0): 0x0.
2147Device is not in continuously program mode (CP mode).
2148Status register writes are allowed.
2149"
ffa3848b
UH
21505124970-5124991 spiflash: field: "Status register"
21515124945-5124991 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21525124991-5125012 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2153Internal write enable latch is not set.
2154Block protection bits (BP3-BP0): 0x0.
2155Device is not in continuously program mode (CP mode).
2156Status register writes are allowed.
2157"
ffa3848b
UH
21585124991-5125012 spiflash: field: "Status register"
21595124945-5125012 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21605174618-5174639 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
21615179319-5179340 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
21625179340-5179359 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
21635179361-5179380 spiflash: bit: "Address bits 15..8: 0x94" "Addr bits 15..8: 0x94" "Addr bits 15..8" "A15..A8"
21645179382-5179402 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
21655179340-5179402 spiflash: field: "Address: 0x019400" "Addr: 0x019400" "0x019400"
21665179402-5184734 spiflash: field: "Data (256 bytes)"
21675179319-5184736 spiflash: pp: "Page program (addr 0x019400, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
21685185459-5185478 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21695185484-5185503 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2170Internal write enable latch is set.
2171Block protection bits (BP3-BP0): 0x0.
2172Device is not in continuously program mode (CP mode).
2173Status register writes are allowed.
2174"
ffa3848b
UH
21755185484-5185503 spiflash: field: "Status register"
21765185459-5185503 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21775185505-5185524 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2178Internal write enable latch is set.
2179Block protection bits (BP3-BP0): 0x0.
2180Device is not in continuously program mode (CP mode).
2181Status register writes are allowed.
2182"
ffa3848b
UH
21835185505-5185524 spiflash: field: "Status register"
21845185459-5185524 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21855225172-5225191 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21865225197-5225216 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2187Internal write enable latch is not set.
2188Block protection bits (BP3-BP0): 0x0.
2189Device is not in continuously program mode (CP mode).
2190Status register writes are allowed.
2191"
ffa3848b
UH
21925225197-5225216 spiflash: field: "Status register"
21935225172-5225216 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
21945225218-5225237 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2195Internal write enable latch is not set.
2196Block protection bits (BP3-BP0): 0x0.
2197Device is not in continuously program mode (CP mode).
2198Status register writes are allowed.
2199"
ffa3848b
UH
22005225218-5225237 spiflash: field: "Status register"
22015225172-5225237 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22025274604-5274625 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
22035279324-5279343 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
22045279345-5279364 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
22055279365-5279386 spiflash: bit: "Address bits 15..8: 0x95" "Addr bits 15..8: 0x95" "Addr bits 15..8" "A15..A8"
22065279386-5279407 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
22075279345-5279407 spiflash: field: "Address: 0x019500" "Addr: 0x019500" "0x019500"
22085279407-5284739 spiflash: field: "Data (256 bytes)"
22095279324-5284741 spiflash: pp: "Page program (addr 0x019500, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
22105285448-5285469 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22115285473-5285494 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2212Internal write enable latch is set.
2213Block protection bits (BP3-BP0): 0x0.
2214Device is not in continuously program mode (CP mode).
2215Status register writes are allowed.
2216"
ffa3848b
UH
22175285473-5285494 spiflash: field: "Status register"
22185285448-5285494 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22195285494-5285515 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2220Internal write enable latch is set.
2221Block protection bits (BP3-BP0): 0x0.
2222Device is not in continuously program mode (CP mode).
2223Status register writes are allowed.
2224"
ffa3848b
UH
22255285494-5285515 spiflash: field: "Status register"
22265285448-5285515 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22275325554-5325575 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22285325579-5325600 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2229Internal write enable latch is not set.
2230Block protection bits (BP3-BP0): 0x0.
2231Device is not in continuously program mode (CP mode).
2232Status register writes are allowed.
2233"
ffa3848b
UH
22345325579-5325600 spiflash: field: "Status register"
22355325554-5325600 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22365325600-5325621 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2237Internal write enable latch is not set.
2238Block protection bits (BP3-BP0): 0x0.
2239Device is not in continuously program mode (CP mode).
2240Status register writes are allowed.
2241"
ffa3848b
UH
22425325600-5325621 spiflash: field: "Status register"
22435325554-5325621 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22445374609-5374630 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
22455378937-5378956 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
22465378957-5378978 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
22475378978-5378999 spiflash: bit: "Address bits 15..8: 0x96" "Addr bits 15..8: 0x96" "Addr bits 15..8" "A15..A8"
22485378999-5379020 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
22495378957-5379020 spiflash: field: "Address: 0x019600" "Addr: 0x019600" "0x019600"
22505379020-5384353 spiflash: field: "Data (256 bytes)"
22515378937-5384354 spiflash: pp: "Page program (addr 0x019600, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
22525385446-5385467 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22535385471-5385492 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2254Internal write enable latch is set.
2255Block protection bits (BP3-BP0): 0x0.
2256Device is not in continuously program mode (CP mode).
2257Status register writes are allowed.
2258"
ffa3848b
UH
22595385471-5385492 spiflash: field: "Status register"
22605385446-5385492 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22615385492-5385513 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2262Internal write enable latch is set.
2263Block protection bits (BP3-BP0): 0x0.
2264Device is not in continuously program mode (CP mode).
2265Status register writes are allowed.
2266"
ffa3848b
UH
22675385492-5385513 spiflash: field: "Status register"
22685385446-5385513 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22695425269-5425290 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22705425294-5425315 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2271Internal write enable latch is not set.
2272Block protection bits (BP3-BP0): 0x0.
2273Device is not in continuously program mode (CP mode).
2274Status register writes are allowed.
2275"
ffa3848b
UH
22765425294-5425315 spiflash: field: "Status register"
22775425269-5425315 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22785425315-5425336 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2279Internal write enable latch is not set.
2280Block protection bits (BP3-BP0): 0x0.
2281Device is not in continuously program mode (CP mode).
2282Status register writes are allowed.
2283"
ffa3848b
UH
22845425315-5425336 spiflash: field: "Status register"
22855425269-5425336 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22865474586-5474607 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
22875478919-5478940 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
22885478940-5478961 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
22895478961-5478980 spiflash: bit: "Address bits 15..8: 0x97" "Addr bits 15..8: 0x97" "Addr bits 15..8" "A15..A8"
22905478982-5479001 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
22915478940-5479001 spiflash: field: "Address: 0x019700" "Addr: 0x019700" "0x019700"
22925479003-5484334 spiflash: field: "Data (256 bytes)"
22935478919-5484336 spiflash: pp: "Page program (addr 0x019700, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
22945485428-5485447 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
22955485453-5485472 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2296Internal write enable latch is set.
2297Block protection bits (BP3-BP0): 0x0.
2298Device is not in continuously program mode (CP mode).
2299Status register writes are allowed.
2300"
ffa3848b
UH
23015485453-5485472 spiflash: field: "Status register"
23025485428-5485472 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23035485474-5485493 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2304Internal write enable latch is set.
2305Block protection bits (BP3-BP0): 0x0.
2306Device is not in continuously program mode (CP mode).
2307Status register writes are allowed.
2308"
ffa3848b
UH
23095485474-5485493 spiflash: field: "Status register"
23105485428-5485493 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23115525526-5525547 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23125525551-5525572 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2313Internal write enable latch is not set.
2314Block protection bits (BP3-BP0): 0x0.
2315Device is not in continuously program mode (CP mode).
2316Status register writes are allowed.
2317"
ffa3848b
UH
23185525551-5525572 spiflash: field: "Status register"
23195525526-5525572 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23205525572-5525591 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2321Internal write enable latch is not set.
2322Block protection bits (BP3-BP0): 0x0.
2323Device is not in continuously program mode (CP mode).
2324Status register writes are allowed.
2325"
ffa3848b
UH
23265525572-5525591 spiflash: field: "Status register"
23275525526-5525591 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23285574587-5574608 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
23295579284-5579305 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
23305579305-5579324 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
23315579326-5579345 spiflash: bit: "Address bits 15..8: 0x98" "Addr bits 15..8: 0x98" "Addr bits 15..8" "A15..A8"
23325579347-5579366 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
23335579305-5579366 spiflash: field: "Address: 0x019800" "Addr: 0x019800" "0x019800"
23345579367-5584699 spiflash: field: "Data (256 bytes)"
23355579284-5584701 spiflash: pp: "Page program (addr 0x019800, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
23365585405-5585424 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23375585430-5585449 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2338Internal write enable latch is set.
2339Block protection bits (BP3-BP0): 0x0.
2340Device is not in continuously program mode (CP mode).
2341Status register writes are allowed.
2342"
ffa3848b
UH
23435585430-5585449 spiflash: field: "Status register"
23445585405-5585449 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23455585451-5585470 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2346Internal write enable latch is set.
2347Block protection bits (BP3-BP0): 0x0.
2348Device is not in continuously program mode (CP mode).
2349Status register writes are allowed.
2350"
ffa3848b
UH
23515585451-5585470 spiflash: field: "Status register"
23525585405-5585470 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23535625526-5625545 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23545625551-5625570 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2355Internal write enable latch is not set.
2356Block protection bits (BP3-BP0): 0x0.
2357Device is not in continuously program mode (CP mode).
2358Status register writes are allowed.
2359"
ffa3848b
UH
23605625551-5625570 spiflash: field: "Status register"
23615625526-5625570 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23625625571-5625592 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2363Internal write enable latch is not set.
2364Block protection bits (BP3-BP0): 0x0.
2365Device is not in continuously program mode (CP mode).
2366Status register writes are allowed.
2367"
ffa3848b
UH
23685625571-5625592 spiflash: field: "Status register"
23695625526-5625592 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23705674572-5674591 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
23715679279-5679300 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
23725679300-5679321 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
23735679321-5679342 spiflash: bit: "Address bits 15..8: 0x99" "Addr bits 15..8: 0x99" "Addr bits 15..8" "A15..A8"
23745679342-5679361 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
23755679300-5679361 spiflash: field: "Address: 0x019900" "Addr: 0x019900" "0x019900"
23765679363-5684696 spiflash: field: "Data (256 bytes)"
23775679279-5684696 spiflash: pp: "Page program (addr 0x019900, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
23785685414-5685435 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23795685439-5685460 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2380Internal write enable latch is set.
2381Block protection bits (BP3-BP0): 0x0.
2382Device is not in continuously program mode (CP mode).
2383Status register writes are allowed.
2384"
ffa3848b
UH
23855685439-5685460 spiflash: field: "Status register"
23865685414-5685460 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23875685460-5685481 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2388Internal write enable latch is set.
2389Block protection bits (BP3-BP0): 0x0.
2390Device is not in continuously program mode (CP mode).
2391Status register writes are allowed.
2392"
ffa3848b
UH
23935685460-5685481 spiflash: field: "Status register"
23945685414-5685481 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23955725505-5725524 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
23965725530-5725549 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2397Internal write enable latch is not set.
2398Block protection bits (BP3-BP0): 0x0.
2399Device is not in continuously program mode (CP mode).
2400Status register writes are allowed.
2401"
ffa3848b
UH
24025725530-5725549 spiflash: field: "Status register"
24035725505-5725549 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24045725551-5725570 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2405Internal write enable latch is not set.
2406Block protection bits (BP3-BP0): 0x0.
2407Device is not in continuously program mode (CP mode).
2408Status register writes are allowed.
2409"
ffa3848b
UH
24105725551-5725570 spiflash: field: "Status register"
24115725505-5725570 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24125777567-5777586 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
24135781462-5781483 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
24145781483-5781502 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
24155781504-5781523 spiflash: bit: "Address bits 15..8: 0x9a" "Addr bits 15..8: 0x9a" "Addr bits 15..8" "A15..A8"
24165781525-5781544 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
24175781483-5781544 spiflash: field: "Address: 0x019a00" "Addr: 0x019a00" "0x019a00"
24185781545-5786877 spiflash: field: "Data (256 bytes)"
24195781462-5786879 spiflash: pp: "Page program (addr 0x019a00, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
24205788503-5788524 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24215788528-5788549 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2422Internal write enable latch is set.
2423Block protection bits (BP3-BP0): 0x0.
2424Device is not in continuously program mode (CP mode).
2425Status register writes are allowed.
2426"
ffa3848b
UH
24275788528-5788549 spiflash: field: "Status register"
24285788503-5788549 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24295788549-5788568 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2430Internal write enable latch is set.
2431Block protection bits (BP3-BP0): 0x0.
2432Device is not in continuously program mode (CP mode).
2433Status register writes are allowed.
2434"
ffa3848b
UH
24355788549-5788568 spiflash: field: "Status register"
24365788503-5788568 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24375826506-5826525 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24385826531-5826550 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2439Internal write enable latch is not set.
2440Block protection bits (BP3-BP0): 0x0.
2441Device is not in continuously program mode (CP mode).
2442Status register writes are allowed.
2443"
ffa3848b
UH
24445826531-5826550 spiflash: field: "Status register"
24455826506-5826550 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24465826551-5826572 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2447Internal write enable latch is not set.
2448Block protection bits (BP3-BP0): 0x0.
2449Device is not in continuously program mode (CP mode).
2450Status register writes are allowed.
2451"
ffa3848b
UH
24525826551-5826572 spiflash: field: "Status register"
24535826506-5826572 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24545874428-5874447 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
24555879249-5879268 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
24565879270-5879289 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
24575879291-5879310 spiflash: bit: "Address bits 15..8: 0x9b" "Addr bits 15..8: 0x9b" "Addr bits 15..8" "A15..A8"
24585879311-5879332 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
24595879270-5879332 spiflash: field: "Address: 0x019b00" "Addr: 0x019b00" "0x019b00"
24605879332-5884664 spiflash: field: "Data (256 bytes)"
24615879249-5884666 spiflash: pp: "Page program (addr 0x019b00, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
24625885395-5885414 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24635885420-5885439 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2464Internal write enable latch is set.
2465Block protection bits (BP3-BP0): 0x0.
2466Device is not in continuously program mode (CP mode).
2467Status register writes are allowed.
2468"
ffa3848b
UH
24695885420-5885439 spiflash: field: "Status register"
24705885395-5885439 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24715885440-5885461 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2472Internal write enable latch is set.
2473Block protection bits (BP3-BP0): 0x0.
2474Device is not in continuously program mode (CP mode).
2475Status register writes are allowed.
2476"
ffa3848b
UH
24775885440-5885461 spiflash: field: "Status register"
24785885395-5885461 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24795930139-5930158 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24805930164-5930183 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2481Internal write enable latch is not set.
2482Block protection bits (BP3-BP0): 0x0.
2483Device is not in continuously program mode (CP mode).
2484Status register writes are allowed.
2485"
ffa3848b
UH
24865930164-5930183 spiflash: field: "Status register"
24875930139-5930183 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24885930184-5930205 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2489Internal write enable latch is not set.
2490Block protection bits (BP3-BP0): 0x0.
2491Device is not in continuously program mode (CP mode).
2492Status register writes are allowed.
2493"
ffa3848b
UH
24945930184-5930205 spiflash: field: "Status register"
24955930139-5930205 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
24965974516-5974535 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
24975979217-5979236 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
24985979238-5979257 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
24995979258-5979279 spiflash: bit: "Address bits 15..8: 0x9c" "Addr bits 15..8: 0x9c" "Addr bits 15..8" "A15..A8"
25005979279-5979300 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
25015979238-5979300 spiflash: field: "Address: 0x019c00" "Addr: 0x019c00" "0x019c00"
25025979300-5984633 spiflash: field: "Data (256 bytes)"
25035979217-5984634 spiflash: pp: "Page program (addr 0x019c00, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
25045985356-5985377 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25055985381-5985402 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2506Internal write enable latch is set.
2507Block protection bits (BP3-BP0): 0x0.
2508Device is not in continuously program mode (CP mode).
2509Status register writes are allowed.
2510"
ffa3848b
UH
25115985381-5985402 spiflash: field: "Status register"
25125985356-5985402 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25135985402-5985421 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2514Internal write enable latch is set.
2515Block protection bits (BP3-BP0): 0x0.
2516Device is not in continuously program mode (CP mode).
2517Status register writes are allowed.
2518"
ffa3848b
UH
25195985402-5985421 spiflash: field: "Status register"
25205985356-5985421 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25216030123-6030144 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25226030148-6030169 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2523Internal write enable latch is not set.
2524Block protection bits (BP3-BP0): 0x0.
2525Device is not in continuously program mode (CP mode).
2526Status register writes are allowed.
2527"
ffa3848b
UH
25286030148-6030169 spiflash: field: "Status register"
25296030123-6030169 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25306030169-6030188 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2531Internal write enable latch is not set.
2532Block protection bits (BP3-BP0): 0x0.
2533Device is not in continuously program mode (CP mode).
2534Status register writes are allowed.
2535"
ffa3848b
UH
25366030169-6030188 spiflash: field: "Status register"
25376030123-6030188 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25386077131-6077152 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
25396082744-6082763 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
25406082765-6082784 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
25416082786-6082805 spiflash: bit: "Address bits 15..8: 0x9d" "Addr bits 15..8: 0x9d" "Addr bits 15..8" "A15..A8"
25426082806-6082827 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
25436082765-6082827 spiflash: field: "Address: 0x019d00" "Addr: 0x019d00" "0x019d00"
25446082827-6088679 spiflash: field: "Data (256 bytes)"
25456082744-6088681 spiflash: pp: "Page program (addr 0x019d00, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
25466089646-6089667 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25476089671-6089692 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2548Internal write enable latch is set.
2549Block protection bits (BP3-BP0): 0x0.
2550Device is not in continuously program mode (CP mode).
2551Status register writes are allowed.
2552"
ffa3848b
UH
25536089671-6089692 spiflash: field: "Status register"
25546089646-6089692 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25556089692-6089713 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2556Internal write enable latch is set.
2557Block protection bits (BP3-BP0): 0x0.
2558Device is not in continuously program mode (CP mode).
2559Status register writes are allowed.
2560"
ffa3848b
UH
25616089692-6089713 spiflash: field: "Status register"
25626089646-6089713 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25636124923-6124942 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25646124948-6124967 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2565Internal write enable latch is not set.
2566Block protection bits (BP3-BP0): 0x0.
2567Device is not in continuously program mode (CP mode).
2568Status register writes are allowed.
2569"
ffa3848b
UH
25706124948-6124967 spiflash: field: "Status register"
25716124923-6124967 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25726124968-6124989 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2573Internal write enable latch is not set.
2574Block protection bits (BP3-BP0): 0x0.
2575Device is not in continuously program mode (CP mode).
2576Status register writes are allowed.
2577"
ffa3848b
UH
25786124968-6124989 spiflash: field: "Status register"
25796124923-6124989 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25806174395-6174416 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
25816179198-6179217 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
25826179218-6179239 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
25836179239-6179260 spiflash: bit: "Address bits 15..8: 0x9e" "Addr bits 15..8: 0x9e" "Addr bits 15..8" "A15..A8"
25846179260-6179281 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
25856179218-6179281 spiflash: field: "Address: 0x019e00" "Addr: 0x019e00" "0x019e00"
25866179281-6184614 spiflash: field: "Data (256 bytes)"
25876179198-6184615 spiflash: pp: "Page program (addr 0x019e00, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
25886185328-6185347 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25896185353-6185372 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2590Internal write enable latch is set.
2591Block protection bits (BP3-BP0): 0x0.
2592Device is not in continuously program mode (CP mode).
2593Status register writes are allowed.
2594"
ffa3848b
UH
25956185353-6185372 spiflash: field: "Status register"
25966185328-6185372 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
25976185374-6185393 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2598Internal write enable latch is set.
2599Block protection bits (BP3-BP0): 0x0.
2600Device is not in continuously program mode (CP mode).
2601Status register writes are allowed.
2602"
ffa3848b
UH
26036185374-6185393 spiflash: field: "Status register"
26046185328-6185393 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26056224899-6224920 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26066224924-6224945 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2607Internal write enable latch is not set.
2608Block protection bits (BP3-BP0): 0x0.
2609Device is not in continuously program mode (CP mode).
2610Status register writes are allowed.
2611"
ffa3848b
UH
26126224924-6224945 spiflash: field: "Status register"
26136224899-6224945 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26146224945-6224966 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2615Internal write enable latch is not set.
2616Block protection bits (BP3-BP0): 0x0.
2617Device is not in continuously program mode (CP mode).
2618Status register writes are allowed.
2619"
ffa3848b
UH
26206224945-6224966 spiflash: field: "Status register"
26216224899-6224966 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26226274383-6274402 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
26236279215-6279234 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
26246279235-6279256 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
26256279256-6279277 spiflash: bit: "Address bits 15..8: 0x9f" "Addr bits 15..8: 0x9f" "Addr bits 15..8" "A15..A8"
26266279277-6279298 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
26276279235-6279298 spiflash: field: "Address: 0x019f00" "Addr: 0x019f00" "0x019f00"
26286279298-6284631 spiflash: field: "Data (256 bytes)"
26296279215-6284631 spiflash: pp: "Page program (addr 0x019f00, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
26306285342-6285361 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26316285367-6285386 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2632Internal write enable latch is set.
2633Block protection bits (BP3-BP0): 0x0.
2634Device is not in continuously program mode (CP mode).
2635Status register writes are allowed.
2636"
ffa3848b
UH
26376285367-6285386 spiflash: field: "Status register"
26386285342-6285386 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26396285388-6285407 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2640Internal write enable latch is set.
2641Block protection bits (BP3-BP0): 0x0.
2642Device is not in continuously program mode (CP mode).
2643Status register writes are allowed.
2644"
ffa3848b
UH
26456285388-6285407 spiflash: field: "Status register"
26466285342-6285407 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26476324791-6324810 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26486324816-6324835 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2649Internal write enable latch is not set.
2650Block protection bits (BP3-BP0): 0x0.
2651Device is not in continuously program mode (CP mode).
2652Status register writes are allowed.
2653"
ffa3848b
UH
26546324816-6324835 spiflash: field: "Status register"
26556324791-6324835 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26566324836-6324857 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2657Internal write enable latch is not set.
2658Block protection bits (BP3-BP0): 0x0.
2659Device is not in continuously program mode (CP mode).
2660Status register writes are allowed.
2661"
ffa3848b
UH
26626324836-6324857 spiflash: field: "Status register"
26636324791-6324857 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26646374898-6374919 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
26656378656-6378677 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
26666378677-6378696 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
26676378698-6378717 spiflash: bit: "Address bits 15..8: 0xa0" "Addr bits 15..8: 0xa0" "Addr bits 15..8" "A15..A8"
26686378719-6378738 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
26696378677-6378738 spiflash: field: "Address: 0x01a000" "Addr: 0x01a000" "0x01a000"
26706378739-6384071 spiflash: field: "Data (256 bytes)"
26716378656-6384073 spiflash: pp: "Page program (addr 0x01a000, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
26726385326-6385347 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26736385351-6385372 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2674Internal write enable latch is set.
2675Block protection bits (BP3-BP0): 0x0.
2676Device is not in continuously program mode (CP mode).
2677Status register writes are allowed.
2678"
ffa3848b
UH
26796385351-6385372 spiflash: field: "Status register"
26806385326-6385372 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26816385372-6385393 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2682Internal write enable latch is set.
2683Block protection bits (BP3-BP0): 0x0.
2684Device is not in continuously program mode (CP mode).
2685Status register writes are allowed.
2686"
ffa3848b
UH
26876385372-6385393 spiflash: field: "Status register"
26886385326-6385393 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26896424870-6424889 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26906424895-6424914 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2691Internal write enable latch is not set.
2692Block protection bits (BP3-BP0): 0x0.
2693Device is not in continuously program mode (CP mode).
2694Status register writes are allowed.
2695"
ffa3848b
UH
26966424895-6424914 spiflash: field: "Status register"
26976424870-6424914 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
26986424915-6424936 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2699Internal write enable latch is not set.
2700Block protection bits (BP3-BP0): 0x0.
2701Device is not in continuously program mode (CP mode).
2702Status register writes are allowed.
2703"
ffa3848b
UH
27046424915-6424936 spiflash: field: "Status register"
27056424870-6424936 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27066474344-6474363 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
27076479170-6479189 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
27086479191-6479210 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
27096479212-6479231 spiflash: bit: "Address bits 15..8: 0xa1" "Addr bits 15..8: 0xa1" "Addr bits 15..8" "A15..A8"
27106479232-6479253 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
27116479191-6479253 spiflash: field: "Address: 0x01a100" "Addr: 0x01a100" "0x01a100"
27126479253-6484585 spiflash: field: "Data (256 bytes)"
27136479170-6484587 spiflash: pp: "Page program (addr 0x01a100, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
27146485294-6485313 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27156485319-6485338 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2716Internal write enable latch is set.
2717Block protection bits (BP3-BP0): 0x0.
2718Device is not in continuously program mode (CP mode).
2719Status register writes are allowed.
2720"
ffa3848b
UH
27216485319-6485338 spiflash: field: "Status register"
27226485294-6485338 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27236485339-6485360 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2724Internal write enable latch is set.
2725Block protection bits (BP3-BP0): 0x0.
2726Device is not in continuously program mode (CP mode).
2727Status register writes are allowed.
2728"
ffa3848b
UH
27296485339-6485360 spiflash: field: "Status register"
27306485294-6485360 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27316526938-6526959 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27326526963-6526984 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2733Internal write enable latch is not set.
2734Block protection bits (BP3-BP0): 0x0.
2735Device is not in continuously program mode (CP mode).
2736Status register writes are allowed.
2737"
ffa3848b
UH
27386526963-6526984 spiflash: field: "Status register"
27396526938-6526984 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27406526984-6527005 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2741Internal write enable latch is not set.
2742Block protection bits (BP3-BP0): 0x0.
2743Device is not in continuously program mode (CP mode).
2744Status register writes are allowed.
2745"
ffa3848b
UH
27466526984-6527005 spiflash: field: "Status register"
27476526938-6527005 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27486574447-6574466 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
27496578737-6578758 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
27506578758-6578779 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
27516578779-6578798 spiflash: bit: "Address bits 15..8: 0xa2" "Addr bits 15..8: 0xa2" "Addr bits 15..8" "A15..A8"
27526578800-6578819 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
27536578758-6578819 spiflash: field: "Address: 0x01a200" "Addr: 0x01a200" "0x01a200"
27546578821-6584154 spiflash: field: "Data (256 bytes)"
27556578737-6584154 spiflash: pp: "Page program (addr 0x01a200, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
27566585264-6585283 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27576585289-6585308 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2758Internal write enable latch is set.
2759Block protection bits (BP3-BP0): 0x0.
2760Device is not in continuously program mode (CP mode).
2761Status register writes are allowed.
2762"
ffa3848b
UH
27636585289-6585308 spiflash: field: "Status register"
27646585264-6585308 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27656585310-6585329 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2766Internal write enable latch is set.
2767Block protection bits (BP3-BP0): 0x0.
2768Device is not in continuously program mode (CP mode).
2769Status register writes are allowed.
2770"
ffa3848b
UH
27716585310-6585329 spiflash: field: "Status register"
27726585264-6585329 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27736624844-6624865 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27746624869-6624890 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2775Internal write enable latch is not set.
2776Block protection bits (BP3-BP0): 0x0.
2777Device is not in continuously program mode (CP mode).
2778Status register writes are allowed.
2779"
ffa3848b
UH
27806624869-6624890 spiflash: field: "Status register"
27816624844-6624890 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27826624890-6624909 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2783Internal write enable latch is not set.
2784Block protection bits (BP3-BP0): 0x0.
2785Device is not in continuously program mode (CP mode).
2786Status register writes are allowed.
2787"
ffa3848b
UH
27886624890-6624909 spiflash: field: "Status register"
27896624844-6624909 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27906674271-6674292 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
27916678741-6678760 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
27926678762-6678781 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
27936678783-6678802 spiflash: bit: "Address bits 15..8: 0xa3" "Addr bits 15..8: 0xa3" "Addr bits 15..8" "A15..A8"
27946678803-6678824 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
27956678762-6678824 spiflash: field: "Address: 0x01a300" "Addr: 0x01a300" "0x01a300"
27966678824-6684156 spiflash: field: "Data (256 bytes)"
27976678741-6684158 spiflash: pp: "Page program (addr 0x01a300, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
27986685253-6685274 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
27996685278-6685299 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2800Internal write enable latch is set.
2801Block protection bits (BP3-BP0): 0x0.
2802Device is not in continuously program mode (CP mode).
2803Status register writes are allowed.
2804"
ffa3848b
UH
28056685278-6685299 spiflash: field: "Status register"
28066685253-6685299 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28076685299-6685320 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2808Internal write enable latch is set.
2809Block protection bits (BP3-BP0): 0x0.
2810Device is not in continuously program mode (CP mode).
2811Status register writes are allowed.
2812"
ffa3848b
UH
28136685299-6685320 spiflash: field: "Status register"
28146685253-6685320 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28156724970-6724991 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28166724995-6725016 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2817Internal write enable latch is not set.
2818Block protection bits (BP3-BP0): 0x0.
2819Device is not in continuously program mode (CP mode).
2820Status register writes are allowed.
2821"
ffa3848b
UH
28226724995-6725016 spiflash: field: "Status register"
28236724970-6725016 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28246725016-6725037 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2825Internal write enable latch is not set.
2826Block protection bits (BP3-BP0): 0x0.
2827Device is not in continuously program mode (CP mode).
2828Status register writes are allowed.
2829"
ffa3848b
UH
28306725016-6725037 spiflash: field: "Status register"
28316724970-6725037 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28326774307-6774328 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
28336779108-6779127 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
28346779129-6779148 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
28356779149-6779170 spiflash: bit: "Address bits 15..8: 0xa4" "Addr bits 15..8: 0xa4" "Addr bits 15..8" "A15..A8"
28366779170-6779191 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
28376779129-6779191 spiflash: field: "Address: 0x01a400" "Addr: 0x01a400" "0x01a400"
28386779191-6784524 spiflash: field: "Data (256 bytes)"
28396779108-6784525 spiflash: pp: "Page program (addr 0x01a400, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
28406785245-6785266 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28416785270-6785291 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2842Internal write enable latch is set.
2843Block protection bits (BP3-BP0): 0x0.
2844Device is not in continuously program mode (CP mode).
2845Status register writes are allowed.
2846"
ffa3848b
UH
28476785270-6785291 spiflash: field: "Status register"
28486785245-6785291 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28496785291-6785310 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2850Internal write enable latch is set.
2851Block protection bits (BP3-BP0): 0x0.
2852Device is not in continuously program mode (CP mode).
2853Status register writes are allowed.
2854"
ffa3848b
UH
28556785291-6785310 spiflash: field: "Status register"
28566785245-6785310 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28576824959-6824980 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28586824984-6825005 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2859Internal write enable latch is not set.
2860Block protection bits (BP3-BP0): 0x0.
2861Device is not in continuously program mode (CP mode).
2862Status register writes are allowed.
2863"
ffa3848b
UH
28646824984-6825005 spiflash: field: "Status register"
28656824959-6825005 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28666825005-6825026 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2867Internal write enable latch is not set.
2868Block protection bits (BP3-BP0): 0x0.
2869Device is not in continuously program mode (CP mode).
2870Status register writes are allowed.
2871"
ffa3848b
UH
28726825005-6825026 spiflash: field: "Status register"
28736824959-6825026 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28746874011-6874030 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
28756879063-6879084 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
28766879084-6879105 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
28776879105-6879126 spiflash: bit: "Address bits 15..8: 0xa5" "Addr bits 15..8: 0xa5" "Addr bits 15..8" "A15..A8"
28786879126-6879145 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
28796879084-6879145 spiflash: field: "Address: 0x01a500" "Addr: 0x01a500" "0x01a500"
28806879147-6884480 spiflash: field: "Data (256 bytes)"
28816879063-6884480 spiflash: pp: "Page program (addr 0x01a500, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
28826885244-6885263 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28836885269-6885288 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2884Internal write enable latch is set.
2885Block protection bits (BP3-BP0): 0x0.
2886Device is not in continuously program mode (CP mode).
2887Status register writes are allowed.
2888"
ffa3848b
UH
28896885269-6885288 spiflash: field: "Status register"
28906885244-6885288 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28916885290-6885309 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2892Internal write enable latch is set.
2893Block protection bits (BP3-BP0): 0x0.
2894Device is not in continuously program mode (CP mode).
2895Status register writes are allowed.
2896"
ffa3848b
UH
28976885290-6885309 spiflash: field: "Status register"
28986885244-6885309 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
28996925338-6925357 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29006925363-6925382 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2901Internal write enable latch is not set.
2902Block protection bits (BP3-BP0): 0x0.
2903Device is not in continuously program mode (CP mode).
2904Status register writes are allowed.
2905"
ffa3848b
UH
29066925363-6925382 spiflash: field: "Status register"
29076925338-6925382 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29086925384-6925403 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2909Internal write enable latch is not set.
2910Block protection bits (BP3-BP0): 0x0.
2911Device is not in continuously program mode (CP mode).
2912Status register writes are allowed.
2913"
ffa3848b
UH
29146925384-6925403 spiflash: field: "Status register"
29156925338-6925403 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29166977009-6977030 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
29176982622-6982641 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
29186982643-6982662 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
29196982664-6982683 spiflash: bit: "Address bits 15..8: 0xa6" "Addr bits 15..8: 0xa6" "Addr bits 15..8" "A15..A8"
29206982684-6982705 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
29216982643-6982705 spiflash: field: "Address: 0x01a600" "Addr: 0x01a600" "0x01a600"
29226982705-6988542 spiflash: field: "Data (256 bytes)"
29236982622-6988543 spiflash: pp: "Page program (addr 0x01a600, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
29246989514-6989535 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29256989539-6989560 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2926Internal write enable latch is set.
2927Block protection bits (BP3-BP0): 0x0.
2928Device is not in continuously program mode (CP mode).
2929Status register writes are allowed.
2930"
ffa3848b
UH
29316989539-6989560 spiflash: field: "Status register"
29326989514-6989560 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29336989560-6989581 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2934Internal write enable latch is set.
2935Block protection bits (BP3-BP0): 0x0.
2936Device is not in continuously program mode (CP mode).
2937Status register writes are allowed.
2938"
ffa3848b
UH
29396989560-6989581 spiflash: field: "Status register"
29406989514-6989581 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29417024825-7024846 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29427024850-7024871 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2943Internal write enable latch is not set.
2944Block protection bits (BP3-BP0): 0x0.
2945Device is not in continuously program mode (CP mode).
2946Status register writes are allowed.
2947"
ffa3848b
UH
29487024850-7024871 spiflash: field: "Status register"
29497024825-7024871 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29507024871-7024890 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2951Internal write enable latch is not set.
2952Block protection bits (BP3-BP0): 0x0.
2953Device is not in continuously program mode (CP mode).
2954Status register writes are allowed.
2955"
ffa3848b
UH
29567024871-7024890 spiflash: field: "Status register"
29577024825-7024890 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29587074258-7074279 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
29597078686-7078707 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
29607078707-7078728 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
29617078728-7078749 spiflash: bit: "Address bits 15..8: 0xa7" "Addr bits 15..8: 0xa7" "Addr bits 15..8" "A15..A8"
29627078749-7078768 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
29637078707-7078768 spiflash: field: "Address: 0x01a700" "Addr: 0x01a700" "0x01a700"
29647078770-7084103 spiflash: field: "Data (256 bytes)"
29657078686-7084103 spiflash: pp: "Page program (addr 0x01a700, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
29667085219-7085238 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29677085244-7085263 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2968Internal write enable latch is set.
2969Block protection bits (BP3-BP0): 0x0.
2970Device is not in continuously program mode (CP mode).
2971Status register writes are allowed.
2972"
ffa3848b
UH
29737085244-7085263 spiflash: field: "Status register"
29747085219-7085263 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29757085265-7085284 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
2976Internal write enable latch is set.
2977Block protection bits (BP3-BP0): 0x0.
2978Device is not in continuously program mode (CP mode).
2979Status register writes are allowed.
2980"
ffa3848b
UH
29817085265-7085284 spiflash: field: "Status register"
29827085219-7085284 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29837124917-7124936 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29847124942-7124961 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2985Internal write enable latch is not set.
2986Block protection bits (BP3-BP0): 0x0.
2987Device is not in continuously program mode (CP mode).
2988Status register writes are allowed.
2989"
ffa3848b
UH
29907124942-7124961 spiflash: field: "Status register"
29917124917-7124961 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
29927124962-7124983 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
2993Internal write enable latch is not set.
2994Block protection bits (BP3-BP0): 0x0.
2995Device is not in continuously program mode (CP mode).
2996Status register writes are allowed.
2997"
ffa3848b
UH
29987124962-7124983 spiflash: field: "Status register"
29997124917-7124983 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30007176988-7177007 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
30017182595-7182614 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
30027182616-7182635 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
30037182637-7182656 spiflash: bit: "Address bits 15..8: 0xa8" "Addr bits 15..8: 0xa8" "Addr bits 15..8" "A15..A8"
30047182657-7182678 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
30057182616-7182678 spiflash: field: "Address: 0x01a800" "Addr: 0x01a800" "0x01a800"
30067182678-7188139 spiflash: field: "Data (256 bytes)"
30077182595-7188141 spiflash: pp: "Page program (addr 0x01a800, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
30087189498-7189519 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30097189523-7189544 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3010Internal write enable latch is set.
3011Block protection bits (BP3-BP0): 0x0.
3012Device is not in continuously program mode (CP mode).
3013Status register writes are allowed.
3014"
ffa3848b
UH
30157189523-7189544 spiflash: field: "Status register"
30167189498-7189544 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30177189544-7189565 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3018Internal write enable latch is set.
3019Block protection bits (BP3-BP0): 0x0.
3020Device is not in continuously program mode (CP mode).
3021Status register writes are allowed.
3022"
ffa3848b
UH
30237189544-7189565 spiflash: field: "Status register"
30247189498-7189565 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30257224897-7224918 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30267224922-7224943 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3027Internal write enable latch is not set.
3028Block protection bits (BP3-BP0): 0x0.
3029Device is not in continuously program mode (CP mode).
3030Status register writes are allowed.
3031"
ffa3848b
UH
30327224922-7224943 spiflash: field: "Status register"
30337224897-7224943 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30347224943-7224964 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3035Internal write enable latch is not set.
3036Block protection bits (BP3-BP0): 0x0.
3037Device is not in continuously program mode (CP mode).
3038Status register writes are allowed.
3039"
ffa3848b
UH
30407224943-7224964 spiflash: field: "Status register"
30417224897-7224964 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30427274234-7274255 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
30437279037-7279058 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
30447279058-7279079 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
30457279079-7279098 spiflash: bit: "Address bits 15..8: 0xa9" "Addr bits 15..8: 0xa9" "Addr bits 15..8" "A15..A8"
30467279100-7279119 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
30477279058-7279119 spiflash: field: "Address: 0x01a900" "Addr: 0x01a900" "0x01a900"
30487279121-7284452 spiflash: field: "Data (256 bytes)"
30497279037-7284454 spiflash: pp: "Page program (addr 0x01a900, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
30507284665-7284686 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30517284690-7284711 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3052Internal write enable latch is set.
3053Block protection bits (BP3-BP0): 0x0.
3054Device is not in continuously program mode (CP mode).
3055Status register writes are allowed.
3056"
ffa3848b
UH
30577284690-7284711 spiflash: field: "Status register"
30587284665-7284711 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30597284711-7284732 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3060Internal write enable latch is set.
3061Block protection bits (BP3-BP0): 0x0.
3062Device is not in continuously program mode (CP mode).
3063Status register writes are allowed.
3064"
ffa3848b
UH
30657284711-7284732 spiflash: field: "Status register"
30667284665-7284732 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30677329950-7329969 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30687329975-7329994 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3069Internal write enable latch is not set.
3070Block protection bits (BP3-BP0): 0x0.
3071Device is not in continuously program mode (CP mode).
3072Status register writes are allowed.
3073"
ffa3848b
UH
30747329975-7329994 spiflash: field: "Status register"
30757329950-7329994 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30767329996-7330015 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3077Internal write enable latch is not set.
3078Block protection bits (BP3-BP0): 0x0.
3079Device is not in continuously program mode (CP mode).
3080Status register writes are allowed.
3081"
ffa3848b
UH
30827329996-7330015 spiflash: field: "Status register"
30837329950-7330015 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30847378929-7378948 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
30857380058-7380077 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
30867380078-7380099 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
30877380099-7380120 spiflash: bit: "Address bits 15..8: 0xaa" "Addr bits 15..8: 0xaa" "Addr bits 15..8" "A15..A8"
30887380120-7380141 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
30897380078-7380141 spiflash: field: "Address: 0x01aa00" "Addr: 0x01aa00" "0x01aa00"
30907380141-7385474 spiflash: field: "Data (256 bytes)"
30917380058-7385474 spiflash: pp: "Page program (addr 0x01aa00, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
30927386332-7386353 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
30937386357-7386378 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3094Internal write enable latch is set.
3095Block protection bits (BP3-BP0): 0x0.
3096Device is not in continuously program mode (CP mode).
3097Status register writes are allowed.
3098"
ffa3848b
UH
30997386357-7386378 spiflash: field: "Status register"
31007386332-7386378 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31017386378-7386399 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3102Internal write enable latch is set.
3103Block protection bits (BP3-BP0): 0x0.
3104Device is not in continuously program mode (CP mode).
3105Status register writes are allowed.
3106"
ffa3848b
UH
31077386378-7386399 spiflash: field: "Status register"
31087386332-7386399 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31097426291-7426312 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31107426316-7426337 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3111Internal write enable latch is not set.
3112Block protection bits (BP3-BP0): 0x0.
3113Device is not in continuously program mode (CP mode).
3114Status register writes are allowed.
3115"
ffa3848b
UH
31167426316-7426337 spiflash: field: "Status register"
31177426291-7426337 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31187426337-7426356 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3119Internal write enable latch is not set.
3120Block protection bits (BP3-BP0): 0x0.
3121Device is not in continuously program mode (CP mode).
3122Status register writes are allowed.
3123"
ffa3848b
UH
31247426337-7426356 spiflash: field: "Status register"
31257426291-7426356 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31267474209-7474230 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
31277479010-7479029 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
31287479031-7479050 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
31297479051-7479072 spiflash: bit: "Address bits 15..8: 0xab" "Addr bits 15..8: 0xab" "Addr bits 15..8" "A15..A8"
31307479072-7479093 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
31317479031-7479093 spiflash: field: "Address: 0x01ab00" "Addr: 0x01ab00" "0x01ab00"
31327479093-7484425 spiflash: field: "Data (256 bytes)"
31337479010-7484427 spiflash: pp: "Page program (addr 0x01ab00, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
31347485158-7485177 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31357485183-7485202 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3136Internal write enable latch is set.
3137Block protection bits (BP3-BP0): 0x0.
3138Device is not in continuously program mode (CP mode).
3139Status register writes are allowed.
3140"
ffa3848b
UH
31417485183-7485202 spiflash: field: "Status register"
31427485158-7485202 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31437485203-7485224 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3144Internal write enable latch is set.
3145Block protection bits (BP3-BP0): 0x0.
3146Device is not in continuously program mode (CP mode).
3147Status register writes are allowed.
3148"
ffa3848b
UH
31497485203-7485224 spiflash: field: "Status register"
31507485158-7485224 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31517524865-7524884 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31527524890-7524909 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3153Internal write enable latch is not set.
3154Block protection bits (BP3-BP0): 0x0.
3155Device is not in continuously program mode (CP mode).
3156Status register writes are allowed.
3157"
ffa3848b
UH
31587524890-7524909 spiflash: field: "Status register"
31597524865-7524909 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31607524910-7524931 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3161Internal write enable latch is not set.
3162Block protection bits (BP3-BP0): 0x0.
3163Device is not in continuously program mode (CP mode).
3164Status register writes are allowed.
3165"
ffa3848b
UH
31667524910-7524931 spiflash: field: "Status register"
31677524865-7524931 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31687575895-7575914 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
31697576908-7576929 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
31707576929-7576948 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
31717576950-7576969 spiflash: bit: "Address bits 15..8: 0xac" "Addr bits 15..8: 0xac" "Addr bits 15..8" "A15..A8"
31727576971-7576990 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
31737576929-7576990 spiflash: field: "Address: 0x01ac00" "Addr: 0x01ac00" "0x01ac00"
31747576991-7582323 spiflash: field: "Data (256 bytes)"
31757576908-7582325 spiflash: pp: "Page program (addr 0x01ac00, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
31767583181-7583202 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31777583206-7583227 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3178Internal write enable latch is set.
3179Block protection bits (BP3-BP0): 0x0.
3180Device is not in continuously program mode (CP mode).
3181Status register writes are allowed.
3182"
ffa3848b
UH
31837583206-7583227 spiflash: field: "Status register"
31847583181-7583227 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31857583227-7583248 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3186Internal write enable latch is set.
3187Block protection bits (BP3-BP0): 0x0.
3188Device is not in continuously program mode (CP mode).
3189Status register writes are allowed.
3190"
ffa3848b
UH
31917583227-7583248 spiflash: field: "Status register"
31927583181-7583248 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31937624926-7624947 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
31947624951-7624972 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3195Internal write enable latch is not set.
3196Block protection bits (BP3-BP0): 0x0.
3197Device is not in continuously program mode (CP mode).
3198Status register writes are allowed.
3199"
ffa3848b
UH
32007624951-7624972 spiflash: field: "Status register"
32017624926-7624972 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32027624972-7624991 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3203Internal write enable latch is not set.
3204Block protection bits (BP3-BP0): 0x0.
3205Device is not in continuously program mode (CP mode).
3206Status register writes are allowed.
3207"
ffa3848b
UH
32087624972-7624991 spiflash: field: "Status register"
32097624926-7624991 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32107674324-7674345 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
32117678469-7678490 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
32127678490-7678511 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
32137678511-7678532 spiflash: bit: "Address bits 15..8: 0xad" "Addr bits 15..8: 0xad" "Addr bits 15..8" "A15..A8"
32147678532-7678551 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
32157678490-7678551 spiflash: field: "Address: 0x01ad00" "Addr: 0x01ad00" "0x01ad00"
32167678553-7683886 spiflash: field: "Data (256 bytes)"
32177678469-7683886 spiflash: pp: "Page program (addr 0x01ad00, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
32187685118-7685139 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32197685143-7685164 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3220Internal write enable latch is set.
3221Block protection bits (BP3-BP0): 0x0.
3222Device is not in continuously program mode (CP mode).
3223Status register writes are allowed.
3224"
ffa3848b
UH
32257685143-7685164 spiflash: field: "Status register"
32267685118-7685164 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32277685164-7685183 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3228Internal write enable latch is set.
3229Block protection bits (BP3-BP0): 0x0.
3230Device is not in continuously program mode (CP mode).
3231Status register writes are allowed.
3232"
ffa3848b
UH
32337685164-7685183 spiflash: field: "Status register"
32347685118-7685183 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32357724702-7724723 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32367724727-7724748 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3237Internal write enable latch is not set.
3238Block protection bits (BP3-BP0): 0x0.
3239Device is not in continuously program mode (CP mode).
3240Status register writes are allowed.
3241"
ffa3848b
UH
32427724727-7724748 spiflash: field: "Status register"
32437724702-7724748 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32447724748-7724767 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3245Internal write enable latch is not set.
3246Block protection bits (BP3-BP0): 0x0.
3247Device is not in continuously program mode (CP mode).
3248Status register writes are allowed.
3249"
ffa3848b
UH
32507724748-7724767 spiflash: field: "Status register"
32517724702-7724767 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32527773895-7773916 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
32537778529-7778550 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
32547778550-7778571 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
32557778571-7778590 spiflash: bit: "Address bits 15..8: 0xae" "Addr bits 15..8: 0xae" "Addr bits 15..8" "A15..A8"
32567778592-7778611 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
32577778550-7778611 spiflash: field: "Address: 0x01ae00" "Addr: 0x01ae00" "0x01ae00"
32587778613-7783946 spiflash: field: "Data (256 bytes)"
32597778529-7783946 spiflash: pp: "Page program (addr 0x01ae00, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
32607785096-7785117 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32617785121-7785142 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3262Internal write enable latch is set.
3263Block protection bits (BP3-BP0): 0x0.
3264Device is not in continuously program mode (CP mode).
3265Status register writes are allowed.
3266"
ffa3848b
UH
32677785121-7785142 spiflash: field: "Status register"
32687785096-7785142 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32697785142-7785163 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3270Internal write enable latch is set.
3271Block protection bits (BP3-BP0): 0x0.
3272Device is not in continuously program mode (CP mode).
3273Status register writes are allowed.
3274"
ffa3848b
UH
32757785142-7785163 spiflash: field: "Status register"
32767785096-7785163 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32777824697-7824716 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32787824722-7824741 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3279Internal write enable latch is not set.
3280Block protection bits (BP3-BP0): 0x0.
3281Device is not in continuously program mode (CP mode).
3282Status register writes are allowed.
3283"
ffa3848b
UH
32847824722-7824741 spiflash: field: "Status register"
32857824697-7824741 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32867824743-7824762 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3287Internal write enable latch is not set.
3288Block protection bits (BP3-BP0): 0x0.
3289Device is not in continuously program mode (CP mode).
3290Status register writes are allowed.
3291"
ffa3848b
UH
32927824743-7824762 spiflash: field: "Status register"
32937824697-7824762 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
32947877297-7877318 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
32957882501-7882522 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
32967882522-7882541 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
32977882543-7882562 spiflash: bit: "Address bits 15..8: 0xaf" "Addr bits 15..8: 0xaf" "Addr bits 15..8" "A15..A8"
32987882564-7882583 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
32997882522-7882583 spiflash: field: "Address: 0x01af00" "Addr: 0x01af00" "0x01af00"
33007882584-7888446 spiflash: field: "Data (256 bytes)"
33017882501-7888448 spiflash: pp: "Page program (addr 0x01af00, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
33027889401-7889422 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33037889426-7889447 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3304Internal write enable latch is set.
3305Block protection bits (BP3-BP0): 0x0.
3306Device is not in continuously program mode (CP mode).
3307Status register writes are allowed.
3308"
ffa3848b
UH
33097889426-7889447 spiflash: field: "Status register"
33107889401-7889447 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33117889447-7889468 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3312Internal write enable latch is set.
3313Block protection bits (BP3-BP0): 0x0.
3314Device is not in continuously program mode (CP mode).
3315Status register writes are allowed.
3316"
ffa3848b
UH
33177889447-7889468 spiflash: field: "Status register"
33187889401-7889468 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33197924634-7924653 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33207924659-7924678 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3321Internal write enable latch is not set.
3322Block protection bits (BP3-BP0): 0x0.
3323Device is not in continuously program mode (CP mode).
3324Status register writes are allowed.
3325"
ffa3848b
UH
33267924659-7924678 spiflash: field: "Status register"
33277924634-7924678 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33287924680-7924699 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3329Internal write enable latch is not set.
3330Block protection bits (BP3-BP0): 0x0.
3331Device is not in continuously program mode (CP mode).
3332Status register writes are allowed.
3333"
ffa3848b
UH
33347924680-7924699 spiflash: field: "Status register"
33357924634-7924699 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33367974658-7974679 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
33377978423-7978442 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
33387978444-7978463 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
33397978464-7978485 spiflash: bit: "Address bits 15..8: 0xb0" "Addr bits 15..8: 0xb0" "Addr bits 15..8" "A15..A8"
33407978485-7978506 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
33417978444-7978506 spiflash: field: "Address: 0x01b000" "Addr: 0x01b000" "0x01b000"
33427978506-7983839 spiflash: field: "Data (256 bytes)"
33437978423-7983840 spiflash: pp: "Page program (addr 0x01b000, 256 bytes): lloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWor"
33447985088-7985107 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33457985113-7985132 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3346Internal write enable latch is set.
3347Block protection bits (BP3-BP0): 0x0.
3348Device is not in continuously program mode (CP mode).
3349Status register writes are allowed.
3350"
ffa3848b
UH
33517985113-7985132 spiflash: field: "Status register"
33527985088-7985132 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33537985133-7985154 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3354Internal write enable latch is set.
3355Block protection bits (BP3-BP0): 0x0.
3356Device is not in continuously program mode (CP mode).
3357Status register writes are allowed.
3358"
ffa3848b
UH
33597985133-7985154 spiflash: field: "Status register"
33607985088-7985154 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33618029473-8029494 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33628029498-8029519 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3363Internal write enable latch is not set.
3364Block protection bits (BP3-BP0): 0x0.
3365Device is not in continuously program mode (CP mode).
3366Status register writes are allowed.
3367"
ffa3848b
UH
33688029498-8029519 spiflash: field: "Status register"
33698029473-8029519 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33708029519-8029540 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3371Internal write enable latch is not set.
3372Block protection bits (BP3-BP0): 0x0.
3373Device is not in continuously program mode (CP mode).
3374Status register writes are allowed.
3375"
ffa3848b
UH
33768029519-8029540 spiflash: field: "Status register"
33778029473-8029540 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33788076877-8076896 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
33798082475-8082494 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
33808082495-8082516 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
33818082516-8082537 spiflash: bit: "Address bits 15..8: 0xb1" "Addr bits 15..8: 0xb1" "Addr bits 15..8" "A15..A8"
33828082537-8082558 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
33838082495-8082558 spiflash: field: "Address: 0x01b100" "Addr: 0x01b100" "0x01b100"
33848082558-8088411 spiflash: field: "Data (256 bytes)"
33858082475-8088413 spiflash: pp: "Page program (addr 0x01b100, 256 bytes): ldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHell"
33868089374-8089393 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33878089399-8089418 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3388Internal write enable latch is set.
3389Block protection bits (BP3-BP0): 0x0.
3390Device is not in continuously program mode (CP mode).
3391Status register writes are allowed.
3392"
ffa3848b
UH
33938089399-8089418 spiflash: field: "Status register"
33948089374-8089418 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
33958089420-8089439 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3396Internal write enable latch is set.
3397Block protection bits (BP3-BP0): 0x0.
3398Device is not in continuously program mode (CP mode).
3399Status register writes are allowed.
3400"
ffa3848b
UH
34018089420-8089439 spiflash: field: "Status register"
34028089374-8089439 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34038124656-8124677 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34048124681-8124702 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3405Internal write enable latch is not set.
3406Block protection bits (BP3-BP0): 0x0.
3407Device is not in continuously program mode (CP mode).
3408Status register writes are allowed.
3409"
ffa3848b
UH
34108124681-8124702 spiflash: field: "Status register"
34118124656-8124702 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34128124702-8124721 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3413Internal write enable latch is not set.
3414Block protection bits (BP3-BP0): 0x0.
3415Device is not in continuously program mode (CP mode).
3416Status register writes are allowed.
3417"
ffa3848b
UH
34188124702-8124721 spiflash: field: "Status register"
34198124656-8124721 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34208174120-8174139 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
34218178539-8178560 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
34228178560-8178581 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
34238178581-8178602 spiflash: bit: "Address bits 15..8: 0xb2" "Addr bits 15..8: 0xb2" "Addr bits 15..8" "A15..A8"
34248178602-8178621 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
34258178560-8178621 spiflash: field: "Address: 0x01b200" "Addr: 0x01b200" "0x01b200"
34268178623-8183956 spiflash: field: "Data (256 bytes)"
34278178539-8183956 spiflash: pp: "Page program (addr 0x01b200, 256 bytes): oWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorld"
34288185059-8185080 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34298185084-8185105 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3430Internal write enable latch is set.
3431Block protection bits (BP3-BP0): 0x0.
3432Device is not in continuously program mode (CP mode).
3433Status register writes are allowed.
3434"
ffa3848b
UH
34358185084-8185105 spiflash: field: "Status register"
34368185059-8185105 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34378185105-8185126 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3438Internal write enable latch is set.
3439Block protection bits (BP3-BP0): 0x0.
3440Device is not in continuously program mode (CP mode).
3441Status register writes are allowed.
3442"
ffa3848b
UH
34438185105-8185126 spiflash: field: "Status register"
34448185059-8185126 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34458225156-8225177 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34468225181-8225202 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3447Internal write enable latch is not set.
3448Block protection bits (BP3-BP0): 0x0.
3449Device is not in continuously program mode (CP mode).
3450Status register writes are allowed.
3451"
ffa3848b
UH
34528225181-8225202 spiflash: field: "Status register"
34538225156-8225202 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34548225202-8225223 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3455Internal write enable latch is not set.
3456Block protection bits (BP3-BP0): 0x0.
3457Device is not in continuously program mode (CP mode).
3458Status register writes are allowed.
3459"
ffa3848b
UH
34608225202-8225223 spiflash: field: "Status register"
34618225156-8225223 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34628275789-8275808 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
34638276960-8276981 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
34648276981-8277000 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
34658277002-8277021 spiflash: bit: "Address bits 15..8: 0xb3" "Addr bits 15..8: 0xb3" "Addr bits 15..8" "A15..A8"
34668277023-8277042 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
34678276981-8277042 spiflash: field: "Address: 0x01b300" "Addr: 0x01b300" "0x01b300"
34688277043-8282375 spiflash: field: "Data (256 bytes)"
34698276960-8282377 spiflash: pp: "Page program (addr 0x01b300, 256 bytes): HelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloW"
34708283094-8283115 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34718283119-8283140 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3472Internal write enable latch is set.
3473Block protection bits (BP3-BP0): 0x0.
3474Device is not in continuously program mode (CP mode).
3475Status register writes are allowed.
3476"
ffa3848b
UH
34778283119-8283140 spiflash: field: "Status register"
34788283094-8283140 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34798283140-8283159 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3480Internal write enable latch is set.
3481Block protection bits (BP3-BP0): 0x0.
3482Device is not in continuously program mode (CP mode).
3483Status register writes are allowed.
3484"
ffa3848b
UH
34858283140-8283159 spiflash: field: "Status register"
34868283094-8283159 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34878325154-8325175 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34888325179-8325200 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3489Internal write enable latch is not set.
3490Block protection bits (BP3-BP0): 0x0.
3491Device is not in continuously program mode (CP mode).
3492Status register writes are allowed.
3493"
ffa3848b
UH
34948325179-8325200 spiflash: field: "Status register"
34958325154-8325200 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
34968325200-8325219 spiflash: bit: "No write operation in progress.
5c1b6a10
UH
3497Internal write enable latch is not set.
3498Block protection bits (BP3-BP0): 0x0.
3499Device is not in continuously program mode (CP mode).
3500Status register writes are allowed.
3501"
ffa3848b
UH
35028325200-8325219 spiflash: field: "Status register"
35038325154-8325219 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
35048375676-8375697 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN"
35058376812-8376831 spiflash: field: "Command: Page program (PP)" "Command: Page program" "Cmd: Page program" "Cmd: PP" "PP"
35068376832-8376853 spiflash: bit: "Address bits 23..16: 0x01" "Addr bits 23..16: 0x01" "Addr bits 23..16" "A23..A16"
35078376853-8376874 spiflash: bit: "Address bits 15..8: 0xb4" "Addr bits 15..8: 0xb4" "Addr bits 15..8" "A15..A8"
35088376874-8376895 spiflash: bit: "Address bits 7..0: 0x00" "Addr bits 7..0: 0x00" "Addr bits 7..0" "A7..A0"
35098376832-8376895 spiflash: field: "Address: 0x01b400" "Addr: 0x01b400" "0x01b400"
35108376895-8382228 spiflash: field: "Data (256 bytes)"
35118376812-8382229 spiflash: pp: "Page program (addr 0x01b400, 256 bytes): orldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHelloWorldHe"
35128383075-8383096 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
35138383100-8383121 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3514Internal write enable latch is set.
3515Block protection bits (BP3-BP0): 0x0.
3516Device is not in continuously program mode (CP mode).
3517Status register writes are allowed.
3518"
ffa3848b
UH
35198383100-8383121 spiflash: field: "Status register"
35208383075-8383121 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
35218383121-8383142 spiflash: bit: "Write operation in progress.
5c1b6a10
UH
3522Internal write enable latch is set.
3523Block protection bits (BP3-BP0): 0x0.
3524Device is not in continuously program mode (CP mode).
3525Status register writes are allowed.
3526"
ffa3848b
UH
35278383121-8383142 spiflash: field: "Status register"
35288383075-8383142 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"