[sigrok-dumps.git] / i2s / 2ch-16bit-16khz / README

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I2S Master 2-channel 16-bit 16-kHz
-------------------------------------------------------------------------------

This is an example of an I2S master with a playing a recording of the BBC
shipping forecast through one channel, and the other channel disconnected.

Logic analyzer setup
--------------------

The logic analyzer used for capturing was a EE Electronics ESLA201A at a 
sample rate of 16MHz. The logic analyzer probes were connected to the I2S
pins like this:

  Probe       Signal
  ------------------------
  0           Clock
  1           Frame Select
  2           Data
Commit	Line	Data
fb21eed8 JH	1	-------------------------------------------------------------------------------
	2	I2S Master 2-channel 16-bit 16-kHz
	3	-------------------------------------------------------------------------------
	4
	5	This is an example of an I2S master with a playing a recording of the BBC
	6	shipping forecast through one channel, and the other channel disconnected.
	7
	8	Logic analyzer setup
	9	--------------------
	10
	11	The logic analyzer used for capturing was a EE Electronics ESLA201A at a
	12	sample rate of 16MHz. The logic analyzer probes were connected to the I2S
	13	pins like this:
	14
	15	Probe Signal
	16	------------------------
	17	0 Clock
	18	1 Frame Select
	19	2 Data