i2s: First I2S dump
authorJoel Holdsworth <joel@airwebreathe.org.uk>
Tue, 27 Mar 2012 21:41:06 +0000 (22:41 +0100)
committerUwe Hermann <uwe@hermann-uwe.de>
Thu, 29 Mar 2012 20:29:47 +0000 (22:29 +0200)
i2s/2ch-16bit-16khz/2ch-16bit-16khz.sr [new file with mode: 0644]
i2s/2ch-16bit-16khz/README [new file with mode: 0644]

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+-------------------------------------------------------------------------------
+I2S Master 2-channel 16-bit 16-kHz
+-------------------------------------------------------------------------------
+
+This is an example of an I2S master with a playing a recording of the BBC
+shipping forecast through one channel, and the other channel disconnected.
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used for capturing was a EE Electronics ESLA201A at a 
+sample rate of 16MHz. The logic analyzer probes were connected to the I2S
+pins like this:
+
+  Probe       Signal
+  ------------------------
+  0           Clock
+  1           Frame Select
+  2           Data