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f4816ac6 ML |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Martin Ling <martin-git@earth.li> | |
88e429c9 | 5 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> |
bafd4890 | 6 | * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de> |
f4816ac6 ML |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
6ec6c43b | 22 | #include <config.h> |
f4816ac6 | 23 | #include <stdlib.h> |
e0b7d23c ML |
24 | #include <stdarg.h> |
25 | #include <unistd.h> | |
26 | #include <errno.h> | |
a3df166f | 27 | #include <string.h> |
254dd102 | 28 | #include <math.h> |
bafd4890 ML |
29 | #include <ctype.h> |
30 | #include <time.h> | |
f4816ac6 | 31 | #include <glib.h> |
c1aae900 | 32 | #include <libsigrok/libsigrok.h> |
f4816ac6 | 33 | #include "libsigrok-internal.h" |
5a1afc09 | 34 | #include "scpi.h" |
f4816ac6 ML |
35 | #include "protocol.h" |
36 | ||
bafd4890 ML |
37 | /* |
38 | * This is a unified protocol driver for the DS1000 and DS2000 series. | |
39 | * | |
40 | * DS1000 support tested with a Rigol DS1102D. | |
41 | * | |
42 | * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02. | |
43 | * | |
44 | * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think) | |
45 | * standard. If you want to read it - it costs real money... | |
46 | * | |
47 | * Every response from the scope has a linefeed appended because the | |
48 | * standard says so. In principle this could be ignored because sending the | |
49 | * next command clears the output queue of the scope. This driver tries to | |
50 | * avoid doing that because it may cause an error being generated inside the | |
51 | * scope and who knows what bugs the firmware has WRT this. | |
52 | * | |
53 | * Waveform data is transferred in a format called "arbitrary block program | |
54 | * data" specified in IEEE 488.2. See Agilents programming manuals for their | |
55 | * 2000/3000 series scopes for a nice description. | |
56 | * | |
57 | * Each data block from the scope has a header, e.g. "#900000001400". | |
58 | * The '#' marks the start of a block. | |
59 | * Next is one ASCII decimal digit between 1 and 9, this gives the number of | |
60 | * ASCII decimal digits following. | |
61 | * Last are the ASCII decimal digits giving the number of bytes (not | |
62 | * samples!) in the block. | |
63 | * | |
64 | * After this header as many data bytes as indicated follow. | |
65 | * | |
66 | * Each data block has a trailing linefeed too. | |
67 | */ | |
68 | ||
bafd4890 ML |
69 | static int parse_int(const char *str, int *ret) |
70 | { | |
71 | char *e; | |
72 | long tmp; | |
73 | ||
74 | errno = 0; | |
75 | tmp = strtol(str, &e, 10); | |
76 | if (e == str || *e != '\0') { | |
77 | sr_dbg("Failed to parse integer: '%s'", str); | |
78 | return SR_ERR; | |
79 | } | |
80 | if (errno) { | |
81 | sr_dbg("Failed to parse integer: '%s', numerical overflow", str); | |
82 | return SR_ERR; | |
83 | } | |
84 | if (tmp > INT_MAX || tmp < INT_MIN) { | |
85 | sr_dbg("Failed to parse integer: '%s', value to large/small", str); | |
86 | return SR_ERR; | |
87 | } | |
88 | ||
89 | *ret = (int)tmp; | |
90 | return SR_OK; | |
91 | } | |
92 | ||
babab622 ML |
93 | /* Set the next event to wait for in rigol_ds_receive */ |
94 | static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event) | |
95 | { | |
96 | if (event == WAIT_STOP) | |
97 | devc->wait_status = 2; | |
98 | else | |
99 | devc->wait_status = 1; | |
100 | devc->wait_event = event; | |
101 | } | |
102 | ||
bafd4890 | 103 | /* |
babab622 ML |
104 | * Waiting for a event will return a timeout after 2 to 3 seconds in order |
105 | * to not block the application. | |
bafd4890 | 106 | */ |
babab622 | 107 | static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2) |
bafd4890 | 108 | { |
4fad41a8 | 109 | char *buf, c; |
bafd4890 ML |
110 | struct dev_context *devc; |
111 | time_t start; | |
112 | ||
113 | if (!(devc = sdi->priv)) | |
114 | return SR_ERR; | |
115 | ||
116 | start = time(NULL); | |
117 | ||
118 | /* | |
119 | * Trigger status may return: | |
babab622 ML |
120 | * "TD" or "T'D" - triggered |
121 | * "AUTO" - autotriggered | |
122 | * "RUN" - running | |
123 | * "WAIT" - waiting for trigger | |
124 | * "STOP" - stopped | |
bafd4890 ML |
125 | */ |
126 | ||
babab622 | 127 | if (devc->wait_status == 1) { |
bafd4890 ML |
128 | do { |
129 | if (time(NULL) - start >= 3) { | |
130 | sr_dbg("Timeout waiting for trigger"); | |
131 | return SR_ERR_TIMEOUT; | |
132 | } | |
133 | ||
334fbc2a | 134 | if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK) |
bafd4890 | 135 | return SR_ERR; |
4fad41a8 GS |
136 | c = buf[0]; |
137 | g_free(buf); | |
138 | } while (c == status1 || c == status2); | |
bafd4890 | 139 | |
babab622 | 140 | devc->wait_status = 2; |
bafd4890 | 141 | } |
babab622 | 142 | if (devc->wait_status == 2) { |
bafd4890 ML |
143 | do { |
144 | if (time(NULL) - start >= 3) { | |
145 | sr_dbg("Timeout waiting for trigger"); | |
146 | return SR_ERR_TIMEOUT; | |
147 | } | |
148 | ||
334fbc2a | 149 | if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK) |
bafd4890 | 150 | return SR_ERR; |
4fad41a8 GS |
151 | c = buf[0]; |
152 | g_free(buf); | |
153 | } while (c != status1 && c != status2); | |
bafd4890 | 154 | |
babab622 | 155 | rigol_ds_set_wait_event(devc, WAIT_NONE); |
bafd4890 ML |
156 | } |
157 | ||
158 | return SR_OK; | |
159 | } | |
160 | ||
161 | /* | |
babab622 ML |
162 | * For live capture we need to wait for a new trigger event to ensure that |
163 | * sample data is not returned twice. | |
bafd4890 ML |
164 | * |
165 | * Unfortunately this will never really work because for sufficiently fast | |
babab622 | 166 | * timebases and trigger rates it just can't catch the status changes. |
bafd4890 ML |
167 | * |
168 | * What would be needed is a trigger event register with autoreset like the | |
169 | * Agilents have. The Rigols don't seem to have anything like this. | |
170 | * | |
171 | * The workaround is to only wait for the trigger when the timebase is slow | |
172 | * enough. Of course this means that for faster timebases sample data can be | |
babab622 ML |
173 | * returned multiple times, this effect is mitigated somewhat by sleeping |
174 | * for about one sweep time in that case. | |
bafd4890 | 175 | */ |
babab622 | 176 | static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi) |
bafd4890 ML |
177 | { |
178 | struct dev_context *devc; | |
babab622 | 179 | long s; |
bafd4890 ML |
180 | |
181 | if (!(devc = sdi->priv)) | |
182 | return SR_ERR; | |
183 | ||
176d785d | 184 | /* |
babab622 ML |
185 | * If timebase < 50 msecs/DIV just sleep about one sweep time except |
186 | * for really fast sweeps. | |
187 | */ | |
c2b394d5 | 188 | if (devc->timebase < 0.0499) { |
babab622 ML |
189 | if (devc->timebase > 0.99e-6) { |
190 | /* | |
191 | * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100 | |
192 | * -> 85 percent of sweep time | |
193 | */ | |
569d4dbd | 194 | s = (devc->timebase * devc->model->series->num_horizontal_divs |
babab622 ML |
195 | * 85e6) / 100L; |
196 | sr_spew("Sleeping for %ld usecs instead of trigger-wait", s); | |
197 | g_usleep(s); | |
198 | } | |
199 | rigol_ds_set_wait_event(devc, WAIT_NONE); | |
200 | return SR_OK; | |
201 | } else { | |
202 | return rigol_ds_event_wait(sdi, 'T', 'A'); | |
203 | } | |
204 | } | |
bafd4890 | 205 | |
babab622 ML |
206 | /* Wait for scope to got to "Stop" in single shot mode */ |
207 | static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi) | |
208 | { | |
209 | return rigol_ds_event_wait(sdi, 'S', 'S'); | |
210 | } | |
211 | ||
212 | /* Check that a single shot acquisition actually succeeded on the DS2000 */ | |
213 | static int rigol_ds_check_stop(const struct sr_dev_inst *sdi) | |
214 | { | |
215 | struct dev_context *devc; | |
ba7dd8bb | 216 | struct sr_channel *ch; |
babab622 ML |
217 | int tmp; |
218 | ||
219 | if (!(devc = sdi->priv)) | |
bafd4890 | 220 | return SR_ERR; |
babab622 | 221 | |
ba7dd8bb | 222 | ch = devc->channel_entry->data; |
821fbcad | 223 | |
702f42e8 | 224 | if (devc->model->series->protocol != PROTOCOL_V3) |
e086b750 ML |
225 | return SR_OK; |
226 | ||
01dd7a4c | 227 | if (ch->type == SR_CHANNEL_LOGIC) { |
bbcffe51 | 228 | if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK) |
01dd7a4c ML |
229 | return SR_ERR; |
230 | } else { | |
231 | if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", | |
232 | ch->index + 1) != SR_OK) | |
233 | return SR_ERR; | |
234 | } | |
babab622 | 235 | /* Check that the number of samples will be accepted */ |
01dd7a4c ML |
236 | if (rigol_ds_config_set(sdi, ":WAV:POIN %d", |
237 | ch->type == SR_CHANNEL_LOGIC ? | |
238 | devc->digital_frame_size : | |
239 | devc->analog_frame_size) != SR_OK) | |
babab622 | 240 | return SR_ERR; |
334fbc2a | 241 | if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK) |
bafd4890 | 242 | return SR_ERR; |
babab622 ML |
243 | /* |
244 | * If we get an "Execution error" the scope went from "Single" to | |
245 | * "Stop" without actually triggering. There is no waveform | |
246 | * displayed and trying to download one will fail - the scope thinks | |
247 | * it has 1400 samples (like display memory) and the driver thinks | |
248 | * it has a different number of samples. | |
249 | * | |
250 | * In that case just try to capture something again. Might still | |
251 | * fail in interesting ways. | |
252 | * | |
253 | * Ain't firmware fun? | |
254 | */ | |
255 | if (tmp & 0x10) { | |
256 | sr_warn("Single shot acquisition failed, retrying..."); | |
257 | /* Sleep a bit, otherwise the single shot will often fail */ | |
1a46cc62 | 258 | g_usleep(500 * 1000); |
38354d9d | 259 | rigol_ds_config_set(sdi, ":SING"); |
babab622 | 260 | rigol_ds_set_wait_event(devc, WAIT_STOP); |
bafd4890 | 261 | return SR_ERR; |
babab622 | 262 | } |
bafd4890 | 263 | |
babab622 ML |
264 | return SR_OK; |
265 | } | |
bafd4890 | 266 | |
babab622 ML |
267 | /* Wait for enough data becoming available in scope output buffer */ |
268 | static int rigol_ds_block_wait(const struct sr_dev_inst *sdi) | |
269 | { | |
73c575cf | 270 | char *buf, c; |
babab622 ML |
271 | struct dev_context *devc; |
272 | time_t start; | |
4fad41a8 | 273 | int len, ret; |
babab622 ML |
274 | |
275 | if (!(devc = sdi->priv)) | |
276 | return SR_ERR; | |
277 | ||
702f42e8 | 278 | if (devc->model->series->protocol == PROTOCOL_V3) { |
babab622 | 279 | |
4472867a ML |
280 | start = time(NULL); |
281 | ||
282 | do { | |
283 | if (time(NULL) - start >= 3) { | |
284 | sr_dbg("Timeout waiting for data block"); | |
285 | return SR_ERR_TIMEOUT; | |
286 | } | |
babab622 | 287 | |
4472867a ML |
288 | /* |
289 | * The scope copies data really slowly from sample | |
290 | * memory to its output buffer, so try not to bother | |
291 | * it too much with SCPI requests but don't wait too | |
292 | * long for short sample frame sizes. | |
293 | */ | |
1a46cc62 | 294 | g_usleep(devc->analog_frame_size < (15 * 1000) ? (100 * 1000) : (1000 * 1000)); |
4472867a ML |
295 | |
296 | /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */ | |
297 | if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK) | |
298 | return SR_ERR; | |
4fad41a8 | 299 | ret = parse_int(buf + 5, &len); |
73c575cf | 300 | c = buf[0]; |
4fad41a8 GS |
301 | g_free(buf); |
302 | if (ret != SR_OK) | |
4472867a | 303 | return SR_ERR; |
73c575cf | 304 | } while (c == 'R' && len < (1000 * 1000)); |
4472867a | 305 | } |
babab622 ML |
306 | |
307 | rigol_ds_set_wait_event(devc, WAIT_NONE); | |
308 | ||
309 | return SR_OK; | |
310 | } | |
311 | ||
38354d9d ML |
312 | /* Send a configuration setting. */ |
313 | SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...) | |
314 | { | |
315 | struct dev_context *devc = sdi->priv; | |
316 | va_list args; | |
317 | int ret; | |
318 | ||
319 | va_start(args, format); | |
320 | ret = sr_scpi_send_variadic(sdi->conn, format, args); | |
321 | va_end(args); | |
322 | ||
323 | if (ret != SR_OK) | |
324 | return SR_ERR; | |
325 | ||
569d4dbd | 326 | if (devc->model->series->protocol == PROTOCOL_V2) { |
38354d9d ML |
327 | /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */ |
328 | sr_spew("delay %dms", 100); | |
1a46cc62 | 329 | g_usleep(100 * 1000); |
38354d9d ML |
330 | return SR_OK; |
331 | } else { | |
332 | return sr_scpi_get_opc(sdi->conn); | |
333 | } | |
334 | } | |
335 | ||
babab622 ML |
336 | /* Start capturing a new frameset */ |
337 | SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi) | |
338 | { | |
339 | struct dev_context *devc; | |
e086b750 | 340 | gchar *trig_mode; |
702f42e8 | 341 | unsigned int num_channels, i, j; |
47b821dc | 342 | int buffer_samples; |
4fad41a8 | 343 | int ret; |
babab622 ML |
344 | |
345 | if (!(devc = sdi->priv)) | |
346 | return SR_ERR; | |
347 | ||
16e96ca3 VO |
348 | const gboolean first_frame = (devc->num_frames == 0); |
349 | ||
8cbe5339 VO |
350 | uint64_t limit_frames = devc->limit_frames; |
351 | if (devc->num_frames_segmented != 0 && devc->num_frames_segmented < limit_frames) | |
352 | limit_frames = devc->num_frames_segmented; | |
353 | if (limit_frames == 0) | |
9ad1d49c UH |
354 | sr_dbg("Starting data capture for frameset %" PRIu64, |
355 | devc->num_frames + 1); | |
356 | else | |
357 | sr_dbg("Starting data capture for frameset %" PRIu64 " of %" | |
8cbe5339 | 358 | PRIu64, devc->num_frames + 1, limit_frames); |
babab622 | 359 | |
569d4dbd ML |
360 | switch (devc->model->series->protocol) { |
361 | case PROTOCOL_V1: | |
362 | rigol_ds_set_wait_event(devc, WAIT_TRIGGER); | |
363 | break; | |
364 | case PROTOCOL_V2: | |
365 | if (devc->data_source == DATA_SOURCE_LIVE) { | |
366 | if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK) | |
e086b750 | 367 | return SR_ERR; |
569d4dbd | 368 | rigol_ds_set_wait_event(devc, WAIT_TRIGGER); |
e086b750 | 369 | } else { |
e086b750 ML |
370 | if (rigol_ds_config_set(sdi, ":STOP") != SR_OK) |
371 | return SR_ERR; | |
372 | if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK) | |
373 | return SR_ERR; | |
374 | if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK) | |
375 | return SR_ERR; | |
4fad41a8 GS |
376 | ret = rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode); |
377 | g_free(trig_mode); | |
378 | if (ret != SR_OK) | |
e086b750 ML |
379 | return SR_ERR; |
380 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) | |
381 | return SR_ERR; | |
569d4dbd ML |
382 | rigol_ds_set_wait_event(devc, WAIT_STOP); |
383 | } | |
384 | break; | |
385 | case PROTOCOL_V3: | |
702f42e8 | 386 | case PROTOCOL_V4: |
f6129c8f | 387 | case PROTOCOL_V5: |
16e96ca3 | 388 | if (first_frame && rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK) |
569d4dbd ML |
389 | return SR_ERR; |
390 | if (devc->data_source == DATA_SOURCE_LIVE) { | |
16e96ca3 | 391 | if (first_frame && rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK) |
569d4dbd | 392 | return SR_ERR; |
702f42e8 ML |
393 | devc->analog_frame_size = devc->model->series->live_samples; |
394 | devc->digital_frame_size = devc->model->series->live_samples; | |
569d4dbd | 395 | rigol_ds_set_wait_event(devc, WAIT_TRIGGER); |
e086b750 | 396 | } else { |
702f42e8 | 397 | if (devc->model->series->protocol == PROTOCOL_V3) { |
16e96ca3 | 398 | if (first_frame && rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK) |
702f42e8 | 399 | return SR_ERR; |
f6129c8f | 400 | } else if (devc->model->series->protocol >= PROTOCOL_V4) { |
702f42e8 ML |
401 | num_channels = 0; |
402 | ||
403 | /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */ | |
404 | for (i = 0; i < devc->model->analog_channels; i++) { | |
405 | if (devc->analog_channels[i]) { | |
406 | num_channels++; | |
407 | } else if (i >= 2 && devc->model->has_digital) { | |
408 | for (j = 0; j < 8; j++) { | |
409 | if (devc->digital_channels[8 * (i - 2) + j]) { | |
410 | num_channels++; | |
411 | break; | |
412 | } | |
413 | } | |
414 | } | |
415 | } | |
416 | ||
47b821dc | 417 | buffer_samples = devc->model->series->buffer_samples; |
16e96ca3 | 418 | if (first_frame && buffer_samples == 0) |
47b821dc ML |
419 | { |
420 | /* The DS4000 series does not have a fixed memory depth, it | |
421 | * can be chosen from the menu and also varies with number | |
422 | * of active channels. Retrieve the actual number with the | |
423 | * ACQ:MDEP command. */ | |
424 | sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples); | |
425 | devc->analog_frame_size = devc->digital_frame_size = | |
426 | buffer_samples; | |
427 | } | |
16e96ca3 | 428 | else if (first_frame) |
47b821dc ML |
429 | { |
430 | /* The DS1000Z series has a fixed memory depth which we | |
431 | * need to divide correctly according to the number of | |
432 | * active channels. */ | |
433 | devc->analog_frame_size = devc->digital_frame_size = | |
434 | num_channels == 1 ? | |
435 | buffer_samples : | |
436 | num_channels == 2 ? | |
437 | buffer_samples / 2 : | |
438 | buffer_samples / 4; | |
439 | } | |
702f42e8 ML |
440 | } |
441 | ||
16e96ca3 | 442 | if (devc->data_source == DATA_SOURCE_LIVE && rigol_ds_config_set(sdi, ":SINGL") != SR_OK) |
e086b750 | 443 | return SR_ERR; |
569d4dbd | 444 | rigol_ds_set_wait_event(devc, WAIT_STOP); |
19f31c8a | 445 | if (devc->data_source == DATA_SOURCE_SEGMENTED && |
06ed999a | 446 | devc->model->series->protocol <= PROTOCOL_V4) |
8cbe5339 VO |
447 | if (rigol_ds_config_set(sdi, "FUNC:WREP:FCUR %d", devc->num_frames + 1) != SR_OK) |
448 | return SR_ERR; | |
e086b750 | 449 | } |
569d4dbd | 450 | break; |
bafd4890 ML |
451 | } |
452 | ||
453 | return SR_OK; | |
454 | } | |
455 | ||
babab622 ML |
456 | /* Start reading data from the current channel */ |
457 | SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi) | |
458 | { | |
459 | struct dev_context *devc; | |
ba7dd8bb | 460 | struct sr_channel *ch; |
babab622 ML |
461 | |
462 | if (!(devc = sdi->priv)) | |
463 | return SR_ERR; | |
464 | ||
ba7dd8bb | 465 | ch = devc->channel_entry->data; |
821fbcad | 466 | |
ba7dd8bb | 467 | sr_dbg("Starting reading data from channel %d", ch->index + 1); |
babab622 | 468 | |
16e96ca3 VO |
469 | const gboolean first_frame = (devc->num_frames == 0); |
470 | ||
2ea67fc9 | 471 | switch (devc->model->series->protocol) { |
702f42e8 ML |
472 | case PROTOCOL_V1: |
473 | case PROTOCOL_V2: | |
3f239f08 | 474 | if (ch->type == SR_CHANNEL_LOGIC) { |
677f85d0 ML |
475 | if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK) |
476 | return SR_ERR; | |
477 | } else { | |
821fbcad | 478 | if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d", |
ba7dd8bb | 479 | ch->index + 1) != SR_OK) |
677f85d0 ML |
480 | return SR_ERR; |
481 | } | |
e086b750 | 482 | rigol_ds_set_wait_event(devc, WAIT_NONE); |
702f42e8 ML |
483 | break; |
484 | case PROTOCOL_V3: | |
01dd7a4c | 485 | if (ch->type == SR_CHANNEL_LOGIC) { |
bbcffe51 | 486 | if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK) |
01dd7a4c ML |
487 | return SR_ERR; |
488 | } else { | |
489 | if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", | |
490 | ch->index + 1) != SR_OK) | |
491 | return SR_ERR; | |
492 | } | |
677f85d0 | 493 | if (devc->data_source != DATA_SOURCE_LIVE) { |
38354d9d | 494 | if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK) |
677f85d0 | 495 | return SR_ERR; |
38354d9d | 496 | if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK) |
677f85d0 | 497 | return SR_ERR; |
aff00e40 | 498 | } |
702f42e8 ML |
499 | break; |
500 | case PROTOCOL_V4: | |
f6129c8f | 501 | case PROTOCOL_V5: |
702f42e8 ML |
502 | if (ch->type == SR_CHANNEL_ANALOG) { |
503 | if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", | |
504 | ch->index + 1) != SR_OK) | |
505 | return SR_ERR; | |
506 | } else { | |
507 | if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d", | |
508 | ch->index) != SR_OK) | |
509 | return SR_ERR; | |
510 | } | |
511 | ||
16e96ca3 | 512 | if (first_frame && rigol_ds_config_set(sdi, |
702f42e8 ML |
513 | devc->data_source == DATA_SOURCE_LIVE ? |
514 | ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK) | |
515 | return SR_ERR; | |
704910e3 VO |
516 | |
517 | if (devc->data_source != DATA_SOURCE_LIVE) { | |
518 | if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK) | |
519 | return SR_ERR; | |
520 | } | |
702f42e8 ML |
521 | break; |
522 | } | |
523 | ||
524 | if (devc->model->series->protocol >= PROTOCOL_V3 && | |
525 | ch->type == SR_CHANNEL_ANALOG) { | |
6b04525b | 526 | /* Vertical increment. */ |
16e96ca3 | 527 | if (first_frame && sr_scpi_get_float(sdi->conn, ":WAV:YINC?", |
6b04525b | 528 | &devc->vert_inc[ch->index]) != SR_OK) |
55bece00 UH |
529 | return SR_ERR; |
530 | /* Vertical origin. */ | |
16e96ca3 | 531 | if (first_frame && sr_scpi_get_float(sdi->conn, ":WAV:YOR?", |
55bece00 UH |
532 | &devc->vert_origin[ch->index]) != SR_OK) |
533 | return SR_ERR; | |
702f42e8 | 534 | /* Vertical reference. */ |
16e96ca3 | 535 | if (first_frame && sr_scpi_get_int(sdi->conn, ":WAV:YREF?", |
702f42e8 ML |
536 | &devc->vert_reference[ch->index]) != SR_OK) |
537 | return SR_ERR; | |
6b04525b VO |
538 | } else if (ch->type == SR_CHANNEL_ANALOG) { |
539 | devc->vert_inc[ch->index] = devc->vdiv[ch->index] / 25.6; | |
677f85d0 | 540 | } |
babab622 | 541 | |
aff00e40 ML |
542 | rigol_ds_set_wait_event(devc, WAIT_BLOCK); |
543 | ||
f76c24f6 | 544 | devc->num_channel_bytes = 0; |
aff00e40 | 545 | devc->num_header_bytes = 0; |
babab622 ML |
546 | devc->num_block_bytes = 0; |
547 | ||
548 | return SR_OK; | |
549 | } | |
550 | ||
551 | /* Read the header of a data block */ | |
aff00e40 | 552 | static int rigol_ds_read_header(struct sr_dev_inst *sdi) |
bafd4890 | 553 | { |
aff00e40 ML |
554 | struct sr_scpi_dev_inst *scpi = sdi->conn; |
555 | struct dev_context *devc = sdi->priv; | |
556 | char *buf = (char *) devc->buffer; | |
fe0d9caa ML |
557 | size_t header_length; |
558 | int ret; | |
aff00e40 ML |
559 | |
560 | /* Try to read the hashsign and length digit. */ | |
561 | if (devc->num_header_bytes < 2) { | |
fe0d9caa | 562 | ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes, |
aff00e40 | 563 | 2 - devc->num_header_bytes); |
fe0d9caa | 564 | if (ret < 0) { |
aff00e40 ML |
565 | sr_err("Read error while reading data header."); |
566 | return SR_ERR; | |
567 | } | |
fe0d9caa | 568 | devc->num_header_bytes += ret; |
bafd4890 | 569 | } |
aff00e40 ML |
570 | |
571 | if (devc->num_header_bytes < 2) | |
572 | return 0; | |
573 | ||
574 | if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') { | |
575 | sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]); | |
576 | return SR_ERR; | |
bafd4890 | 577 | } |
bafd4890 | 578 | |
fe0d9caa | 579 | header_length = 2 + buf[1] - '0'; |
aff00e40 ML |
580 | |
581 | /* Try to read the length. */ | |
fe0d9caa ML |
582 | if (devc->num_header_bytes < header_length) { |
583 | ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes, | |
584 | header_length - devc->num_header_bytes); | |
585 | if (ret < 0) { | |
aff00e40 ML |
586 | sr_err("Read error while reading data header."); |
587 | return SR_ERR; | |
588 | } | |
fe0d9caa | 589 | devc->num_header_bytes += ret; |
bafd4890 | 590 | } |
aff00e40 | 591 | |
fe0d9caa | 592 | if (devc->num_header_bytes < header_length) |
aff00e40 ML |
593 | return 0; |
594 | ||
595 | /* Read the data length. */ | |
fe0d9caa | 596 | buf[header_length] = '\0'; |
aff00e40 | 597 | |
fe0d9caa | 598 | if (parse_int(buf + 2, &ret) != SR_OK) { |
aff00e40 | 599 | sr_err("Received invalid data block length '%s'.", buf + 2); |
bafd4890 ML |
600 | return -1; |
601 | } | |
602 | ||
fe0d9caa | 603 | sr_dbg("Received data block header: '%s' -> block length %d", buf, ret); |
bafd4890 | 604 | |
fe0d9caa | 605 | return ret; |
bafd4890 ML |
606 | } |
607 | ||
3086efdd | 608 | SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data) |
f4816ac6 | 609 | { |
e0b7d23c | 610 | struct sr_dev_inst *sdi; |
ae1bc1cc | 611 | struct sr_scpi_dev_inst *scpi; |
f4816ac6 | 612 | struct dev_context *devc; |
e0b7d23c | 613 | struct sr_datafeed_packet packet; |
246399f7 UH |
614 | struct sr_datafeed_analog analog; |
615 | struct sr_analog_encoding encoding; | |
616 | struct sr_analog_meaning meaning; | |
617 | struct sr_analog_spec spec; | |
6bb192bc | 618 | struct sr_datafeed_logic logic; |
6b04525b | 619 | double vdiv, offset, origin; |
f80a0bf2 | 620 | int len, i, vref; |
ba7dd8bb | 621 | struct sr_channel *ch; |
bac11aeb | 622 | gsize expected_data_bytes; |
f4816ac6 | 623 | |
decfe89d | 624 | (void)fd; |
9bd4c956 | 625 | |
f4816ac6 ML |
626 | if (!(sdi = cb_data)) |
627 | return TRUE; | |
628 | ||
629 | if (!(devc = sdi->priv)) | |
630 | return TRUE; | |
631 | ||
ae1bc1cc | 632 | scpi = sdi->conn; |
9bd4c956 | 633 | |
dc89faea UH |
634 | if (!(revents == G_IO_IN || revents == 0)) |
635 | return TRUE; | |
636 | ||
16e96ca3 VO |
637 | const gboolean first_frame = (devc->num_frames == 0); |
638 | ||
dc89faea UH |
639 | switch (devc->wait_event) { |
640 | case WAIT_NONE: | |
641 | break; | |
642 | case WAIT_TRIGGER: | |
643 | if (rigol_ds_trigger_wait(sdi) != SR_OK) | |
3918fbb0 | 644 | return TRUE; |
dc89faea | 645 | if (rigol_ds_channel_start(sdi) != SR_OK) |
e086b750 | 646 | return TRUE; |
dc89faea UH |
647 | return TRUE; |
648 | case WAIT_BLOCK: | |
649 | if (rigol_ds_block_wait(sdi) != SR_OK) | |
650 | return TRUE; | |
651 | break; | |
652 | case WAIT_STOP: | |
653 | if (rigol_ds_stop_wait(sdi) != SR_OK) | |
654 | return TRUE; | |
655 | if (rigol_ds_check_stop(sdi) != SR_OK) | |
656 | return TRUE; | |
657 | if (rigol_ds_channel_start(sdi) != SR_OK) | |
658 | return TRUE; | |
659 | return TRUE; | |
660 | default: | |
661 | sr_err("BUG: Unknown event target encountered"); | |
662 | break; | |
663 | } | |
f76c24f6 | 664 | |
dc89faea | 665 | ch = devc->channel_entry->data; |
702f42e8 | 666 | |
dc89faea UH |
667 | expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ? |
668 | devc->analog_frame_size : devc->digital_frame_size; | |
bac11aeb | 669 | |
dc89faea UH |
670 | if (devc->num_block_bytes == 0) { |
671 | if (devc->model->series->protocol >= PROTOCOL_V4) { | |
16e96ca3 | 672 | if (first_frame && rigol_ds_config_set(sdi, ":WAV:START %d", |
dc89faea UH |
673 | devc->num_channel_bytes + 1) != SR_OK) |
674 | return TRUE; | |
16e96ca3 | 675 | if (first_frame && rigol_ds_config_set(sdi, ":WAV:STOP %d", |
dc89faea UH |
676 | MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE, |
677 | devc->analog_frame_size)) != SR_OK) | |
05c644ea | 678 | return TRUE; |
bafd4890 | 679 | } |
f80a0bf2 | 680 | |
704910e3 VO |
681 | if (devc->model->series->protocol >= PROTOCOL_V3) { |
682 | if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK) | |
683 | return TRUE; | |
dc89faea UH |
684 | if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK) |
685 | return TRUE; | |
704910e3 | 686 | } |
f80a0bf2 | 687 | |
dc89faea | 688 | if (sr_scpi_read_begin(scpi) != SR_OK) |
7d63347e | 689 | return TRUE; |
6bb192bc | 690 | |
dc89faea UH |
691 | if (devc->format == FORMAT_IEEE488_2) { |
692 | sr_dbg("New block header expected"); | |
693 | len = rigol_ds_read_header(sdi); | |
694 | if (len == 0) | |
695 | /* Still reading the header. */ | |
696 | return TRUE; | |
697 | if (len == -1) { | |
350501d0 | 698 | sr_err("Error while reading block header, aborting capture."); |
4c5f7006 | 699 | std_session_send_df_frame_end(sdi); |
d2f7c417 | 700 | sr_dev_acquisition_stop(sdi); |
3ed7a40c ML |
701 | return TRUE; |
702 | } | |
69990295 AL |
703 | /* At slow timebases in live capture the DS2072 and |
704 | * DS1054Z sometimes return "short" data blocks, with | |
dc89faea | 705 | * apparently no way to get the rest of the data. |
69990295 AL |
706 | * Discard these, the complete data block will appear |
707 | * eventually. | |
dc89faea UH |
708 | */ |
709 | if (devc->data_source == DATA_SOURCE_LIVE | |
710 | && (unsigned)len < expected_data_bytes) { | |
69990295 | 711 | sr_dbg("Discarding short data block: got %d/%d bytes\n", len, (int)expected_data_bytes); |
dc89faea | 712 | sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1); |
69990295 | 713 | devc->num_header_bytes = 0; |
dc89faea UH |
714 | return TRUE; |
715 | } | |
716 | devc->num_block_bytes = len; | |
48460c6f | 717 | } else { |
dc89faea | 718 | devc->num_block_bytes = expected_data_bytes; |
ee7e9bee | 719 | } |
dc89faea UH |
720 | devc->num_block_read = 0; |
721 | } | |
75d8a4e5 | 722 | |
dc89faea UH |
723 | len = devc->num_block_bytes - devc->num_block_read; |
724 | if (len > ACQ_BUFFER_SIZE) | |
725 | len = ACQ_BUFFER_SIZE; | |
726 | sr_dbg("Requesting read of %d bytes", len); | |
48460c6f | 727 | |
dc89faea | 728 | len = sr_scpi_read_data(scpi, (char *)devc->buffer, len); |
48460c6f | 729 | |
dc89faea | 730 | if (len == -1) { |
350501d0 | 731 | sr_err("Error while reading block data, aborting capture."); |
4c5f7006 | 732 | std_session_send_df_frame_end(sdi); |
d2f7c417 | 733 | sr_dev_acquisition_stop(sdi); |
dc89faea UH |
734 | return TRUE; |
735 | } | |
736 | ||
737 | sr_dbg("Received %d bytes.", len); | |
738 | ||
739 | devc->num_block_read += len; | |
740 | ||
741 | if (ch->type == SR_CHANNEL_ANALOG) { | |
742 | vref = devc->vert_reference[ch->index]; | |
6b04525b VO |
743 | vdiv = devc->vert_inc[ch->index]; |
744 | origin = devc->vert_origin[ch->index]; | |
dc89faea UH |
745 | offset = devc->vert_offset[ch->index]; |
746 | if (devc->model->series->protocol >= PROTOCOL_V3) | |
747 | for (i = 0; i < len; i++) | |
6b04525b | 748 | devc->data[i] = ((int)devc->buffer[i] - vref - origin) * vdiv; |
dc89faea UH |
749 | else |
750 | for (i = 0; i < len; i++) | |
751 | devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset; | |
b8f07f42 AJ |
752 | float vdivlog = log10f(vdiv); |
753 | int digits = -(int)vdivlog + (vdivlog < 0.0); | |
754 | sr_analog_init(&analog, &encoding, &meaning, &spec, digits); | |
246399f7 | 755 | analog.meaning->channels = g_slist_append(NULL, ch); |
dc89faea UH |
756 | analog.num_samples = len; |
757 | analog.data = devc->data; | |
246399f7 UH |
758 | analog.meaning->mq = SR_MQ_VOLTAGE; |
759 | analog.meaning->unit = SR_UNIT_VOLT; | |
760 | analog.meaning->mqflags = 0; | |
761 | packet.type = SR_DF_ANALOG; | |
dc89faea | 762 | packet.payload = &analog; |
695dc859 | 763 | sr_session_send(sdi, &packet); |
246399f7 | 764 | g_slist_free(analog.meaning->channels); |
dc89faea UH |
765 | } else { |
766 | logic.length = len; | |
767 | // TODO: For the MSO1000Z series, we need a way to express that | |
768 | // this data is in fact just for a single channel, with the valid | |
769 | // data for that channel in the LSB of each byte. | |
f6129c8f | 770 | logic.unitsize = devc->model->series->protocol >= PROTOCOL_V4 ? 1 : 2; |
dc89faea UH |
771 | logic.data = devc->buffer; |
772 | packet.type = SR_DF_LOGIC; | |
773 | packet.payload = &logic; | |
695dc859 | 774 | sr_session_send(sdi, &packet); |
dc89faea UH |
775 | } |
776 | ||
777 | if (devc->num_block_read == devc->num_block_bytes) { | |
778 | sr_dbg("Block has been completed"); | |
779 | if (devc->model->series->protocol >= PROTOCOL_V3) { | |
780 | /* Discard the terminating linefeed */ | |
781 | sr_scpi_read_data(scpi, (char *)devc->buffer, 1); | |
782 | } | |
783 | if (devc->format == FORMAT_IEEE488_2) { | |
784 | /* Prepare for possible next block */ | |
785 | devc->num_header_bytes = 0; | |
786 | devc->num_block_bytes = 0; | |
babab622 | 787 | if (devc->data_source != DATA_SOURCE_LIVE) |
dc89faea | 788 | rigol_ds_set_wait_event(devc, WAIT_BLOCK); |
babab622 | 789 | } |
ce97fc3f | 790 | if (!sr_scpi_read_complete(scpi) && !devc->channel_entry->next) { |
dc89faea | 791 | sr_err("Read should have been completed"); |
dc89faea UH |
792 | } |
793 | devc->num_block_read = 0; | |
794 | } else { | |
6433156c DE |
795 | sr_dbg("%" PRIu64 " of %" PRIu64 " block bytes read", |
796 | devc->num_block_read, devc->num_block_bytes); | |
dc89faea | 797 | } |
f76c24f6 | 798 | |
dc89faea | 799 | devc->num_channel_bytes += len; |
f76c24f6 | 800 | |
dc89faea UH |
801 | if (devc->num_channel_bytes < expected_data_bytes) |
802 | /* Don't have the full data for this channel yet, re-run. */ | |
803 | return TRUE; | |
f76c24f6 | 804 | |
dc89faea UH |
805 | /* End of data for this channel. */ |
806 | if (devc->model->series->protocol == PROTOCOL_V3) { | |
807 | /* Signal end of data download to scope */ | |
808 | if (devc->data_source != DATA_SOURCE_LIVE) | |
809 | /* | |
810 | * This causes a query error, without it switching | |
811 | * to the next channel causes an error. Fun with | |
812 | * firmware... | |
813 | */ | |
814 | rigol_ds_config_set(sdi, ":WAV:END"); | |
815 | } | |
816 | ||
817 | if (devc->channel_entry->next) { | |
818 | /* We got the frame for this channel, now get the next channel. */ | |
819 | devc->channel_entry = devc->channel_entry->next; | |
820 | rigol_ds_channel_start(sdi); | |
821 | } else { | |
822 | /* Done with this frame. */ | |
4c5f7006 | 823 | std_session_send_df_frame_end(sdi); |
dc89faea | 824 | |
19f31c8a VO |
825 | devc->num_frames++; |
826 | ||
827 | /* V5 has no way to read the number of recorded frames, so try to set the | |
828 | * next frame and read it back instead. | |
829 | */ | |
830 | if (devc->data_source == DATA_SOURCE_SEGMENTED && | |
831 | devc->model->series->protocol == PROTOCOL_V5) { | |
832 | int frames = 0; | |
833 | if (rigol_ds_config_set(sdi, "REC:CURR %d", devc->num_frames + 1) != SR_OK) | |
834 | return SR_ERR; | |
835 | if (sr_scpi_get_int(sdi->conn, "REC:CURR?", &frames) != SR_OK) | |
836 | return SR_ERR; | |
837 | devc->num_frames_segmented = frames; | |
838 | } | |
839 | ||
840 | if (devc->num_frames == devc->limit_frames || | |
8cbe5339 VO |
841 | devc->num_frames == devc->num_frames_segmented || |
842 | devc->data_source == DATA_SOURCE_MEMORY) { | |
dc89faea | 843 | /* Last frame, stop capture. */ |
d2f7c417 | 844 | sr_dev_acquisition_stop(sdi); |
dc89faea UH |
845 | } else { |
846 | /* Get the next frame, starting with the first channel. */ | |
847 | devc->channel_entry = devc->enabled_channels; | |
848 | ||
849 | rigol_ds_capture_start(sdi); | |
850 | ||
851 | /* Start of next frame. */ | |
4c5f7006 | 852 | std_session_send_df_frame_begin(sdi); |
75d8a4e5 | 853 | } |
f4816ac6 ML |
854 | } |
855 | ||
856 | return TRUE; | |
857 | } | |
e0b7d23c | 858 | |
3086efdd | 859 | SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi) |
254dd102 BV |
860 | { |
861 | struct dev_context *devc; | |
e264ebde | 862 | struct sr_channel *ch; |
98bfc474 | 863 | char *cmd; |
821fbcad ML |
864 | unsigned int i; |
865 | int res; | |
254dd102 BV |
866 | |
867 | devc = sdi->priv; | |
868 | ||
6bb192bc | 869 | /* Analog channel state. */ |
821fbcad ML |
870 | for (i = 0; i < devc->model->analog_channels; i++) { |
871 | cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1); | |
98bfc474 | 872 | res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]); |
821fbcad ML |
873 | g_free(cmd); |
874 | if (res != SR_OK) | |
875 | return SR_ERR; | |
e264ebde AJ |
876 | ch = g_slist_nth_data(sdi->channels, i); |
877 | ch->enabled = devc->analog_channels[i]; | |
821fbcad ML |
878 | } |
879 | sr_dbg("Current analog channel state:"); | |
880 | for (i = 0; i < devc->model->analog_channels; i++) | |
881 | sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off"); | |
6bb192bc ML |
882 | |
883 | /* Digital channel state. */ | |
bafd4890 | 884 | if (devc->model->has_digital) { |
702f42e8 | 885 | if (sr_scpi_get_bool(sdi->conn, |
01dd7a4c | 886 | devc->model->series->protocol >= PROTOCOL_V3 ? |
702f42e8 | 887 | ":LA:STAT?" : ":LA:DISP?", |
98bfc474 | 888 | &devc->la_enabled) != SR_OK) |
04e8e01e | 889 | return SR_ERR; |
04e8e01e ML |
890 | sr_dbg("Logic analyzer %s, current digital channel state:", |
891 | devc->la_enabled ? "enabled" : "disabled"); | |
effb9dd1 | 892 | for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) { |
f6129c8f SR |
893 | if (devc->model->series->protocol >= PROTOCOL_V5) |
894 | cmd = g_strdup_printf(":LA:DISP? D%d", i); | |
895 | else if (devc->model->series->protocol >= PROTOCOL_V3) | |
896 | cmd = g_strdup_printf(":LA:DIG%d:DISP?", i); | |
897 | else | |
898 | cmd = g_strdup_printf(":DIG%d:TURN?", i); | |
98bfc474 | 899 | res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]); |
6bb192bc ML |
900 | g_free(cmd); |
901 | if (res != SR_OK) | |
902 | return SR_ERR; | |
e264ebde AJ |
903 | ch = g_slist_nth_data(sdi->channels, i + devc->model->analog_channels); |
904 | ch->enabled = devc->digital_channels[i]; | |
bfaf112b | 905 | sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off"); |
6bb192bc ML |
906 | } |
907 | } | |
254dd102 BV |
908 | |
909 | /* Timebase. */ | |
334fbc2a | 910 | if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK) |
254dd102 | 911 | return SR_ERR; |
bafd4890 | 912 | sr_dbg("Current timebase %g", devc->timebase); |
254dd102 | 913 | |
934cf6cf AJ |
914 | /* Probe attenuation. */ |
915 | for (i = 0; i < devc->model->analog_channels; i++) { | |
916 | cmd = g_strdup_printf(":CHAN%d:PROB?", i + 1); | |
34ce4d82 VO |
917 | |
918 | /* DSO1000B series prints an X after the probe factor, so | |
919 | * we get a string and check for that instead of only handling | |
920 | * floats. */ | |
921 | char *response; | |
922 | res = sr_scpi_get_string(sdi->conn, cmd, &response); | |
923 | if (res != SR_OK) | |
924 | return SR_ERR; | |
925 | ||
926 | int len = strlen(response); | |
927 | if (response[len-1] == 'X') | |
928 | response[len-1] = 0; | |
929 | ||
930 | res = sr_atof_ascii(response, &devc->attenuation[i]); | |
931 | g_free(response); | |
934cf6cf AJ |
932 | g_free(cmd); |
933 | if (res != SR_OK) | |
934 | return SR_ERR; | |
935 | } | |
936 | sr_dbg("Current probe attenuation:"); | |
937 | for (i = 0; i < devc->model->analog_channels; i++) | |
938 | sr_dbg("CH%d %g", i + 1, devc->attenuation[i]); | |
939 | ||
8719638f AJ |
940 | /* Vertical gain and offset. */ |
941 | if (rigol_ds_get_dev_cfg_vertical(sdi) != SR_OK) | |
942 | return SR_ERR; | |
254dd102 BV |
943 | |
944 | /* Coupling. */ | |
821fbcad ML |
945 | for (i = 0; i < devc->model->analog_channels; i++) { |
946 | cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1); | |
4fad41a8 GS |
947 | g_free(devc->coupling[i]); |
948 | devc->coupling[i] = NULL; | |
334fbc2a | 949 | res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]); |
821fbcad ML |
950 | g_free(cmd); |
951 | if (res != SR_OK) | |
952 | return SR_ERR; | |
953 | } | |
954 | sr_dbg("Current coupling:"); | |
955 | for (i = 0; i < devc->model->analog_channels; i++) | |
956 | sr_dbg("CH%d %s", i + 1, devc->coupling[i]); | |
254dd102 BV |
957 | |
958 | /* Trigger source. */ | |
4fad41a8 GS |
959 | g_free(devc->trigger_source); |
960 | devc->trigger_source = NULL; | |
334fbc2a | 961 | if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK) |
254dd102 BV |
962 | return SR_ERR; |
963 | sr_dbg("Current trigger source %s", devc->trigger_source); | |
964 | ||
965 | /* Horizontal trigger position. */ | |
0f523f2b UH |
966 | if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str, |
967 | &devc->horiz_triggerpos) != SR_OK) | |
254dd102 | 968 | return SR_ERR; |
bafd4890 | 969 | sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos); |
254dd102 BV |
970 | |
971 | /* Trigger slope. */ | |
4fad41a8 GS |
972 | g_free(devc->trigger_slope); |
973 | devc->trigger_slope = NULL; | |
334fbc2a | 974 | if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK) |
254dd102 BV |
975 | return SR_ERR; |
976 | sr_dbg("Current trigger slope %s", devc->trigger_slope); | |
977 | ||
9ea62f2e AJ |
978 | /* Trigger level. */ |
979 | if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK) | |
980 | return SR_ERR; | |
981 | sr_dbg("Current trigger level %g", devc->trigger_level); | |
982 | ||
254dd102 BV |
983 | return SR_OK; |
984 | } | |
8719638f AJ |
985 | |
986 | SR_PRIV int rigol_ds_get_dev_cfg_vertical(const struct sr_dev_inst *sdi) | |
987 | { | |
988 | struct dev_context *devc; | |
989 | char *cmd; | |
990 | unsigned int i; | |
991 | int res; | |
992 | ||
993 | devc = sdi->priv; | |
994 | ||
995 | /* Vertical gain. */ | |
996 | for (i = 0; i < devc->model->analog_channels; i++) { | |
997 | cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1); | |
998 | res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]); | |
999 | g_free(cmd); | |
1000 | if (res != SR_OK) | |
1001 | return SR_ERR; | |
1002 | } | |
1003 | sr_dbg("Current vertical gain:"); | |
1004 | for (i = 0; i < devc->model->analog_channels; i++) | |
1005 | sr_dbg("CH%d %g", i + 1, devc->vdiv[i]); | |
1006 | ||
1007 | /* Vertical offset. */ | |
1008 | for (i = 0; i < devc->model->analog_channels; i++) { | |
1009 | cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1); | |
1010 | res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]); | |
1011 | g_free(cmd); | |
1012 | if (res != SR_OK) | |
1013 | return SR_ERR; | |
1014 | } | |
1015 | sr_dbg("Current vertical offset:"); | |
1016 | for (i = 0; i < devc->model->analog_channels; i++) | |
1017 | sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]); | |
1018 | ||
1019 | return SR_OK; | |
1020 | } |