]>
Commit | Line | Data |
---|---|---|
a1bb33af UH |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
c73d2ea4 | 4 | * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com> |
a1bb33af UH |
5 | * |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <stdio.h> | |
21 | #include <stdint.h> | |
22 | #include <stdlib.h> | |
23 | #include <sys/types.h> | |
24 | #include <sys/stat.h> | |
25 | #include <fcntl.h> | |
26 | #include <unistd.h> | |
a9f54bcd UH |
27 | #ifdef _WIN32 |
28 | #include <windows.h> | |
29 | #else | |
a1bb33af | 30 | #include <termios.h> |
926b866c | 31 | #endif |
a1bb33af UH |
32 | #include <string.h> |
33 | #include <sys/time.h> | |
34 | #include <inttypes.h> | |
926b866c UH |
35 | #ifdef _WIN32 |
36 | /* TODO */ | |
37 | #else | |
6937bb75 | 38 | #include <arpa/inet.h> |
926b866c | 39 | #endif |
a1bb33af | 40 | #include <glib.h> |
45c59c8b BV |
41 | #include "libsigrok.h" |
42 | #include "libsigrok-internal.h" | |
4fe9a6da | 43 | #include "ols.h" |
a1bb33af | 44 | |
1fdb75e1 UH |
45 | #ifdef _WIN32 |
46 | #define O_NONBLOCK FIONBIO | |
47 | #endif | |
48 | ||
fe1c50fb BV |
49 | #define SERIALCOMM "115200/8n1" |
50 | ||
915f7cc8 | 51 | static const int hwcaps[] = { |
5a2326a7 UH |
52 | SR_HWCAP_LOGIC_ANALYZER, |
53 | SR_HWCAP_SAMPLERATE, | |
54 | SR_HWCAP_CAPTURE_RATIO, | |
55 | SR_HWCAP_LIMIT_SAMPLES, | |
3a4d09c0 | 56 | SR_HWCAP_RLE, |
43fc7885 | 57 | 0, |
a1bb33af UH |
58 | }; |
59 | ||
d261dbbf | 60 | /* Probes are numbered 0-31 (on the PCB silkscreen). */ |
c37d2b1b | 61 | static const char *probe_names[NUM_PROBES + 1] = { |
464d12c7 KS |
62 | "0", |
63 | "1", | |
64 | "2", | |
65 | "3", | |
66 | "4", | |
67 | "5", | |
68 | "6", | |
69 | "7", | |
70 | "8", | |
71 | "9", | |
72 | "10", | |
73 | "11", | |
74 | "12", | |
75 | "13", | |
76 | "14", | |
77 | "15", | |
78 | "16", | |
79 | "17", | |
80 | "18", | |
81 | "19", | |
82 | "20", | |
83 | "21", | |
84 | "22", | |
85 | "23", | |
86 | "24", | |
87 | "25", | |
88 | "26", | |
89 | "27", | |
90 | "28", | |
91 | "29", | |
92 | "30", | |
93 | "31", | |
94 | NULL, | |
95 | }; | |
96 | ||
4fe9a6da | 97 | /* default supported samplerates, can be overridden by device metadata */ |
a533743d | 98 | static const struct sr_samplerates samplerates = { |
c9140419 | 99 | SR_HZ(10), |
59df0c77 | 100 | SR_MHZ(200), |
c9140419 UH |
101 | SR_HZ(1), |
102 | NULL, | |
a1bb33af UH |
103 | }; |
104 | ||
e5e81856 BV |
105 | SR_PRIV struct sr_dev_driver ols_driver_info; |
106 | static struct sr_dev_driver *odi = &ols_driver_info; | |
a1bb33af | 107 | |
530f201e BV |
108 | static int send_shortcommand(struct sr_serial_dev_inst *serial, |
109 | uint8_t command) | |
a1bb33af UH |
110 | { |
111 | char buf[1]; | |
112 | ||
b08024a8 | 113 | sr_dbg("ols: sending cmd 0x%.2x", command); |
a1bb33af | 114 | buf[0] = command; |
530f201e | 115 | if (serial_write(serial, buf, 1) != 1) |
e46b8fb1 | 116 | return SR_ERR; |
a1bb33af | 117 | |
e46b8fb1 | 118 | return SR_OK; |
a1bb33af UH |
119 | } |
120 | ||
530f201e BV |
121 | static int send_longcommand(struct sr_serial_dev_inst *serial, |
122 | uint8_t command, uint32_t data) | |
a1bb33af UH |
123 | { |
124 | char buf[5]; | |
125 | ||
b08024a8 | 126 | sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data); |
a1bb33af | 127 | buf[0] = command; |
6937bb75 BV |
128 | buf[1] = (data & 0xff000000) >> 24; |
129 | buf[2] = (data & 0xff0000) >> 16; | |
130 | buf[3] = (data & 0xff00) >> 8; | |
131 | buf[4] = data & 0xff; | |
530f201e | 132 | if (serial_write(serial, buf, 5) != 5) |
e46b8fb1 | 133 | return SR_ERR; |
a1bb33af | 134 | |
e46b8fb1 | 135 | return SR_OK; |
a1bb33af UH |
136 | } |
137 | ||
014359e3 | 138 | static int configure_probes(const struct sr_dev_inst *sdi) |
a1bb33af | 139 | { |
014359e3 | 140 | struct dev_context *devc; |
1b79df2f JH |
141 | const struct sr_probe *probe; |
142 | const GSList *l; | |
6937bb75 | 143 | int probe_bit, stage, i; |
a1bb33af UH |
144 | char *tc; |
145 | ||
014359e3 BV |
146 | devc = sdi->priv; |
147 | ||
fefc4b85 | 148 | devc->probe_mask = 0; |
43fc7885 | 149 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { |
fefc4b85 BV |
150 | devc->trigger_mask[i] = 0; |
151 | devc->trigger_value[i] = 0; | |
a1bb33af UH |
152 | } |
153 | ||
fefc4b85 | 154 | devc->num_stages = 0; |
014359e3 | 155 | for (l = sdi->probes; l; l = l->next) { |
1b79df2f | 156 | probe = (const struct sr_probe *)l->data; |
43fc7885 | 157 | if (!probe->enabled) |
6937bb75 BV |
158 | continue; |
159 | ||
43fc7885 UH |
160 | /* |
161 | * Set up the probe mask for later configuration into the | |
162 | * flag register. | |
163 | */ | |
b35c8293 | 164 | probe_bit = 1 << (probe->index); |
fefc4b85 | 165 | devc->probe_mask |= probe_bit; |
6937bb75 | 166 | |
a803c0db | 167 | if (!probe->trigger) |
6937bb75 BV |
168 | continue; |
169 | ||
43fc7885 | 170 | /* Configure trigger mask and value. */ |
6937bb75 | 171 | stage = 0; |
43fc7885 | 172 | for (tc = probe->trigger; tc && *tc; tc++) { |
fefc4b85 | 173 | devc->trigger_mask[stage] |= probe_bit; |
43fc7885 | 174 | if (*tc == '1') |
fefc4b85 | 175 | devc->trigger_value[stage] |= probe_bit; |
6937bb75 | 176 | stage++; |
43fc7885 UH |
177 | if (stage > 3) |
178 | /* | |
179 | * TODO: Only supporting parallel mode, with | |
180 | * up to 4 stages. | |
181 | */ | |
e46b8fb1 | 182 | return SR_ERR; |
a1bb33af | 183 | } |
fefc4b85 BV |
184 | if (stage > devc->num_stages) |
185 | devc->num_stages = stage; | |
a1bb33af UH |
186 | } |
187 | ||
e46b8fb1 | 188 | return SR_OK; |
a1bb33af UH |
189 | } |
190 | ||
a803c0db | 191 | static uint32_t reverse16(uint32_t in) |
6937bb75 BV |
192 | { |
193 | uint32_t out; | |
194 | ||
a803c0db BV |
195 | out = (in & 0xff) << 8; |
196 | out |= (in & 0xff00) >> 8; | |
197 | out |= (in & 0xff0000) << 8; | |
198 | out |= (in & 0xff000000) >> 8; | |
199 | ||
200 | return out; | |
201 | } | |
202 | ||
203 | static uint32_t reverse32(uint32_t in) | |
204 | { | |
205 | uint32_t out; | |
206 | ||
207 | out = (in & 0xff) << 24; | |
208 | out |= (in & 0xff00) << 8; | |
209 | out |= (in & 0xff0000) >> 8; | |
210 | out |= (in & 0xff000000) >> 24; | |
211 | ||
212 | return out; | |
6937bb75 BV |
213 | } |
214 | ||
fefc4b85 | 215 | static struct dev_context *ols_dev_new(void) |
4fe9a6da | 216 | { |
fefc4b85 | 217 | struct dev_context *devc; |
4fe9a6da | 218 | |
fefc4b85 BV |
219 | if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) { |
220 | sr_err("ols: %s: devc malloc failed", __func__); | |
b53738ba UH |
221 | return NULL; |
222 | } | |
223 | ||
fefc4b85 BV |
224 | devc->trigger_at = -1; |
225 | devc->probe_mask = 0xffffffff; | |
226 | devc->cur_samplerate = SR_KHZ(200); | |
227 | devc->serial = NULL; | |
4fe9a6da | 228 | |
fefc4b85 | 229 | return devc; |
4fe9a6da BV |
230 | } |
231 | ||
530f201e | 232 | static struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial) |
4fe9a6da | 233 | { |
d68e2d1a | 234 | struct sr_dev_inst *sdi; |
fefc4b85 | 235 | struct dev_context *devc; |
10e5cbed BV |
236 | struct sr_probe *probe; |
237 | uint32_t tmp_int, ui; | |
4fe9a6da | 238 | uint8_t key, type, token; |
bb7ef793 | 239 | GString *tmp_str, *devname, *version; |
10e5cbed | 240 | guchar tmp_c; |
4fe9a6da | 241 | |
d3683c42 | 242 | sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL); |
2efc5948 | 243 | sdi->driver = odi; |
fefc4b85 BV |
244 | devc = ols_dev_new(); |
245 | sdi->priv = devc; | |
4fe9a6da | 246 | |
bb7ef793 | 247 | devname = g_string_new(""); |
4fe9a6da BV |
248 | version = g_string_new(""); |
249 | ||
250 | key = 0xff; | |
251 | while (key) { | |
530f201e | 252 | if (serial_read(serial, &key, 1) != 1 || key == 0x00) |
4fe9a6da BV |
253 | break; |
254 | type = key >> 5; | |
255 | token = key & 0x1f; | |
256 | switch (type) { | |
257 | case 0: | |
258 | /* NULL-terminated string */ | |
259 | tmp_str = g_string_new(""); | |
530f201e | 260 | while (serial_read(serial, &tmp_c, 1) == 1 && tmp_c != '\0') |
4fe9a6da | 261 | g_string_append_c(tmp_str, tmp_c); |
b08024a8 UH |
262 | sr_dbg("ols: got metadata key 0x%.2x value '%s'", |
263 | key, tmp_str->str); | |
4fe9a6da BV |
264 | switch (token) { |
265 | case 0x01: | |
266 | /* Device name */ | |
bb7ef793 | 267 | devname = g_string_append(devname, tmp_str->str); |
4fe9a6da BV |
268 | break; |
269 | case 0x02: | |
270 | /* FPGA firmware version */ | |
271 | if (version->len) | |
272 | g_string_append(version, ", "); | |
273 | g_string_append(version, "FPGA version "); | |
274 | g_string_append(version, tmp_str->str); | |
275 | break; | |
276 | case 0x03: | |
277 | /* Ancillary version */ | |
278 | if (version->len) | |
279 | g_string_append(version, ", "); | |
280 | g_string_append(version, "Ancillary version "); | |
281 | g_string_append(version, tmp_str->str); | |
282 | break; | |
283 | default: | |
b08024a8 UH |
284 | sr_info("ols: unknown token 0x%.2x: '%s'", |
285 | token, tmp_str->str); | |
4fe9a6da BV |
286 | break; |
287 | } | |
288 | g_string_free(tmp_str, TRUE); | |
289 | break; | |
290 | case 1: | |
291 | /* 32-bit unsigned integer */ | |
530f201e | 292 | if (serial_read(serial, &tmp_int, 4) != 4) |
4fe9a6da BV |
293 | break; |
294 | tmp_int = reverse32(tmp_int); | |
b08024a8 UH |
295 | sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x", |
296 | key, tmp_int); | |
4fe9a6da BV |
297 | switch (token) { |
298 | case 0x00: | |
299 | /* Number of usable probes */ | |
10e5cbed BV |
300 | for (ui = 0; ui < tmp_int; ui++) { |
301 | if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE, | |
302 | probe_names[ui]))) | |
303 | return 0; | |
304 | sdi->probes = g_slist_append(sdi->probes, probe); | |
305 | } | |
4fe9a6da BV |
306 | break; |
307 | case 0x01: | |
308 | /* Amount of sample memory available (bytes) */ | |
fefc4b85 | 309 | devc->max_samples = tmp_int; |
4fe9a6da BV |
310 | break; |
311 | case 0x02: | |
312 | /* Amount of dynamic memory available (bytes) */ | |
313 | /* what is this for? */ | |
314 | break; | |
315 | case 0x03: | |
316 | /* Maximum sample rate (hz) */ | |
fefc4b85 | 317 | devc->max_samplerate = tmp_int; |
4fe9a6da BV |
318 | break; |
319 | case 0x04: | |
320 | /* protocol version */ | |
fefc4b85 | 321 | devc->protocol_version = tmp_int; |
4fe9a6da BV |
322 | break; |
323 | default: | |
b08024a8 UH |
324 | sr_info("ols: unknown token 0x%.2x: 0x%.8x", |
325 | token, tmp_int); | |
4fe9a6da BV |
326 | break; |
327 | } | |
328 | break; | |
329 | case 2: | |
330 | /* 8-bit unsigned integer */ | |
530f201e | 331 | if (serial_read(serial, &tmp_c, 1) != 1) |
4fe9a6da | 332 | break; |
b08024a8 UH |
333 | sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x", |
334 | key, tmp_c); | |
4fe9a6da BV |
335 | switch (token) { |
336 | case 0x00: | |
337 | /* Number of usable probes */ | |
10e5cbed BV |
338 | for (ui = 0; ui < tmp_c; ui++) { |
339 | if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE, | |
340 | probe_names[ui]))) | |
341 | return 0; | |
342 | sdi->probes = g_slist_append(sdi->probes, probe); | |
343 | } | |
4fe9a6da BV |
344 | break; |
345 | case 0x01: | |
346 | /* protocol version */ | |
fefc4b85 | 347 | devc->protocol_version = tmp_c; |
4fe9a6da BV |
348 | break; |
349 | default: | |
b08024a8 UH |
350 | sr_info("ols: unknown token 0x%.2x: 0x%.2x", |
351 | token, tmp_c); | |
4fe9a6da BV |
352 | break; |
353 | } | |
354 | break; | |
355 | default: | |
356 | /* unknown type */ | |
357 | break; | |
358 | } | |
359 | } | |
360 | ||
bb7ef793 | 361 | sdi->model = devname->str; |
4fe9a6da | 362 | sdi->version = version->str; |
bb7ef793 | 363 | g_string_free(devname, FALSE); |
4fe9a6da BV |
364 | g_string_free(version, FALSE); |
365 | ||
366 | return sdi; | |
367 | } | |
368 | ||
40dda2c3 | 369 | static int hw_init(void) |
61136ea6 | 370 | { |
fefc4b85 | 371 | struct drv_context *drvc; |
61136ea6 | 372 | |
fefc4b85 BV |
373 | if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) { |
374 | sr_err("ols: driver context malloc failed."); | |
886a52b6 | 375 | return SR_ERR_MALLOC; |
fefc4b85 BV |
376 | } |
377 | odi->priv = drvc; | |
61136ea6 BV |
378 | |
379 | return SR_OK; | |
380 | } | |
381 | ||
10e5cbed | 382 | static GSList *hw_scan(GSList *options) |
a1bb33af | 383 | { |
a99e0d2a | 384 | struct sr_hwopt *opt; |
d68e2d1a | 385 | struct sr_dev_inst *sdi; |
fefc4b85 BV |
386 | struct drv_context *drvc; |
387 | struct dev_context *devc; | |
10e5cbed | 388 | struct sr_probe *probe; |
530f201e | 389 | struct sr_serial_dev_inst *serial; |
a99e0d2a | 390 | GPollFD probefd; |
fe1c50fb | 391 | GSList *l, *devices; |
530f201e | 392 | int ret, i; |
fe1c50fb | 393 | const char *conn, *serialcomm; |
a99e0d2a | 394 | char buf[8]; |
a1bb33af | 395 | |
10e5cbed | 396 | (void)options; |
fefc4b85 | 397 | drvc = odi->priv; |
10e5cbed | 398 | devices = NULL; |
c0a4b971 | 399 | |
a99e0d2a AG |
400 | conn = serialcomm = NULL; |
401 | for (l = options; l; l = l->next) { | |
402 | opt = l->data; | |
403 | switch (opt->hwopt) { | |
404 | case SR_HWOPT_CONN: | |
405 | conn = opt->value; | |
406 | break; | |
407 | case SR_HWOPT_SERIALCOMM: | |
408 | serialcomm = opt->value; | |
409 | break; | |
410 | } | |
411 | } | |
412 | if (!conn) { | |
413 | sr_err("ols: No serial port specified."); | |
414 | return NULL; | |
c0a4b971 UH |
415 | } |
416 | ||
fe1c50fb | 417 | if (serialcomm == NULL) |
530f201e BV |
418 | serialcomm = SERIALCOMM; |
419 | ||
420 | if (!(serial = sr_serial_dev_inst_new(conn, serialcomm))) | |
421 | return NULL; | |
c0a4b971 | 422 | |
a99e0d2a AG |
423 | /* The discovery procedure is like this: first send the Reset |
424 | * command (0x00) 5 times, since the device could be anywhere | |
425 | * in a 5-byte command. Then send the ID command (0x02). | |
426 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
427 | * have a match. | |
a99e0d2a AG |
428 | */ |
429 | sr_info("ols: probing %s .", conn); | |
530f201e | 430 | if (serial_open(serial, O_RDWR | O_NONBLOCK) != SR_OK) |
a99e0d2a | 431 | return NULL; |
c0a4b971 | 432 | |
a99e0d2a AG |
433 | ret = SR_OK; |
434 | for (i = 0; i < 5; i++) { | |
530f201e | 435 | if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) { |
a99e0d2a | 436 | sr_err("ols: port %s is not writable.", conn); |
fe1c50fb | 437 | break; |
a1bb33af UH |
438 | } |
439 | } | |
a99e0d2a | 440 | if (ret != SR_OK) { |
530f201e | 441 | serial_close(serial); |
a99e0d2a AG |
442 | sr_err("ols: Could not use port %s. Quitting.", conn); |
443 | return NULL; | |
444 | } | |
530f201e | 445 | send_shortcommand(serial, CMD_ID); |
a1bb33af | 446 | |
fe1c50fb | 447 | /* Wait 10ms for a response. */ |
5b15b41e | 448 | usleep(10000); |
a1bb33af | 449 | |
530f201e | 450 | probefd.fd = serial->fd; |
fe1c50fb BV |
451 | probefd.events = G_IO_IN; |
452 | g_poll(&probefd, 1, 1); | |
4fe9a6da | 453 | |
a99e0d2a AG |
454 | if (probefd.revents != G_IO_IN) |
455 | return NULL; | |
530f201e | 456 | if (serial_read(serial, buf, 4) != 4) |
a99e0d2a AG |
457 | return NULL; |
458 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) | |
459 | return NULL; | |
4fe9a6da | 460 | |
fe1c50fb BV |
461 | /* Definitely using the OLS protocol, check if it supports |
462 | * the metadata command. | |
a99e0d2a | 463 | */ |
530f201e | 464 | send_shortcommand(serial, CMD_METADATA); |
a99e0d2a | 465 | if (g_poll(&probefd, 1, 10) > 0) { |
fe1c50fb | 466 | /* Got metadata. */ |
530f201e | 467 | sdi = get_metadata(serial); |
fe1c50fb | 468 | sdi->index = 0; |
a99e0d2a AG |
469 | devc = sdi->priv; |
470 | } else { | |
fe1c50fb BV |
471 | /* Not an OLS -- some other board that uses the sump protocol. */ |
472 | sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, | |
a99e0d2a AG |
473 | "Sump", "Logic Analyzer", "v1.0"); |
474 | sdi->driver = odi; | |
475 | devc = ols_dev_new(); | |
476 | for (i = 0; i < 32; i++) { | |
477 | if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE, | |
478 | probe_names[i]))) | |
479 | return 0; | |
480 | sdi->probes = g_slist_append(sdi->probes, probe); | |
a1bb33af | 481 | } |
a99e0d2a | 482 | sdi->priv = devc; |
4fe9a6da | 483 | } |
530f201e | 484 | devc->serial = serial; |
a99e0d2a AG |
485 | drvc->instances = g_slist_append(drvc->instances, sdi); |
486 | devices = g_slist_append(devices, sdi); | |
487 | ||
530f201e | 488 | serial_close(serial); |
a1bb33af | 489 | |
10e5cbed | 490 | return devices; |
a1bb33af UH |
491 | } |
492 | ||
811deee4 BV |
493 | static GSList *hw_dev_list(void) |
494 | { | |
495 | struct drv_context *drvc; | |
496 | ||
497 | drvc = odi->priv; | |
498 | ||
499 | return drvc->instances; | |
500 | } | |
501 | ||
25a0f108 | 502 | static int hw_dev_open(struct sr_dev_inst *sdi) |
a1bb33af | 503 | { |
fefc4b85 | 504 | struct dev_context *devc; |
a1bb33af | 505 | |
fefc4b85 | 506 | devc = sdi->priv; |
69890f73 | 507 | |
530f201e | 508 | if (serial_open(devc->serial, O_RDWR) != SR_OK) |
e46b8fb1 | 509 | return SR_ERR; |
a1bb33af | 510 | |
5a2326a7 | 511 | sdi->status = SR_ST_ACTIVE; |
a1bb33af | 512 | |
e46b8fb1 | 513 | return SR_OK; |
a1bb33af UH |
514 | } |
515 | ||
25a0f108 | 516 | static int hw_dev_close(struct sr_dev_inst *sdi) |
a1bb33af | 517 | { |
fefc4b85 | 518 | struct dev_context *devc; |
a1bb33af | 519 | |
fefc4b85 | 520 | devc = sdi->priv; |
69890f73 | 521 | |
530f201e BV |
522 | if (devc->serial && devc->serial->fd != -1) { |
523 | serial_close(devc->serial); | |
5a2326a7 | 524 | sdi->status = SR_ST_INACTIVE; |
a1bb33af | 525 | } |
697785d1 UH |
526 | |
527 | return SR_OK; | |
a1bb33af UH |
528 | } |
529 | ||
57ab7d9f | 530 | static int hw_cleanup(void) |
a1bb33af UH |
531 | { |
532 | GSList *l; | |
d68e2d1a | 533 | struct sr_dev_inst *sdi; |
fefc4b85 BV |
534 | struct drv_context *drvc; |
535 | struct dev_context *devc; | |
57ab7d9f | 536 | int ret = SR_OK; |
a1bb33af | 537 | |
fefc4b85 BV |
538 | if (!(drvc = odi->priv)) |
539 | return SR_OK; | |
540 | ||
8722c31e | 541 | /* Properly close and free all devices. */ |
fefc4b85 | 542 | for (l = drvc->instances; l; l = l->next) { |
57ab7d9f UH |
543 | if (!(sdi = l->data)) { |
544 | /* Log error, but continue cleaning up the rest. */ | |
545 | sr_err("ols: %s: sdi was NULL, continuing", __func__); | |
546 | ret = SR_ERR_BUG; | |
547 | continue; | |
548 | } | |
fefc4b85 | 549 | if (!(devc = sdi->priv)) { |
57ab7d9f UH |
550 | /* Log error, but continue cleaning up the rest. */ |
551 | sr_err("ols: %s: sdi->priv was NULL, continuing", | |
552 | __func__); | |
553 | ret = SR_ERR_BUG; | |
554 | continue; | |
555 | } | |
530f201e | 556 | hw_dev_close(sdi); |
fefc4b85 | 557 | sr_serial_dev_inst_free(devc->serial); |
d3683c42 | 558 | sr_dev_inst_free(sdi); |
a1bb33af | 559 | } |
fefc4b85 BV |
560 | g_slist_free(drvc->instances); |
561 | drvc->instances = NULL; | |
57ab7d9f UH |
562 | |
563 | return ret; | |
a1bb33af UH |
564 | } |
565 | ||
dddfb3db BV |
566 | static int hw_info_get(int info_id, const void **data, |
567 | const struct sr_dev_inst *sdi) | |
a1bb33af | 568 | { |
fefc4b85 | 569 | struct dev_context *devc; |
a1bb33af | 570 | |
dddfb3db | 571 | switch (info_id) { |
2ca4465b BV |
572 | case SR_DI_HWCAPS: |
573 | *data = hwcaps; | |
574 | break; | |
5a2326a7 | 575 | case SR_DI_NUM_PROBES: |
dddfb3db | 576 | *data = GINT_TO_POINTER(1); |
a1bb33af | 577 | break; |
464d12c7 | 578 | case SR_DI_PROBE_NAMES: |
dddfb3db | 579 | *data = probe_names; |
464d12c7 | 580 | break; |
5a2326a7 | 581 | case SR_DI_SAMPLERATES: |
dddfb3db | 582 | *data = &samplerates; |
a1bb33af | 583 | break; |
5a2326a7 | 584 | case SR_DI_TRIGGER_TYPES: |
dddfb3db | 585 | *data = (char *)TRIGGER_TYPES; |
a1bb33af | 586 | break; |
5a2326a7 | 587 | case SR_DI_CUR_SAMPLERATE: |
dddfb3db | 588 | if (sdi) { |
fefc4b85 BV |
589 | devc = sdi->priv; |
590 | *data = &devc->cur_samplerate; | |
dddfb3db BV |
591 | } else |
592 | return SR_ERR; | |
a1bb33af | 593 | break; |
dddfb3db BV |
594 | default: |
595 | return SR_ERR_ARG; | |
a1bb33af UH |
596 | } |
597 | ||
dddfb3db | 598 | return SR_OK; |
a1bb33af UH |
599 | } |
600 | ||
6f4b1868 | 601 | static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate) |
a1bb33af | 602 | { |
fefc4b85 | 603 | struct dev_context *devc; |
a1bb33af | 604 | |
fefc4b85 BV |
605 | devc = sdi->priv; |
606 | if (devc->max_samplerate) { | |
607 | if (samplerate > devc->max_samplerate) | |
4fe9a6da BV |
608 | return SR_ERR_SAMPLERATE; |
609 | } else if (samplerate < samplerates.low || samplerate > samplerates.high) | |
e46b8fb1 | 610 | return SR_ERR_SAMPLERATE; |
a1bb33af | 611 | |
43fc7885 | 612 | if (samplerate > CLOCK_RATE) { |
fefc4b85 BV |
613 | devc->flag_reg |= FLAG_DEMUX; |
614 | devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1; | |
43fc7885 | 615 | } else { |
fefc4b85 BV |
616 | devc->flag_reg &= ~FLAG_DEMUX; |
617 | devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1; | |
a1bb33af | 618 | } |
a1bb33af | 619 | |
7583b99d GM |
620 | /* Calculate actual samplerate used and complain if it is different |
621 | * from the requested. | |
622 | */ | |
fefc4b85 BV |
623 | devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1); |
624 | if (devc->flag_reg & FLAG_DEMUX) | |
625 | devc->cur_samplerate *= 2; | |
626 | if (devc->cur_samplerate != samplerate) | |
133a37bf | 627 | sr_err("ols: can't match samplerate %" PRIu64 ", using %" |
fefc4b85 | 628 | PRIu64, samplerate, devc->cur_samplerate); |
7583b99d | 629 | |
e46b8fb1 | 630 | return SR_OK; |
a1bb33af UH |
631 | } |
632 | ||
6f4b1868 BV |
633 | static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap, |
634 | const void *value) | |
a1bb33af | 635 | { |
fefc4b85 | 636 | struct dev_context *devc; |
a1bb33af | 637 | int ret; |
1b79df2f | 638 | const uint64_t *tmp_u64; |
a1bb33af | 639 | |
fefc4b85 | 640 | devc = sdi->priv; |
a1bb33af | 641 | |
5a2326a7 | 642 | if (sdi->status != SR_ST_ACTIVE) |
e46b8fb1 | 643 | return SR_ERR; |
a1bb33af | 644 | |
ffedd0bf | 645 | switch (hwcap) { |
5a2326a7 | 646 | case SR_HWCAP_SAMPLERATE: |
1b79df2f | 647 | ret = set_samplerate(sdi, *(const uint64_t *)value); |
a803c0db | 648 | break; |
5a2326a7 | 649 | case SR_HWCAP_LIMIT_SAMPLES: |
2458ea65 | 650 | tmp_u64 = value; |
574ce498 | 651 | if (*tmp_u64 < MIN_NUM_SAMPLES) |
e46b8fb1 | 652 | return SR_ERR; |
fefc4b85 | 653 | if (*tmp_u64 > devc->max_samples) |
133a37bf | 654 | sr_err("ols: sample limit exceeds hw max"); |
fefc4b85 BV |
655 | devc->limit_samples = *tmp_u64; |
656 | sr_info("ols: sample limit %" PRIu64, devc->limit_samples); | |
e46b8fb1 | 657 | ret = SR_OK; |
a803c0db | 658 | break; |
5a2326a7 | 659 | case SR_HWCAP_CAPTURE_RATIO: |
fefc4b85 BV |
660 | devc->capture_ratio = *(const uint64_t *)value; |
661 | if (devc->capture_ratio < 0 || devc->capture_ratio > 100) { | |
662 | devc->capture_ratio = 0; | |
e46b8fb1 | 663 | ret = SR_ERR; |
43fc7885 | 664 | } else |
e46b8fb1 | 665 | ret = SR_OK; |
a803c0db | 666 | break; |
3a4d09c0 | 667 | case SR_HWCAP_RLE: |
4d436e71 | 668 | if (GPOINTER_TO_INT(value)) { |
3a4d09c0 | 669 | sr_info("ols: enabling RLE"); |
fefc4b85 | 670 | devc->flag_reg |= FLAG_RLE; |
3a4d09c0 GM |
671 | } |
672 | ret = SR_OK; | |
673 | break; | |
a803c0db | 674 | default: |
e46b8fb1 | 675 | ret = SR_ERR; |
43fc7885 | 676 | } |
a1bb33af UH |
677 | |
678 | return ret; | |
679 | } | |
680 | ||
26bf9d56 BV |
681 | static void abort_acquisition(const struct sr_dev_inst *sdi) |
682 | { | |
683 | struct sr_datafeed_packet packet; | |
684 | struct dev_context *devc; | |
685 | ||
686 | devc = sdi->priv; | |
687 | sr_source_remove(devc->serial->fd); | |
688 | ||
689 | /* Terminate session */ | |
690 | packet.type = SR_DF_END; | |
691 | sr_session_send(sdi, &packet); | |
692 | ||
693 | } | |
694 | ||
695 | ||
696 | ||
1f9813eb | 697 | static int receive_data(int fd, int revents, void *cb_data) |
a1bb33af | 698 | { |
b9c735a2 | 699 | struct sr_datafeed_packet packet; |
9c939c51 | 700 | struct sr_datafeed_logic logic; |
d68e2d1a | 701 | struct sr_dev_inst *sdi; |
fefc4b85 BV |
702 | struct drv_context *drvc; |
703 | struct dev_context *devc; | |
4fe9a6da | 704 | GSList *l; |
3a4d09c0 GM |
705 | int num_channels, offset, i, j; |
706 | unsigned char byte; | |
a1bb33af | 707 | |
fefc4b85 BV |
708 | drvc = odi->priv; |
709 | ||
710 | /* Find this device's devc struct by its fd. */ | |
711 | devc = NULL; | |
712 | for (l = drvc->instances; l; l = l->next) { | |
4fe9a6da | 713 | sdi = l->data; |
fefc4b85 | 714 | devc = sdi->priv; |
530f201e | 715 | if (devc->serial->fd == fd) |
4fe9a6da | 716 | break; |
fefc4b85 | 717 | devc = NULL; |
4fe9a6da | 718 | } |
fefc4b85 | 719 | if (!devc) |
ea9cfed7 | 720 | /* Shouldn't happen. */ |
4fe9a6da BV |
721 | return TRUE; |
722 | ||
fefc4b85 | 723 | if (devc->num_transfers++ == 0) { |
43fc7885 UH |
724 | /* |
725 | * First time round, means the device started sending data, | |
726 | * and will not stop until done. If it stops sending for | |
727 | * longer than it takes to send a byte, that means it's | |
728 | * finished. We'll double that to 30ms to be sure... | |
a1bb33af | 729 | */ |
6f1be0a2 | 730 | sr_source_remove(fd); |
1f9813eb | 731 | sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data); |
886a52b6 | 732 | /* TODO: Check malloc return code. */ |
fefc4b85 BV |
733 | devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4); |
734 | if (!devc->raw_sample_buf) { | |
735 | sr_err("ols: %s: devc->raw_sample_buf malloc failed", | |
c0a4b971 UH |
736 | __func__); |
737 | return FALSE; | |
738 | } | |
a803c0db | 739 | /* fill with 1010... for debugging */ |
fefc4b85 | 740 | memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4); |
a1bb33af UH |
741 | } |
742 | ||
6937bb75 | 743 | num_channels = 0; |
43fc7885 | 744 | for (i = 0x20; i > 0x02; i /= 2) { |
fefc4b85 | 745 | if ((devc->flag_reg & i) == 0) |
6937bb75 | 746 | num_channels++; |
43fc7885 | 747 | } |
6937bb75 | 748 | |
3a4d09c0 | 749 | if (revents == G_IO_IN) { |
530f201e | 750 | if (serial_read(devc->serial, &byte, 1) != 1) |
a1bb33af UH |
751 | return FALSE; |
752 | ||
baf1d714 | 753 | /* Ignore it if we've read enough. */ |
fefc4b85 | 754 | if (devc->num_samples >= devc->limit_samples) |
baf1d714 | 755 | return TRUE; |
3a4d09c0 | 756 | |
fefc4b85 | 757 | devc->sample[devc->num_bytes++] = byte; |
b08024a8 | 758 | sr_dbg("ols: received byte 0x%.2x", byte); |
fefc4b85 | 759 | if (devc->num_bytes == num_channels) { |
43fc7885 | 760 | /* Got a full sample. */ |
b08024a8 | 761 | sr_dbg("ols: received sample 0x%.*x", |
fefc4b85 BV |
762 | devc->num_bytes * 2, *(int *)devc->sample); |
763 | if (devc->flag_reg & FLAG_RLE) { | |
43fc7885 UH |
764 | /* |
765 | * In RLE mode -1 should never come in as a | |
766 | * sample, because bit 31 is the "count" flag. | |
43fc7885 | 767 | */ |
fefc4b85 BV |
768 | if (devc->sample[devc->num_bytes - 1] & 0x80) { |
769 | devc->sample[devc->num_bytes - 1] &= 0x7f; | |
baf1d714 UH |
770 | /* |
771 | * FIXME: This will only work on | |
772 | * little-endian systems. | |
a1bb33af | 773 | */ |
fefc4b85 BV |
774 | devc->rle_count = *(int *)(devc->sample); |
775 | sr_dbg("ols: RLE count = %d", devc->rle_count); | |
776 | devc->num_bytes = 0; | |
3a4d09c0 | 777 | return TRUE; |
baf1d714 | 778 | } |
3a4d09c0 | 779 | } |
fefc4b85 BV |
780 | devc->num_samples += devc->rle_count + 1; |
781 | if (devc->num_samples > devc->limit_samples) { | |
baf1d714 | 782 | /* Save us from overrunning the buffer. */ |
fefc4b85 BV |
783 | devc->rle_count -= devc->num_samples - devc->limit_samples; |
784 | devc->num_samples = devc->limit_samples; | |
a1bb33af UH |
785 | } |
786 | ||
43fc7885 UH |
787 | if (num_channels < 4) { |
788 | /* | |
789 | * Some channel groups may have been turned | |
790 | * off, to speed up transfer between the | |
791 | * hardware and the PC. Expand that here before | |
792 | * submitting it over the session bus -- | |
793 | * whatever is listening on the bus will be | |
794 | * expecting a full 32-bit sample, based on | |
795 | * the number of probes. | |
6937bb75 BV |
796 | */ |
797 | j = 0; | |
fefc4b85 | 798 | memset(devc->tmp_sample, 0, 4); |
43fc7885 | 799 | for (i = 0; i < 4; i++) { |
fefc4b85 | 800 | if (((devc->flag_reg >> 2) & (1 << i)) == 0) { |
43fc7885 UH |
801 | /* |
802 | * This channel group was | |
803 | * enabled, copy from received | |
804 | * sample. | |
805 | */ | |
fefc4b85 | 806 | devc->tmp_sample[i] = devc->sample[j++]; |
6937bb75 BV |
807 | } |
808 | } | |
fefc4b85 BV |
809 | memcpy(devc->sample, devc->tmp_sample, 4); |
810 | sr_dbg("ols: full sample 0x%.8x", *(int *)devc->sample); | |
6937bb75 BV |
811 | } |
812 | ||
a803c0db BV |
813 | /* the OLS sends its sample buffer backwards. |
814 | * store it in reverse order here, so we can dump | |
815 | * this on the session bus later. | |
816 | */ | |
fefc4b85 BV |
817 | offset = (devc->limit_samples - devc->num_samples) * 4; |
818 | for (i = 0; i <= devc->rle_count; i++) { | |
819 | memcpy(devc->raw_sample_buf + offset + (i * 4), | |
820 | devc->sample, 4); | |
baf1d714 | 821 | } |
fefc4b85 BV |
822 | memset(devc->sample, 0, 4); |
823 | devc->num_bytes = 0; | |
824 | devc->rle_count = 0; | |
a1bb33af | 825 | } |
43fc7885 UH |
826 | } else { |
827 | /* | |
828 | * This is the main loop telling us a timeout was reached, or | |
829 | * we've acquired all the samples we asked for -- we're done. | |
a803c0db | 830 | * Send the (properly-ordered) buffer to the frontend. |
43fc7885 | 831 | */ |
fefc4b85 | 832 | if (devc->trigger_at != -1) { |
a803c0db BV |
833 | /* a trigger was set up, so we need to tell the frontend |
834 | * about it. | |
835 | */ | |
fefc4b85 | 836 | if (devc->trigger_at > 0) { |
a803c0db | 837 | /* there are pre-trigger samples, send those first */ |
5a2326a7 | 838 | packet.type = SR_DF_LOGIC; |
9c939c51 | 839 | packet.payload = &logic; |
fefc4b85 | 840 | logic.length = devc->trigger_at * 4; |
9c939c51 | 841 | logic.unitsize = 4; |
fefc4b85 BV |
842 | logic.data = devc->raw_sample_buf + |
843 | (devc->limit_samples - devc->num_samples) * 4; | |
1f9813eb | 844 | sr_session_send(cb_data, &packet); |
a803c0db BV |
845 | } |
846 | ||
9c939c51 | 847 | /* send the trigger */ |
5a2326a7 | 848 | packet.type = SR_DF_TRIGGER; |
1f9813eb | 849 | sr_session_send(cb_data, &packet); |
a803c0db | 850 | |
9c939c51 | 851 | /* send post-trigger samples */ |
5a2326a7 | 852 | packet.type = SR_DF_LOGIC; |
9c939c51 | 853 | packet.payload = &logic; |
fefc4b85 | 854 | logic.length = (devc->num_samples * 4) - (devc->trigger_at * 4); |
9c939c51 | 855 | logic.unitsize = 4; |
fefc4b85 BV |
856 | logic.data = devc->raw_sample_buf + devc->trigger_at * 4 + |
857 | (devc->limit_samples - devc->num_samples) * 4; | |
1f9813eb | 858 | sr_session_send(cb_data, &packet); |
a803c0db | 859 | } else { |
9c939c51 | 860 | /* no trigger was used */ |
5a2326a7 | 861 | packet.type = SR_DF_LOGIC; |
9c939c51 | 862 | packet.payload = &logic; |
fefc4b85 | 863 | logic.length = devc->num_samples * 4; |
9c939c51 | 864 | logic.unitsize = 4; |
fefc4b85 BV |
865 | logic.data = devc->raw_sample_buf + |
866 | (devc->limit_samples - devc->num_samples) * 4; | |
1f9813eb | 867 | sr_session_send(cb_data, &packet); |
a803c0db | 868 | } |
fefc4b85 | 869 | g_free(devc->raw_sample_buf); |
a803c0db | 870 | |
530f201e | 871 | serial_flush(devc->serial); |
26bf9d56 | 872 | abort_acquisition(sdi); |
530f201e | 873 | serial_close(devc->serial); |
a1bb33af UH |
874 | } |
875 | ||
876 | return TRUE; | |
877 | } | |
878 | ||
5d9ed643 BV |
879 | static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi, |
880 | void *cb_data) | |
a1bb33af | 881 | { |
b9c735a2 UH |
882 | struct sr_datafeed_packet *packet; |
883 | struct sr_datafeed_header *header; | |
f366e86c | 884 | struct sr_datafeed_meta_logic meta; |
fefc4b85 | 885 | struct dev_context *devc; |
a803c0db | 886 | uint32_t trigger_config[4]; |
a1bb33af | 887 | uint32_t data; |
6937bb75 BV |
888 | uint16_t readcount, delaycount; |
889 | uint8_t changrp_mask; | |
22130421 | 890 | int num_channels; |
4fe9a6da | 891 | int i; |
a1bb33af | 892 | |
fefc4b85 | 893 | devc = sdi->priv; |
a1bb33af | 894 | |
5a2326a7 | 895 | if (sdi->status != SR_ST_ACTIVE) |
e46b8fb1 | 896 | return SR_ERR; |
a1bb33af | 897 | |
014359e3 BV |
898 | if (configure_probes(sdi) != SR_OK) { |
899 | sr_err("ols: failed to configured probes"); | |
900 | return SR_ERR; | |
901 | } | |
902 | ||
22130421 GM |
903 | /* |
904 | * Enable/disable channel groups in the flag register according to the | |
baf1d714 | 905 | * probe mask. Calculate this here, because num_channels is needed |
22130421 GM |
906 | * to limit readcount. |
907 | */ | |
908 | changrp_mask = 0; | |
909 | num_channels = 0; | |
910 | for (i = 0; i < 4; i++) { | |
fefc4b85 | 911 | if (devc->probe_mask & (0xff << (i * 8))) { |
22130421 GM |
912 | changrp_mask |= (1 << i); |
913 | num_channels++; | |
914 | } | |
915 | } | |
916 | ||
baf1d714 UH |
917 | /* |
918 | * Limit readcount to prevent reading past the end of the hardware | |
22130421 GM |
919 | * buffer. |
920 | */ | |
fefc4b85 | 921 | readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4; |
a803c0db BV |
922 | |
923 | memset(trigger_config, 0, 16); | |
fefc4b85 BV |
924 | trigger_config[devc->num_stages - 1] |= 0x08; |
925 | if (devc->trigger_mask[0]) { | |
926 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); | |
927 | devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages; | |
a803c0db | 928 | |
530f201e | 929 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0, |
fefc4b85 | 930 | reverse32(devc->trigger_mask[0])) != SR_OK) |
e46b8fb1 | 931 | return SR_ERR; |
530f201e | 932 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0, |
fefc4b85 | 933 | reverse32(devc->trigger_value[0])) != SR_OK) |
e46b8fb1 | 934 | return SR_ERR; |
530f201e | 935 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0, |
e46b8fb1 UH |
936 | trigger_config[0]) != SR_OK) |
937 | return SR_ERR; | |
6937bb75 | 938 | |
530f201e | 939 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_1, |
fefc4b85 | 940 | reverse32(devc->trigger_mask[1])) != SR_OK) |
e46b8fb1 | 941 | return SR_ERR; |
530f201e | 942 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_1, |
fefc4b85 | 943 | reverse32(devc->trigger_value[1])) != SR_OK) |
e46b8fb1 | 944 | return SR_ERR; |
530f201e | 945 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_1, |
e46b8fb1 UH |
946 | trigger_config[1]) != SR_OK) |
947 | return SR_ERR; | |
6937bb75 | 948 | |
530f201e | 949 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_2, |
fefc4b85 | 950 | reverse32(devc->trigger_mask[2])) != SR_OK) |
e46b8fb1 | 951 | return SR_ERR; |
530f201e | 952 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_2, |
fefc4b85 | 953 | reverse32(devc->trigger_value[2])) != SR_OK) |
e46b8fb1 | 954 | return SR_ERR; |
530f201e | 955 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_2, |
e46b8fb1 UH |
956 | trigger_config[2]) != SR_OK) |
957 | return SR_ERR; | |
a803c0db | 958 | |
530f201e | 959 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_3, |
fefc4b85 | 960 | reverse32(devc->trigger_mask[3])) != SR_OK) |
e46b8fb1 | 961 | return SR_ERR; |
530f201e | 962 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_3, |
fefc4b85 | 963 | reverse32(devc->trigger_value[3])) != SR_OK) |
e46b8fb1 | 964 | return SR_ERR; |
530f201e | 965 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_3, |
e46b8fb1 UH |
966 | trigger_config[3]) != SR_OK) |
967 | return SR_ERR; | |
6937bb75 | 968 | } else { |
530f201e | 969 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0, |
fefc4b85 | 970 | devc->trigger_mask[0]) != SR_OK) |
e46b8fb1 | 971 | return SR_ERR; |
530f201e | 972 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0, |
fefc4b85 | 973 | devc->trigger_value[0]) != SR_OK) |
e46b8fb1 | 974 | return SR_ERR; |
530f201e | 975 | if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0, |
e46b8fb1 UH |
976 | 0x00000008) != SR_OK) |
977 | return SR_ERR; | |
a803c0db | 978 | delaycount = readcount; |
6937bb75 | 979 | } |
a1bb33af | 980 | |
b08024a8 | 981 | sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, " |
fefc4b85 BV |
982 | "demux %s)", devc->cur_samplerate, devc->cur_samplerate_divider, |
983 | devc->flag_reg & FLAG_DEMUX ? "on" : "off"); | |
530f201e | 984 | if (send_longcommand(devc->serial, CMD_SET_DIVIDER, |
fefc4b85 | 985 | reverse32(devc->cur_samplerate_divider)) != SR_OK) |
4fe9a6da | 986 | return SR_ERR; |
a1bb33af | 987 | |
43fc7885 | 988 | /* Send sample limit and pre/post-trigger capture ratio. */ |
a803c0db BV |
989 | data = ((readcount - 1) & 0xffff) << 16; |
990 | data |= (delaycount - 1) & 0xffff; | |
530f201e | 991 | if (send_longcommand(devc->serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK) |
e46b8fb1 | 992 | return SR_ERR; |
a1bb33af | 993 | |
43fc7885 | 994 | /* The flag register wants them here, and 1 means "disable channel". */ |
fefc4b85 BV |
995 | devc->flag_reg |= ~(changrp_mask << 2) & 0x3c; |
996 | devc->flag_reg |= FLAG_FILTER; | |
997 | devc->rle_count = 0; | |
998 | data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000); | |
530f201e | 999 | if (send_longcommand(devc->serial, CMD_SET_FLAGS, data) != SR_OK) |
e46b8fb1 | 1000 | return SR_ERR; |
a1bb33af | 1001 | |
43fc7885 | 1002 | /* Start acquisition on the device. */ |
530f201e | 1003 | if (send_shortcommand(devc->serial, CMD_RUN) != SR_OK) |
e46b8fb1 | 1004 | return SR_ERR; |
a1bb33af | 1005 | |
fefc4b85 | 1006 | sr_source_add(devc->serial->fd, G_IO_IN, -1, receive_data, |
3cd3a20b | 1007 | cb_data); |
a1bb33af | 1008 | |
b53738ba UH |
1009 | if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) { |
1010 | sr_err("ols: %s: packet malloc failed", __func__); | |
1011 | return SR_ERR_MALLOC; | |
1012 | } | |
1013 | ||
1014 | if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) { | |
1015 | sr_err("ols: %s: header malloc failed", __func__); | |
c0a4b971 | 1016 | g_free(packet); |
b53738ba UH |
1017 | return SR_ERR_MALLOC; |
1018 | } | |
1019 | ||
43fc7885 | 1020 | /* Send header packet to the session bus. */ |
5a2326a7 | 1021 | packet->type = SR_DF_HEADER; |
43fc7885 | 1022 | packet->payload = (unsigned char *)header; |
a1bb33af UH |
1023 | header->feed_version = 1; |
1024 | gettimeofday(&header->starttime, NULL); | |
f366e86c BV |
1025 | sr_session_send(cb_data, packet); |
1026 | ||
1027 | /* Send metadata about the SR_DF_LOGIC packets to come. */ | |
1028 | packet->type = SR_DF_META_LOGIC; | |
1029 | packet->payload = &meta; | |
fefc4b85 | 1030 | meta.samplerate = devc->cur_samplerate; |
f366e86c | 1031 | meta.num_probes = NUM_PROBES; |
3cd3a20b | 1032 | sr_session_send(cb_data, packet); |
c0a4b971 | 1033 | |
a1bb33af UH |
1034 | g_free(header); |
1035 | g_free(packet); | |
1036 | ||
e46b8fb1 | 1037 | return SR_OK; |
a1bb33af UH |
1038 | } |
1039 | ||
3cd3a20b | 1040 | /* TODO: This stops acquisition on ALL devices, ignoring dev_index. */ |
69b07d14 | 1041 | static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) |
a1bb33af | 1042 | { |
17e1afcb | 1043 | /* Avoid compiler warnings. */ |
26bf9d56 | 1044 | (void)cb_data; |
afc8e4de | 1045 | |
26bf9d56 | 1046 | abort_acquisition(sdi); |
3010f21c UH |
1047 | |
1048 | return SR_OK; | |
a1bb33af UH |
1049 | } |
1050 | ||
c09f0b57 | 1051 | SR_PRIV struct sr_dev_driver ols_driver_info = { |
e519ba86 UH |
1052 | .name = "ols", |
1053 | .longname = "Openbench Logic Sniffer", | |
1054 | .api_version = 1, | |
1055 | .init = hw_init, | |
1056 | .cleanup = hw_cleanup, | |
61136ea6 | 1057 | .scan = hw_scan, |
811deee4 BV |
1058 | .dev_list = hw_dev_list, |
1059 | .dev_clear = hw_cleanup, | |
e7eb703f UH |
1060 | .dev_open = hw_dev_open, |
1061 | .dev_close = hw_dev_close, | |
dddfb3db | 1062 | .info_get = hw_info_get, |
a9a245b4 | 1063 | .dev_config_set = hw_dev_config_set, |
69040b7c UH |
1064 | .dev_acquisition_start = hw_dev_acquisition_start, |
1065 | .dev_acquisition_stop = hw_dev_acquisition_stop, | |
fefc4b85 | 1066 | .priv = NULL, |
a1bb33af | 1067 | }; |