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make output modules a bit more crashproof
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CommitLineData
a1bb33af
UH
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2010 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
926b866c 27#ifndef _WIN32
a1bb33af 28#include <termios.h>
926b866c 29#endif
a1bb33af
UH
30#include <string.h>
31#include <sys/time.h>
32#include <inttypes.h>
926b866c
UH
33#ifdef _WIN32
34/* TODO */
35#else
6937bb75 36#include <arpa/inet.h>
926b866c 37#endif
a1bb33af 38#include <glib.h>
43fc7885 39#include <sigrok.h>
a1bb33af 40
1fdb75e1
UH
41#ifdef _WIN32
42#define O_NONBLOCK FIONBIO
43#endif
44
43fc7885 45#define NUM_PROBES 32
a1bb33af
UH
46#define NUM_TRIGGER_STAGES 4
47#define TRIGGER_TYPES "01"
48#define SERIAL_SPEED B115200
43fc7885 49#define CLOCK_RATE 100000000
a1bb33af 50
43fc7885
UH
51/* Command opcodes */
52#define CMD_RESET 0x00
53#define CMD_ID 0x02
54#define CMD_SET_FLAGS 0x82
a1bb33af 55#define CMD_SET_DIVIDER 0x80
43fc7885
UH
56#define CMD_RUN 0x01
57#define CMD_CAPTURE_SIZE 0x81
a1bb33af
UH
58#define CMD_SET_TRIGGER_MASK_0 0xc0
59#define CMD_SET_TRIGGER_MASK_1 0xc4
60#define CMD_SET_TRIGGER_MASK_2 0xc8
61#define CMD_SET_TRIGGER_MASK_3 0xcc
43fc7885
UH
62#define CMD_SET_TRIGGER_VALUE_0 0xc1
63#define CMD_SET_TRIGGER_VALUE_1 0xc5
64#define CMD_SET_TRIGGER_VALUE_2 0xc9
65#define CMD_SET_TRIGGER_VALUE_3 0xcd
a1bb33af
UH
66#define CMD_SET_TRIGGER_CONFIG_0 0xc2
67#define CMD_SET_TRIGGER_CONFIG_1 0xc6
68#define CMD_SET_TRIGGER_CONFIG_2 0xca
69#define CMD_SET_TRIGGER_CONFIG_3 0xce
70
43fc7885
UH
71/* Bitmasks for CMD_FLAGS */
72#define FLAG_DEMUX 0x01
a1bb33af 73#define FLAG_FILTER 0x02
43fc7885
UH
74#define FLAG_CHANNELGROUP_1 0x04
75#define FLAG_CHANNELGROUP_2 0x08
76#define FLAG_CHANNELGROUP_3 0x10
77#define FLAG_CHANNELGROUP_4 0x20
78#define FLAG_CLOCK_EXTERNAL 0x40
79#define FLAG_CLOCK_INVERTED 0x80
80#define FLAG_RLE 0x0100
a1bb33af
UH
81
82static int capabilities[] = {
83 HWCAP_LOGIC_ANALYZER,
84 HWCAP_SAMPLERATE,
85 HWCAP_CAPTURE_RATIO,
86 HWCAP_LIMIT_SAMPLES,
43fc7885 87 0,
a1bb33af
UH
88};
89
90static struct samplerates samplerates = {
6937bb75 91 10,
a1bb33af
UH
92 MHZ(200),
93 1,
43fc7885 94 0,
a1bb33af
UH
95};
96
43fc7885 97/* List of struct serial_device_instance */
a1bb33af
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98static GSList *device_instances = NULL;
99
43fc7885 100/* Current state of the flag register */
6937bb75 101static uint32_t flag_reg = 0;
a1bb33af
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102
103static uint64_t cur_samplerate = 0;
104static uint64_t limit_samples = 0;
43fc7885
UH
105/*
106 * Pre/post trigger capture ratio, in percentage.
107 * 0 means no pre-trigger data.
108 */
6937bb75 109static int capture_ratio = 0;
a803c0db 110static int trigger_at = -1;
43fc7885
UH
111static uint32_t probe_mask = 0xffffffff;
112static uint32_t trigger_mask[4] = { 0, 0, 0, 0 };
113static uint32_t trigger_value[4] = { 0, 0, 0, 0 };
a803c0db 114static int num_stages = 0;
a1bb33af 115
6937bb75 116static int send_shortcommand(int fd, uint8_t command)
a1bb33af
UH
117{
118 char buf[1];
119
edc508d4 120 g_debug("ols: sending cmd 0x%.2x", command);
a1bb33af 121 buf[0] = command;
2119ab03 122 if (serial_write(fd, buf, 1) != 1)
e31b636d 123 return SIGROK_ERR;
a1bb33af
UH
124
125 return SIGROK_OK;
126}
127
6937bb75 128static int send_longcommand(int fd, uint8_t command, uint32_t data)
a1bb33af
UH
129{
130 char buf[5];
131
edc508d4 132 g_debug("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
a1bb33af 133 buf[0] = command;
6937bb75
BV
134 buf[1] = (data & 0xff000000) >> 24;
135 buf[2] = (data & 0xff0000) >> 16;
136 buf[3] = (data & 0xff00) >> 8;
137 buf[4] = data & 0xff;
2119ab03 138 if (serial_write(fd, buf, 5) != 5)
e31b636d 139 return SIGROK_ERR;
a1bb33af
UH
140
141 return SIGROK_OK;
142}
143
144static int configure_probes(GSList *probes)
145{
146 struct probe *probe;
147 GSList *l;
6937bb75 148 int probe_bit, stage, i;
a1bb33af
UH
149 char *tc;
150
151 probe_mask = 0;
43fc7885 152 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
a1bb33af
UH
153 trigger_mask[i] = 0;
154 trigger_value[i] = 0;
155 }
156
a803c0db 157 num_stages = 0;
43fc7885
UH
158 for (l = probes; l; l = l->next) {
159 probe = (struct probe *)l->data;
160 if (!probe->enabled)
6937bb75
BV
161 continue;
162
43fc7885
UH
163 /*
164 * Set up the probe mask for later configuration into the
165 * flag register.
166 */
a1bb33af
UH
167 probe_bit = 1 << (probe->index - 1);
168 probe_mask |= probe_bit;
6937bb75 169
a803c0db 170 if (!probe->trigger)
6937bb75
BV
171 continue;
172
43fc7885 173 /* Configure trigger mask and value. */
6937bb75 174 stage = 0;
43fc7885 175 for (tc = probe->trigger; tc && *tc; tc++) {
6937bb75 176 trigger_mask[stage] |= probe_bit;
43fc7885 177 if (*tc == '1')
6937bb75
BV
178 trigger_value[stage] |= probe_bit;
179 stage++;
43fc7885
UH
180 if (stage > 3)
181 /*
182 * TODO: Only supporting parallel mode, with
183 * up to 4 stages.
184 */
54dc4bc7 185 return SIGROK_ERR;
a1bb33af 186 }
a803c0db
BV
187 if (stage > num_stages)
188 num_stages = stage;
a1bb33af
UH
189 }
190
a1bb33af
UH
191 return SIGROK_OK;
192}
193
a803c0db 194static uint32_t reverse16(uint32_t in)
6937bb75
BV
195{
196 uint32_t out;
197
a803c0db
BV
198 out = (in & 0xff) << 8;
199 out |= (in & 0xff00) >> 8;
200 out |= (in & 0xff0000) << 8;
201 out |= (in & 0xff000000) >> 8;
202
203 return out;
204}
205
206static uint32_t reverse32(uint32_t in)
207{
208 uint32_t out;
209
210 out = (in & 0xff) << 24;
211 out |= (in & 0xff00) << 8;
212 out |= (in & 0xff0000) >> 8;
213 out |= (in & 0xff000000) >> 24;
214
215 return out;
6937bb75
BV
216}
217
a1bb33af
UH
218static int hw_init(char *deviceinfo)
219{
220 struct sigrok_device_instance *sdi;
221 GSList *ports, *l;
222 GPollFD *fds;
6937bb75 223 int devcnt, final_devcnt, num_ports, fd, ret, i;
d02a535e 224 char buf[8], **device_names, **serial_params;
a1bb33af 225
43fc7885 226 if (deviceinfo)
6937bb75 227 ports = g_slist_append(NULL, strdup(deviceinfo));
a1bb33af 228 else
43fc7885 229 /* No specific device given, so scan all serial ports. */
a1bb33af
UH
230 ports = list_serial_ports();
231
232 num_ports = g_slist_length(ports);
6937bb75 233 fds = calloc(1, num_ports * sizeof(GPollFD));
43fc7885
UH
234 device_names = malloc(num_ports * sizeof(char *));
235 serial_params = malloc(num_ports * sizeof(char *));
a1bb33af 236 devcnt = 0;
43fc7885
UH
237 for (l = ports; l; l = l->next) {
238 /* The discovery procedure is like this: first send the Reset
239 * command (0x00) 5 times, since the device could be anywhere
240 * in a 5-byte command. Then send the ID command (0x02).
241 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
242 * have a match.
243 *
244 * Since it may take the device a while to respond at 115Kb/s,
245 * we do all the sending first, then wait for all of them to
246 * respond with g_poll().
a1bb33af 247 */
e6ac9ac8 248 g_message("ols: probing %s...", (char *)l->data);
d02a535e 249 fd = serial_open(l->data, O_RDWR | O_NONBLOCK);
43fc7885 250 if (fd != -1) {
d02a535e
BV
251 serial_params[devcnt] = serial_backup_params(fd);
252 serial_set_params(fd, 115200, 8, 0, 1, 2);
6937bb75 253 ret = SIGROK_OK;
43fc7885
UH
254 for (i = 0; i < 5; i++) {
255 if ((ret = send_shortcommand(fd,
256 CMD_RESET)) != SIGROK_OK) {
257 /* Serial port is not writable. */
6937bb75
BV
258 break;
259 }
a1bb33af 260 }
43fc7885
UH
261 if (ret != SIGROK_OK) {
262 serial_restore_params(fd,
263 serial_params[devcnt]);
d02a535e 264 serial_close(fd);
6937bb75 265 continue;
d02a535e 266 }
6937bb75
BV
267 send_shortcommand(fd, CMD_ID);
268 fds[devcnt].fd = fd;
269 fds[devcnt].events = G_IO_IN;
270 device_names[devcnt] = strdup(l->data);
271 devcnt++;
a1bb33af 272 }
6937bb75 273 free(l->data);
a1bb33af
UH
274 }
275
5b15b41e
PS
276 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
277 usleep(10000);
a1bb33af
UH
278
279 final_devcnt = 0;
280 g_poll(fds, devcnt, 1);
43fc7885
UH
281 for (i = 0; i < devcnt; i++) {
282 if (fds[i].revents == G_IO_IN) {
2119ab03 283 if (serial_read(fds[i].fd, buf, 4) == 4) {
43fc7885
UH
284 if (!strncmp(buf, "1SLO", 4)
285 || !strncmp(buf, "1ALS", 4)) {
286 if (!strncmp(buf, "1SLO", 4))
287 sdi = sigrok_device_instance_new
288 (final_devcnt, ST_INACTIVE,
289 "Openbench",
290 "Logic Sniffer", "v1.0");
a1bb33af 291 else
43fc7885
UH
292 sdi = sigrok_device_instance_new
293 (final_devcnt, ST_INACTIVE,
e6ac9ac8 294 "Openbench", "Logic Sniffer",
43fc7885
UH
295 "v1.0");
296 sdi->serial = serial_device_instance_new
297 (device_names[i], -1);
298 device_instances =
299 g_slist_append(device_instances, sdi);
a1bb33af 300 final_devcnt++;
d02a535e 301 serial_close(fds[i].fd);
a1bb33af
UH
302 fds[i].fd = 0;
303 }
304 }
6937bb75 305 free(device_names[i]);
a1bb33af
UH
306 }
307
43fc7885 308 if (fds[i].fd != 0) {
d02a535e
BV
309 serial_restore_params(fds[i].fd, serial_params[i]);
310 serial_close(fds[i].fd);
6937bb75 311 }
d02a535e 312 free(serial_params[i]);
a1bb33af
UH
313 }
314
6937bb75
BV
315 free(fds);
316 free(device_names);
d02a535e 317 free(serial_params);
a1bb33af
UH
318 g_slist_free(ports);
319
6937bb75
BV
320 cur_samplerate = samplerates.low;
321
a1bb33af
UH
322 return final_devcnt;
323}
324
a1bb33af
UH
325static int hw_opendev(int device_index)
326{
327 struct sigrok_device_instance *sdi;
328
43fc7885 329 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
e31b636d 330 return SIGROK_ERR;
a1bb33af 331
d02a535e 332 sdi->serial->fd = serial_open(sdi->serial->port, O_RDWR);
43fc7885 333 if (sdi->serial->fd == -1)
e31b636d 334 return SIGROK_ERR;
a1bb33af
UH
335
336 sdi->status = ST_ACTIVE;
337
338 return SIGROK_OK;
339}
340
a1bb33af
UH
341static void hw_closedev(int device_index)
342{
343 struct sigrok_device_instance *sdi;
344
43fc7885 345 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
a1bb33af
UH
346 return;
347
43fc7885 348 if (sdi->serial->fd != -1) {
d02a535e 349 serial_close(sdi->serial->fd);
a1bb33af
UH
350 sdi->serial->fd = -1;
351 sdi->status = ST_INACTIVE;
352 }
a1bb33af
UH
353}
354
a1bb33af
UH
355static void hw_cleanup(void)
356{
357 GSList *l;
358 struct sigrok_device_instance *sdi;
359
43fc7885
UH
360 /* Properly close all devices. */
361 for (l = device_instances; l; l = l->next) {
a1bb33af 362 sdi = l->data;
43fc7885 363 if (sdi->serial->fd != -1)
d02a535e 364 serial_close(sdi->serial->fd);
a1bb33af
UH
365 sigrok_device_instance_free(sdi);
366 }
367 g_slist_free(device_instances);
368 device_instances = NULL;
a1bb33af
UH
369}
370
a1bb33af
UH
371static void *hw_get_device_info(int device_index, int device_info_id)
372{
373 struct sigrok_device_instance *sdi;
374 void *info;
375
43fc7885 376 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
a1bb33af
UH
377 return NULL;
378
379 info = NULL;
43fc7885 380 switch (device_info_id) {
a1bb33af
UH
381 case DI_INSTANCE:
382 info = sdi;
383 break;
384 case DI_NUM_PROBES:
385 info = GINT_TO_POINTER(NUM_PROBES);
386 break;
387 case DI_SAMPLERATES:
388 info = &samplerates;
389 break;
390 case DI_TRIGGER_TYPES:
43fc7885 391 info = (char *)TRIGGER_TYPES;
a1bb33af 392 break;
4c100f32 393 case DI_CUR_SAMPLERATE:
a1bb33af
UH
394 info = &cur_samplerate;
395 break;
396 }
397
398 return info;
399}
400
a1bb33af
UH
401static int hw_get_status(int device_index)
402{
403 struct sigrok_device_instance *sdi;
404
43fc7885 405 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
a1bb33af
UH
406 return ST_NOT_FOUND;
407
408 return sdi->status;
409}
410
a1bb33af
UH
411static int *hw_get_capabilities(void)
412{
a1bb33af
UH
413 return capabilities;
414}
415
43fc7885
UH
416static int set_configuration_samplerate(struct sigrok_device_instance *sdi,
417 uint64_t samplerate)
a1bb33af
UH
418{
419 uint32_t divider;
420
43fc7885 421 if (samplerate < samplerates.low || samplerate > samplerates.high)
e31b636d 422 return SIGROK_ERR_SAMPLERATE;
a1bb33af 423
43fc7885 424 if (samplerate > CLOCK_RATE) {
a1bb33af 425 flag_reg |= FLAG_DEMUX;
6937bb75 426 divider = (CLOCK_RATE * 2 / samplerate) - 1;
43fc7885 427 } else {
6937bb75
BV
428 flag_reg &= ~FLAG_DEMUX;
429 divider = (CLOCK_RATE / samplerate) - 1;
a1bb33af 430 }
a1bb33af 431
e6ac9ac8 432 g_message("ols: setting samplerate to %" PRIu64 " Hz (divider %u, demux %s)",
a803c0db 433 samplerate, divider, flag_reg & FLAG_DEMUX ? "on" : "off");
43fc7885 434
a803c0db 435 if (send_longcommand(sdi->serial->fd, CMD_SET_DIVIDER, reverse32(divider)) != SIGROK_OK)
e31b636d 436 return SIGROK_ERR;
a1bb33af
UH
437 cur_samplerate = samplerate;
438
439 return SIGROK_OK;
440}
441
a1bb33af
UH
442static int hw_set_configuration(int device_index, int capability, void *value)
443{
444 struct sigrok_device_instance *sdi;
445 int ret;
446 uint64_t *tmp_u64;
447
43fc7885 448 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
e31b636d 449 return SIGROK_ERR;
a1bb33af 450
43fc7885 451 if (sdi->status != ST_ACTIVE)
e31b636d 452 return SIGROK_ERR;
a1bb33af 453
a803c0db
BV
454 switch (capability) {
455 case HWCAP_SAMPLERATE:
a1bb33af
UH
456 tmp_u64 = value;
457 ret = set_configuration_samplerate(sdi, *tmp_u64);
a803c0db
BV
458 break;
459 case HWCAP_PROBECONFIG:
43fc7885 460 ret = configure_probes((GSList *) value);
a803c0db
BV
461 break;
462 case HWCAP_LIMIT_SAMPLES:
2458ea65
BV
463 tmp_u64 = value;
464 limit_samples = *tmp_u64;
e6ac9ac8 465 g_message("ols: sample limit %" PRIu64, limit_samples);
a1bb33af 466 ret = SIGROK_OK;
a803c0db
BV
467 break;
468 case HWCAP_CAPTURE_RATIO:
469 tmp_u64 = value;
470 capture_ratio = *tmp_u64;
43fc7885 471 if (capture_ratio < 0 || capture_ratio > 100) {
a1bb33af 472 capture_ratio = 0;
e31b636d 473 ret = SIGROK_ERR;
43fc7885 474 } else
a1bb33af 475 ret = SIGROK_OK;
a803c0db
BV
476 break;
477 default:
e31b636d 478 ret = SIGROK_ERR;
43fc7885 479 }
a1bb33af
UH
480
481 return ret;
482}
483
a1bb33af
UH
484static int receive_data(int fd, int revents, void *user_data)
485{
afc8e4de 486 static unsigned int num_transfers = 0;
a1bb33af 487 static int num_bytes = 0;
43fc7885
UH
488 static char last_sample[4] = { 0xff, 0xff, 0xff, 0xff };
489 static unsigned char sample[4] = { 0, 0, 0, 0 };
490 static unsigned char tmp_sample[4];
a803c0db
BV
491 static unsigned char *raw_sample_buf = NULL;
492 int count, buflen, num_channels, offset, i, j;
a1bb33af
UH
493 struct datafeed_packet packet;
494 unsigned char byte, *buffer;
495
43fc7885
UH
496 if (num_transfers++ == 0) {
497 /*
498 * First time round, means the device started sending data,
499 * and will not stop until done. If it stops sending for
500 * longer than it takes to send a byte, that means it's
501 * finished. We'll double that to 30ms to be sure...
a1bb33af
UH
502 */
503 source_remove(fd);
a803c0db
BV
504 source_add(fd, G_IO_IN, 30, receive_data, user_data);
505 raw_sample_buf = malloc(limit_samples * 4);
506 /* fill with 1010... for debugging */
507 memset(raw_sample_buf, 0x82, limit_samples * 4);
a1bb33af
UH
508 }
509
6937bb75 510 num_channels = 0;
43fc7885
UH
511 for (i = 0x20; i > 0x02; i /= 2) {
512 if ((flag_reg & i) == 0)
6937bb75 513 num_channels++;
43fc7885 514 }
6937bb75 515
43fc7885
UH
516 if (revents == G_IO_IN
517 && num_transfers / num_channels <= limit_samples) {
2119ab03 518 if (serial_read(fd, &byte, 1) != 1)
a1bb33af
UH
519 return FALSE;
520
521 sample[num_bytes++] = byte;
e6ac9ac8 522 g_debug("ols: received byte 0x%.2x", byte);
43fc7885 523 if (num_bytes == num_channels) {
e6ac9ac8 524 g_debug("ols: received sample 0x%.*x", num_bytes * 2, (int) *sample);
43fc7885
UH
525 /* Got a full sample. */
526 if (flag_reg & FLAG_RLE) {
527 /*
528 * In RLE mode -1 should never come in as a
529 * sample, because bit 31 is the "count" flag.
530 * TODO: Endianness may be wrong here, could be
531 * sample[3].
532 */
533 if (sample[0] & 0x80
534 && !(last_sample[0] & 0x80)) {
535 count = (int)(*sample) & 0x7fffffff;
a1bb33af
UH
536 buffer = g_malloc(count);
537 buflen = 0;
43fc7885 538 for (i = 0; i < count; i++) {
a803c0db 539 memcpy(buffer + buflen, last_sample, 4);
a1bb33af
UH
540 buflen += 4;
541 }
43fc7885
UH
542 } else {
543 /*
544 * Just a single sample, next sample
545 * will probably be a count referring
546 * to this -- but this one is still a
547 * part of the stream.
a1bb33af
UH
548 */
549 buffer = sample;
550 buflen = 4;
551 }
43fc7885
UH
552 } else {
553 /* No compression. */
a1bb33af
UH
554 buffer = sample;
555 buflen = 4;
556 }
557
43fc7885
UH
558 if (num_channels < 4) {
559 /*
560 * Some channel groups may have been turned
561 * off, to speed up transfer between the
562 * hardware and the PC. Expand that here before
563 * submitting it over the session bus --
564 * whatever is listening on the bus will be
565 * expecting a full 32-bit sample, based on
566 * the number of probes.
6937bb75
BV
567 */
568 j = 0;
569 memset(tmp_sample, 0, 4);
43fc7885 570 for (i = 0; i < 4; i++) {
a803c0db 571 if (((flag_reg >> 2) & (1 << i)) == 0) {
43fc7885
UH
572 /*
573 * This channel group was
574 * enabled, copy from received
575 * sample.
576 */
6937bb75
BV
577 tmp_sample[i] = sample[j++];
578 }
579 }
580 memcpy(sample, tmp_sample, 4);
e6ac9ac8 581 g_debug("ols: full sample 0x%.8x", (int) *sample);
6937bb75
BV
582 }
583
a803c0db
BV
584 /* the OLS sends its sample buffer backwards.
585 * store it in reverse order here, so we can dump
586 * this on the session bus later.
587 */
f0d1b53e 588 offset = (limit_samples - num_transfers / num_channels) * 4;
a803c0db
BV
589 memcpy(raw_sample_buf + offset, sample, 4);
590
43fc7885 591 if (buffer == sample)
6937bb75 592 memcpy(last_sample, buffer, num_channels);
a1bb33af
UH
593 else
594 g_free(buffer);
595
6937bb75 596 memset(sample, 0, 4);
a1bb33af
UH
597 num_bytes = 0;
598 }
43fc7885
UH
599 } else {
600 /*
601 * This is the main loop telling us a timeout was reached, or
602 * we've acquired all the samples we asked for -- we're done.
a803c0db 603 * Send the (properly-ordered) buffer to the frontend.
43fc7885 604 */
a803c0db
BV
605 if (trigger_at != -1) {
606 /* a trigger was set up, so we need to tell the frontend
607 * about it.
608 */
609 if (trigger_at > 0) {
610 /* there are pre-trigger samples, send those first */
4c046c6b 611 packet.type = DF_LOGIC;
a803c0db 612 packet.length = trigger_at * 4;
4c046c6b 613 packet.unitsize = 4;
a803c0db
BV
614 packet.payload = raw_sample_buf;
615 session_bus(user_data, &packet);
616 }
617
618 packet.type = DF_TRIGGER;
619 packet.length = 0;
620 session_bus(user_data, &packet);
621
4c046c6b 622 packet.type = DF_LOGIC;
a803c0db 623 packet.length = (limit_samples * 4) - (trigger_at * 4);
4c046c6b 624 packet.unitsize = 4;
a803c0db
BV
625 packet.payload = raw_sample_buf + trigger_at * 4;
626 session_bus(user_data, &packet);
627 } else {
4c046c6b 628 packet.type = DF_LOGIC;
a803c0db 629 packet.length = limit_samples * 4;
4c046c6b 630 packet.unitsize = 4;
a803c0db
BV
631 packet.payload = raw_sample_buf;
632 session_bus(user_data, &packet);
633 }
634 free(raw_sample_buf);
635
06d64eb8 636 serial_flush(fd);
d02a535e 637 serial_close(fd);
a1bb33af
UH
638 packet.type = DF_END;
639 packet.length = 0;
640 session_bus(user_data, &packet);
641 }
642
643 return TRUE;
644}
645
a1bb33af
UH
646static int hw_start_acquisition(int device_index, gpointer session_device_id)
647{
43fc7885 648 int i;
a1bb33af
UH
649 struct datafeed_packet *packet;
650 struct datafeed_header *header;
651 struct sigrok_device_instance *sdi;
a803c0db 652 uint32_t trigger_config[4];
a1bb33af 653 uint32_t data;
6937bb75
BV
654 uint16_t readcount, delaycount;
655 uint8_t changrp_mask;
a1bb33af 656
43fc7885 657 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
e31b636d 658 return SIGROK_ERR;
a1bb33af 659
43fc7885 660 if (sdi->status != ST_ACTIVE)
e31b636d 661 return SIGROK_ERR;
a1bb33af 662
a803c0db
BV
663 readcount = limit_samples / 4;
664
665 memset(trigger_config, 0, 16);
666 trigger_config[num_stages-1] |= 0x08;
43fc7885 667 if (trigger_mask[0]) {
a803c0db
BV
668 delaycount = readcount * (1 - capture_ratio / 100.0);
669 trigger_at = (readcount - delaycount) * 4 - num_stages;
a803c0db 670
43fc7885 671 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_0,
a803c0db 672 reverse32(trigger_mask[0])) != SIGROK_OK)
54dc4bc7 673 return SIGROK_ERR;
a803c0db
BV
674 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_0,
675 reverse32(trigger_value[0])) != SIGROK_OK)
54dc4bc7 676 return SIGROK_ERR;
a803c0db
BV
677 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
678 trigger_config[0]) != SIGROK_OK)
54dc4bc7 679 return SIGROK_ERR;
6937bb75 680
a803c0db
BV
681 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_1,
682 reverse32(trigger_mask[1])) != SIGROK_OK)
54dc4bc7 683 return SIGROK_ERR;
43fc7885 684 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_1,
a803c0db 685 reverse32(trigger_value[1])) != SIGROK_OK)
54dc4bc7 686 return SIGROK_ERR;
a803c0db
BV
687 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
688 trigger_config[1]) != SIGROK_OK)
54dc4bc7 689 return SIGROK_ERR;
6937bb75 690
a803c0db
BV
691 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_2,
692 reverse32(trigger_mask[2])) != SIGROK_OK)
54dc4bc7 693 return SIGROK_ERR;
a803c0db
BV
694 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_2,
695 reverse32(trigger_value[2])) != SIGROK_OK)
54dc4bc7 696 return SIGROK_ERR;
43fc7885 697 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
a803c0db
BV
698 trigger_config[2]) != SIGROK_OK)
699 return SIGROK_ERR;
700
701 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_3,
702 reverse32(trigger_mask[3])) != SIGROK_OK)
703 return SIGROK_ERR;
704 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_3,
705 reverse32(trigger_value[3])) != SIGROK_OK)
54dc4bc7 706 return SIGROK_ERR;
43fc7885 707 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
a803c0db 708 trigger_config[3]) != SIGROK_OK)
54dc4bc7 709 return SIGROK_ERR;
6937bb75 710 } else {
43fc7885
UH
711 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_0,
712 trigger_mask[0]) != SIGROK_OK)
54dc4bc7 713 return SIGROK_ERR;
43fc7885
UH
714 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_0,
715 trigger_value[0]) != SIGROK_OK)
54dc4bc7 716 return SIGROK_ERR;
43fc7885
UH
717 if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
718 0x00000008) != SIGROK_OK)
54dc4bc7 719 return SIGROK_ERR;
a803c0db 720 delaycount = readcount;
6937bb75 721 }
a1bb33af 722
6937bb75 723 set_configuration_samplerate(sdi, cur_samplerate);
a1bb33af 724
43fc7885 725 /* Send sample limit and pre/post-trigger capture ratio. */
a803c0db
BV
726 data = ((readcount - 1) & 0xffff) << 16;
727 data |= (delaycount - 1) & 0xffff;
728 if (send_longcommand(sdi->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SIGROK_OK)
e31b636d 729 return SIGROK_ERR;
a1bb33af 730
43fc7885
UH
731 /*
732 * Enable/disable channel groups in the flag register according to the
a803c0db 733 * probe mask.
6937bb75
BV
734 */
735 changrp_mask = 0;
43fc7885
UH
736 for (i = 0; i < 4; i++) {
737 if (probe_mask & (0xff << (i * 8)))
a803c0db 738 changrp_mask |= (1 << i);
6937bb75 739 }
43fc7885
UH
740
741 /* The flag register wants them here, and 1 means "disable channel". */
6937bb75 742 flag_reg |= ~(changrp_mask << 2) & 0x3c;
a803c0db 743 flag_reg |= FLAG_FILTER;
6937bb75 744 data = flag_reg << 24;
43fc7885 745 if (send_longcommand(sdi->serial->fd, CMD_SET_FLAGS, data) != SIGROK_OK)
54dc4bc7 746 return SIGROK_ERR;
a1bb33af 747
43fc7885
UH
748 /* Start acquisition on the device. */
749 if (send_shortcommand(sdi->serial->fd, CMD_RUN) != SIGROK_OK)
e31b636d 750 return SIGROK_ERR;
a1bb33af 751
43fc7885
UH
752 source_add(sdi->serial->fd, G_IO_IN, -1, receive_data,
753 session_device_id);
a1bb33af 754
43fc7885 755 /* Send header packet to the session bus. */
a1bb33af
UH
756 packet = g_malloc(sizeof(struct datafeed_packet));
757 header = g_malloc(sizeof(struct datafeed_header));
43fc7885 758 if (!packet || !header)
e31b636d 759 return SIGROK_ERR;
a1bb33af
UH
760 packet->type = DF_HEADER;
761 packet->length = sizeof(struct datafeed_header);
43fc7885 762 packet->payload = (unsigned char *)header;
a1bb33af
UH
763 header->feed_version = 1;
764 gettimeofday(&header->starttime, NULL);
4c100f32 765 header->samplerate = cur_samplerate;
a1bb33af 766 header->protocol_id = PROTO_RAW;
c2616fb9
DR
767 header->num_logic_probes = NUM_PROBES;
768 header->num_analog_probes = 0;
a1bb33af
UH
769 session_bus(session_device_id, packet);
770 g_free(header);
771 g_free(packet);
772
773 return SIGROK_OK;
774}
775
a1bb33af
UH
776static void hw_stop_acquisition(int device_index, gpointer session_device_id)
777{
778 struct datafeed_packet packet;
779
afc8e4de
UH
780 /* QUICK HACK */
781 device_index = device_index;
782
a1bb33af
UH
783 packet.type = DF_END;
784 packet.length = 0;
785 session_bus(session_device_id, &packet);
a1bb33af
UH
786}
787
a1bb33af 788struct device_plugin ols_plugin_info = {
e6ac9ac8 789 "ols",
a1bb33af
UH
790 1,
791 hw_init,
792 hw_cleanup,
a1bb33af
UH
793 hw_opendev,
794 hw_closedev,
795 hw_get_device_info,
796 hw_get_status,
797 hw_get_capabilities,
798 hw_set_configuration,
799 hw_start_acquisition,
43fc7885 800 hw_stop_acquisition,
a1bb33af 801};