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Commit | Line | Data |
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a1bb33af UH |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2010 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <stdio.h> | |
21 | #include <stdint.h> | |
22 | #include <stdlib.h> | |
23 | #include <sys/types.h> | |
24 | #include <sys/stat.h> | |
25 | #include <fcntl.h> | |
26 | #include <unistd.h> | |
926b866c | 27 | #ifndef _WIN32 |
a1bb33af | 28 | #include <termios.h> |
926b866c | 29 | #endif |
a1bb33af UH |
30 | #include <string.h> |
31 | #include <sys/time.h> | |
32 | #include <inttypes.h> | |
926b866c UH |
33 | #ifdef _WIN32 |
34 | /* TODO */ | |
35 | #else | |
6937bb75 | 36 | #include <arpa/inet.h> |
926b866c | 37 | #endif |
a1bb33af | 38 | #include <glib.h> |
43fc7885 | 39 | #include <sigrok.h> |
1483577e | 40 | #include <sigrok-internal.h> |
a1bb33af | 41 | |
1fdb75e1 UH |
42 | #ifdef _WIN32 |
43 | #define O_NONBLOCK FIONBIO | |
44 | #endif | |
45 | ||
43fc7885 | 46 | #define NUM_PROBES 32 |
a1bb33af UH |
47 | #define NUM_TRIGGER_STAGES 4 |
48 | #define TRIGGER_TYPES "01" | |
49 | #define SERIAL_SPEED B115200 | |
43fc7885 | 50 | #define CLOCK_RATE 100000000 |
a1bb33af | 51 | |
43fc7885 UH |
52 | /* Command opcodes */ |
53 | #define CMD_RESET 0x00 | |
54 | #define CMD_ID 0x02 | |
55 | #define CMD_SET_FLAGS 0x82 | |
a1bb33af | 56 | #define CMD_SET_DIVIDER 0x80 |
43fc7885 UH |
57 | #define CMD_RUN 0x01 |
58 | #define CMD_CAPTURE_SIZE 0x81 | |
a1bb33af UH |
59 | #define CMD_SET_TRIGGER_MASK_0 0xc0 |
60 | #define CMD_SET_TRIGGER_MASK_1 0xc4 | |
61 | #define CMD_SET_TRIGGER_MASK_2 0xc8 | |
62 | #define CMD_SET_TRIGGER_MASK_3 0xcc | |
43fc7885 UH |
63 | #define CMD_SET_TRIGGER_VALUE_0 0xc1 |
64 | #define CMD_SET_TRIGGER_VALUE_1 0xc5 | |
65 | #define CMD_SET_TRIGGER_VALUE_2 0xc9 | |
66 | #define CMD_SET_TRIGGER_VALUE_3 0xcd | |
a1bb33af UH |
67 | #define CMD_SET_TRIGGER_CONFIG_0 0xc2 |
68 | #define CMD_SET_TRIGGER_CONFIG_1 0xc6 | |
69 | #define CMD_SET_TRIGGER_CONFIG_2 0xca | |
70 | #define CMD_SET_TRIGGER_CONFIG_3 0xce | |
71 | ||
43fc7885 UH |
72 | /* Bitmasks for CMD_FLAGS */ |
73 | #define FLAG_DEMUX 0x01 | |
a1bb33af | 74 | #define FLAG_FILTER 0x02 |
43fc7885 UH |
75 | #define FLAG_CHANNELGROUP_1 0x04 |
76 | #define FLAG_CHANNELGROUP_2 0x08 | |
77 | #define FLAG_CHANNELGROUP_3 0x10 | |
78 | #define FLAG_CHANNELGROUP_4 0x20 | |
79 | #define FLAG_CLOCK_EXTERNAL 0x40 | |
80 | #define FLAG_CLOCK_INVERTED 0x80 | |
81 | #define FLAG_RLE 0x0100 | |
a1bb33af UH |
82 | |
83 | static int capabilities[] = { | |
84 | HWCAP_LOGIC_ANALYZER, | |
85 | HWCAP_SAMPLERATE, | |
86 | HWCAP_CAPTURE_RATIO, | |
87 | HWCAP_LIMIT_SAMPLES, | |
43fc7885 | 88 | 0, |
a1bb33af UH |
89 | }; |
90 | ||
91 | static struct samplerates samplerates = { | |
6937bb75 | 92 | 10, |
a1bb33af UH |
93 | MHZ(200), |
94 | 1, | |
43fc7885 | 95 | 0, |
a1bb33af UH |
96 | }; |
97 | ||
43fc7885 | 98 | /* List of struct serial_device_instance */ |
a1bb33af UH |
99 | static GSList *device_instances = NULL; |
100 | ||
43fc7885 | 101 | /* Current state of the flag register */ |
6937bb75 | 102 | static uint32_t flag_reg = 0; |
a1bb33af UH |
103 | |
104 | static uint64_t cur_samplerate = 0; | |
105 | static uint64_t limit_samples = 0; | |
43fc7885 UH |
106 | /* |
107 | * Pre/post trigger capture ratio, in percentage. | |
108 | * 0 means no pre-trigger data. | |
109 | */ | |
6937bb75 | 110 | static int capture_ratio = 0; |
a803c0db | 111 | static int trigger_at = -1; |
43fc7885 UH |
112 | static uint32_t probe_mask = 0xffffffff; |
113 | static uint32_t trigger_mask[4] = { 0, 0, 0, 0 }; | |
114 | static uint32_t trigger_value[4] = { 0, 0, 0, 0 }; | |
a803c0db | 115 | static int num_stages = 0; |
a1bb33af | 116 | |
6937bb75 | 117 | static int send_shortcommand(int fd, uint8_t command) |
a1bb33af UH |
118 | { |
119 | char buf[1]; | |
120 | ||
edc508d4 | 121 | g_debug("ols: sending cmd 0x%.2x", command); |
a1bb33af | 122 | buf[0] = command; |
2119ab03 | 123 | if (serial_write(fd, buf, 1) != 1) |
e31b636d | 124 | return SIGROK_ERR; |
a1bb33af UH |
125 | |
126 | return SIGROK_OK; | |
127 | } | |
128 | ||
6937bb75 | 129 | static int send_longcommand(int fd, uint8_t command, uint32_t data) |
a1bb33af UH |
130 | { |
131 | char buf[5]; | |
132 | ||
edc508d4 | 133 | g_debug("ols: sending cmd 0x%.2x data 0x%.8x", command, data); |
a1bb33af | 134 | buf[0] = command; |
6937bb75 BV |
135 | buf[1] = (data & 0xff000000) >> 24; |
136 | buf[2] = (data & 0xff0000) >> 16; | |
137 | buf[3] = (data & 0xff00) >> 8; | |
138 | buf[4] = data & 0xff; | |
2119ab03 | 139 | if (serial_write(fd, buf, 5) != 5) |
e31b636d | 140 | return SIGROK_ERR; |
a1bb33af UH |
141 | |
142 | return SIGROK_OK; | |
143 | } | |
144 | ||
145 | static int configure_probes(GSList *probes) | |
146 | { | |
147 | struct probe *probe; | |
148 | GSList *l; | |
6937bb75 | 149 | int probe_bit, stage, i; |
a1bb33af UH |
150 | char *tc; |
151 | ||
152 | probe_mask = 0; | |
43fc7885 | 153 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { |
a1bb33af UH |
154 | trigger_mask[i] = 0; |
155 | trigger_value[i] = 0; | |
156 | } | |
157 | ||
a803c0db | 158 | num_stages = 0; |
43fc7885 UH |
159 | for (l = probes; l; l = l->next) { |
160 | probe = (struct probe *)l->data; | |
161 | if (!probe->enabled) | |
6937bb75 BV |
162 | continue; |
163 | ||
43fc7885 UH |
164 | /* |
165 | * Set up the probe mask for later configuration into the | |
166 | * flag register. | |
167 | */ | |
a1bb33af UH |
168 | probe_bit = 1 << (probe->index - 1); |
169 | probe_mask |= probe_bit; | |
6937bb75 | 170 | |
a803c0db | 171 | if (!probe->trigger) |
6937bb75 BV |
172 | continue; |
173 | ||
43fc7885 | 174 | /* Configure trigger mask and value. */ |
6937bb75 | 175 | stage = 0; |
43fc7885 | 176 | for (tc = probe->trigger; tc && *tc; tc++) { |
6937bb75 | 177 | trigger_mask[stage] |= probe_bit; |
43fc7885 | 178 | if (*tc == '1') |
6937bb75 BV |
179 | trigger_value[stage] |= probe_bit; |
180 | stage++; | |
43fc7885 UH |
181 | if (stage > 3) |
182 | /* | |
183 | * TODO: Only supporting parallel mode, with | |
184 | * up to 4 stages. | |
185 | */ | |
54dc4bc7 | 186 | return SIGROK_ERR; |
a1bb33af | 187 | } |
a803c0db BV |
188 | if (stage > num_stages) |
189 | num_stages = stage; | |
a1bb33af UH |
190 | } |
191 | ||
a1bb33af UH |
192 | return SIGROK_OK; |
193 | } | |
194 | ||
a803c0db | 195 | static uint32_t reverse16(uint32_t in) |
6937bb75 BV |
196 | { |
197 | uint32_t out; | |
198 | ||
a803c0db BV |
199 | out = (in & 0xff) << 8; |
200 | out |= (in & 0xff00) >> 8; | |
201 | out |= (in & 0xff0000) << 8; | |
202 | out |= (in & 0xff000000) >> 8; | |
203 | ||
204 | return out; | |
205 | } | |
206 | ||
207 | static uint32_t reverse32(uint32_t in) | |
208 | { | |
209 | uint32_t out; | |
210 | ||
211 | out = (in & 0xff) << 24; | |
212 | out |= (in & 0xff00) << 8; | |
213 | out |= (in & 0xff0000) >> 8; | |
214 | out |= (in & 0xff000000) >> 24; | |
215 | ||
216 | return out; | |
6937bb75 BV |
217 | } |
218 | ||
a1bb33af UH |
219 | static int hw_init(char *deviceinfo) |
220 | { | |
221 | struct sigrok_device_instance *sdi; | |
222 | GSList *ports, *l; | |
223 | GPollFD *fds; | |
6937bb75 | 224 | int devcnt, final_devcnt, num_ports, fd, ret, i; |
d02a535e | 225 | char buf[8], **device_names, **serial_params; |
a1bb33af | 226 | |
43fc7885 | 227 | if (deviceinfo) |
6937bb75 | 228 | ports = g_slist_append(NULL, strdup(deviceinfo)); |
a1bb33af | 229 | else |
43fc7885 | 230 | /* No specific device given, so scan all serial ports. */ |
a1bb33af UH |
231 | ports = list_serial_ports(); |
232 | ||
233 | num_ports = g_slist_length(ports); | |
6937bb75 | 234 | fds = calloc(1, num_ports * sizeof(GPollFD)); |
43fc7885 UH |
235 | device_names = malloc(num_ports * sizeof(char *)); |
236 | serial_params = malloc(num_ports * sizeof(char *)); | |
a1bb33af | 237 | devcnt = 0; |
43fc7885 UH |
238 | for (l = ports; l; l = l->next) { |
239 | /* The discovery procedure is like this: first send the Reset | |
240 | * command (0x00) 5 times, since the device could be anywhere | |
241 | * in a 5-byte command. Then send the ID command (0x02). | |
242 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
243 | * have a match. | |
244 | * | |
245 | * Since it may take the device a while to respond at 115Kb/s, | |
246 | * we do all the sending first, then wait for all of them to | |
247 | * respond with g_poll(). | |
a1bb33af | 248 | */ |
e6ac9ac8 | 249 | g_message("ols: probing %s...", (char *)l->data); |
d02a535e | 250 | fd = serial_open(l->data, O_RDWR | O_NONBLOCK); |
43fc7885 | 251 | if (fd != -1) { |
d02a535e BV |
252 | serial_params[devcnt] = serial_backup_params(fd); |
253 | serial_set_params(fd, 115200, 8, 0, 1, 2); | |
6937bb75 | 254 | ret = SIGROK_OK; |
43fc7885 UH |
255 | for (i = 0; i < 5; i++) { |
256 | if ((ret = send_shortcommand(fd, | |
257 | CMD_RESET)) != SIGROK_OK) { | |
258 | /* Serial port is not writable. */ | |
6937bb75 BV |
259 | break; |
260 | } | |
a1bb33af | 261 | } |
43fc7885 UH |
262 | if (ret != SIGROK_OK) { |
263 | serial_restore_params(fd, | |
264 | serial_params[devcnt]); | |
d02a535e | 265 | serial_close(fd); |
6937bb75 | 266 | continue; |
d02a535e | 267 | } |
6937bb75 BV |
268 | send_shortcommand(fd, CMD_ID); |
269 | fds[devcnt].fd = fd; | |
270 | fds[devcnt].events = G_IO_IN; | |
271 | device_names[devcnt] = strdup(l->data); | |
272 | devcnt++; | |
a1bb33af | 273 | } |
6937bb75 | 274 | free(l->data); |
a1bb33af UH |
275 | } |
276 | ||
5b15b41e PS |
277 | /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */ |
278 | usleep(10000); | |
a1bb33af UH |
279 | |
280 | final_devcnt = 0; | |
281 | g_poll(fds, devcnt, 1); | |
43fc7885 UH |
282 | for (i = 0; i < devcnt; i++) { |
283 | if (fds[i].revents == G_IO_IN) { | |
2119ab03 | 284 | if (serial_read(fds[i].fd, buf, 4) == 4) { |
43fc7885 UH |
285 | if (!strncmp(buf, "1SLO", 4) |
286 | || !strncmp(buf, "1ALS", 4)) { | |
287 | if (!strncmp(buf, "1SLO", 4)) | |
288 | sdi = sigrok_device_instance_new | |
289 | (final_devcnt, ST_INACTIVE, | |
290 | "Openbench", | |
291 | "Logic Sniffer", "v1.0"); | |
a1bb33af | 292 | else |
43fc7885 UH |
293 | sdi = sigrok_device_instance_new |
294 | (final_devcnt, ST_INACTIVE, | |
e6ac9ac8 | 295 | "Openbench", "Logic Sniffer", |
43fc7885 UH |
296 | "v1.0"); |
297 | sdi->serial = serial_device_instance_new | |
298 | (device_names[i], -1); | |
299 | device_instances = | |
300 | g_slist_append(device_instances, sdi); | |
a1bb33af | 301 | final_devcnt++; |
d02a535e | 302 | serial_close(fds[i].fd); |
a1bb33af UH |
303 | fds[i].fd = 0; |
304 | } | |
305 | } | |
6937bb75 | 306 | free(device_names[i]); |
a1bb33af UH |
307 | } |
308 | ||
43fc7885 | 309 | if (fds[i].fd != 0) { |
d02a535e BV |
310 | serial_restore_params(fds[i].fd, serial_params[i]); |
311 | serial_close(fds[i].fd); | |
6937bb75 | 312 | } |
d02a535e | 313 | free(serial_params[i]); |
a1bb33af UH |
314 | } |
315 | ||
6937bb75 BV |
316 | free(fds); |
317 | free(device_names); | |
d02a535e | 318 | free(serial_params); |
a1bb33af UH |
319 | g_slist_free(ports); |
320 | ||
6937bb75 BV |
321 | cur_samplerate = samplerates.low; |
322 | ||
a1bb33af UH |
323 | return final_devcnt; |
324 | } | |
325 | ||
a1bb33af UH |
326 | static int hw_opendev(int device_index) |
327 | { | |
328 | struct sigrok_device_instance *sdi; | |
329 | ||
43fc7885 | 330 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
e31b636d | 331 | return SIGROK_ERR; |
a1bb33af | 332 | |
d02a535e | 333 | sdi->serial->fd = serial_open(sdi->serial->port, O_RDWR); |
43fc7885 | 334 | if (sdi->serial->fd == -1) |
e31b636d | 335 | return SIGROK_ERR; |
a1bb33af UH |
336 | |
337 | sdi->status = ST_ACTIVE; | |
338 | ||
339 | return SIGROK_OK; | |
340 | } | |
341 | ||
a1bb33af UH |
342 | static void hw_closedev(int device_index) |
343 | { | |
344 | struct sigrok_device_instance *sdi; | |
345 | ||
43fc7885 | 346 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
a1bb33af UH |
347 | return; |
348 | ||
43fc7885 | 349 | if (sdi->serial->fd != -1) { |
d02a535e | 350 | serial_close(sdi->serial->fd); |
a1bb33af UH |
351 | sdi->serial->fd = -1; |
352 | sdi->status = ST_INACTIVE; | |
353 | } | |
a1bb33af UH |
354 | } |
355 | ||
a1bb33af UH |
356 | static void hw_cleanup(void) |
357 | { | |
358 | GSList *l; | |
359 | struct sigrok_device_instance *sdi; | |
360 | ||
43fc7885 UH |
361 | /* Properly close all devices. */ |
362 | for (l = device_instances; l; l = l->next) { | |
a1bb33af | 363 | sdi = l->data; |
43fc7885 | 364 | if (sdi->serial->fd != -1) |
d02a535e | 365 | serial_close(sdi->serial->fd); |
a1bb33af UH |
366 | sigrok_device_instance_free(sdi); |
367 | } | |
368 | g_slist_free(device_instances); | |
369 | device_instances = NULL; | |
a1bb33af UH |
370 | } |
371 | ||
a1bb33af UH |
372 | static void *hw_get_device_info(int device_index, int device_info_id) |
373 | { | |
374 | struct sigrok_device_instance *sdi; | |
375 | void *info; | |
376 | ||
43fc7885 | 377 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
a1bb33af UH |
378 | return NULL; |
379 | ||
380 | info = NULL; | |
43fc7885 | 381 | switch (device_info_id) { |
a1bb33af UH |
382 | case DI_INSTANCE: |
383 | info = sdi; | |
384 | break; | |
385 | case DI_NUM_PROBES: | |
386 | info = GINT_TO_POINTER(NUM_PROBES); | |
387 | break; | |
388 | case DI_SAMPLERATES: | |
389 | info = &samplerates; | |
390 | break; | |
391 | case DI_TRIGGER_TYPES: | |
43fc7885 | 392 | info = (char *)TRIGGER_TYPES; |
a1bb33af | 393 | break; |
4c100f32 | 394 | case DI_CUR_SAMPLERATE: |
a1bb33af UH |
395 | info = &cur_samplerate; |
396 | break; | |
397 | } | |
398 | ||
399 | return info; | |
400 | } | |
401 | ||
a1bb33af UH |
402 | static int hw_get_status(int device_index) |
403 | { | |
404 | struct sigrok_device_instance *sdi; | |
405 | ||
43fc7885 | 406 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
a1bb33af UH |
407 | return ST_NOT_FOUND; |
408 | ||
409 | return sdi->status; | |
410 | } | |
411 | ||
a1bb33af UH |
412 | static int *hw_get_capabilities(void) |
413 | { | |
a1bb33af UH |
414 | return capabilities; |
415 | } | |
416 | ||
43fc7885 UH |
417 | static int set_configuration_samplerate(struct sigrok_device_instance *sdi, |
418 | uint64_t samplerate) | |
a1bb33af UH |
419 | { |
420 | uint32_t divider; | |
421 | ||
43fc7885 | 422 | if (samplerate < samplerates.low || samplerate > samplerates.high) |
e31b636d | 423 | return SIGROK_ERR_SAMPLERATE; |
a1bb33af | 424 | |
43fc7885 | 425 | if (samplerate > CLOCK_RATE) { |
a1bb33af | 426 | flag_reg |= FLAG_DEMUX; |
6937bb75 | 427 | divider = (CLOCK_RATE * 2 / samplerate) - 1; |
43fc7885 | 428 | } else { |
6937bb75 BV |
429 | flag_reg &= ~FLAG_DEMUX; |
430 | divider = (CLOCK_RATE / samplerate) - 1; | |
a1bb33af | 431 | } |
a1bb33af | 432 | |
e6ac9ac8 | 433 | g_message("ols: setting samplerate to %" PRIu64 " Hz (divider %u, demux %s)", |
a803c0db | 434 | samplerate, divider, flag_reg & FLAG_DEMUX ? "on" : "off"); |
43fc7885 | 435 | |
a803c0db | 436 | if (send_longcommand(sdi->serial->fd, CMD_SET_DIVIDER, reverse32(divider)) != SIGROK_OK) |
e31b636d | 437 | return SIGROK_ERR; |
a1bb33af UH |
438 | cur_samplerate = samplerate; |
439 | ||
440 | return SIGROK_OK; | |
441 | } | |
442 | ||
a1bb33af UH |
443 | static int hw_set_configuration(int device_index, int capability, void *value) |
444 | { | |
445 | struct sigrok_device_instance *sdi; | |
446 | int ret; | |
447 | uint64_t *tmp_u64; | |
448 | ||
43fc7885 | 449 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
e31b636d | 450 | return SIGROK_ERR; |
a1bb33af | 451 | |
43fc7885 | 452 | if (sdi->status != ST_ACTIVE) |
e31b636d | 453 | return SIGROK_ERR; |
a1bb33af | 454 | |
a803c0db BV |
455 | switch (capability) { |
456 | case HWCAP_SAMPLERATE: | |
a1bb33af UH |
457 | tmp_u64 = value; |
458 | ret = set_configuration_samplerate(sdi, *tmp_u64); | |
a803c0db BV |
459 | break; |
460 | case HWCAP_PROBECONFIG: | |
43fc7885 | 461 | ret = configure_probes((GSList *) value); |
a803c0db BV |
462 | break; |
463 | case HWCAP_LIMIT_SAMPLES: | |
2458ea65 BV |
464 | tmp_u64 = value; |
465 | limit_samples = *tmp_u64; | |
e6ac9ac8 | 466 | g_message("ols: sample limit %" PRIu64, limit_samples); |
a1bb33af | 467 | ret = SIGROK_OK; |
a803c0db BV |
468 | break; |
469 | case HWCAP_CAPTURE_RATIO: | |
470 | tmp_u64 = value; | |
471 | capture_ratio = *tmp_u64; | |
43fc7885 | 472 | if (capture_ratio < 0 || capture_ratio > 100) { |
a1bb33af | 473 | capture_ratio = 0; |
e31b636d | 474 | ret = SIGROK_ERR; |
43fc7885 | 475 | } else |
a1bb33af | 476 | ret = SIGROK_OK; |
a803c0db BV |
477 | break; |
478 | default: | |
e31b636d | 479 | ret = SIGROK_ERR; |
43fc7885 | 480 | } |
a1bb33af UH |
481 | |
482 | return ret; | |
483 | } | |
484 | ||
a1bb33af UH |
485 | static int receive_data(int fd, int revents, void *user_data) |
486 | { | |
afc8e4de | 487 | static unsigned int num_transfers = 0; |
a1bb33af | 488 | static int num_bytes = 0; |
43fc7885 UH |
489 | static char last_sample[4] = { 0xff, 0xff, 0xff, 0xff }; |
490 | static unsigned char sample[4] = { 0, 0, 0, 0 }; | |
491 | static unsigned char tmp_sample[4]; | |
a803c0db BV |
492 | static unsigned char *raw_sample_buf = NULL; |
493 | int count, buflen, num_channels, offset, i, j; | |
a1bb33af UH |
494 | struct datafeed_packet packet; |
495 | unsigned char byte, *buffer; | |
496 | ||
43fc7885 UH |
497 | if (num_transfers++ == 0) { |
498 | /* | |
499 | * First time round, means the device started sending data, | |
500 | * and will not stop until done. If it stops sending for | |
501 | * longer than it takes to send a byte, that means it's | |
502 | * finished. We'll double that to 30ms to be sure... | |
a1bb33af UH |
503 | */ |
504 | source_remove(fd); | |
a803c0db BV |
505 | source_add(fd, G_IO_IN, 30, receive_data, user_data); |
506 | raw_sample_buf = malloc(limit_samples * 4); | |
507 | /* fill with 1010... for debugging */ | |
508 | memset(raw_sample_buf, 0x82, limit_samples * 4); | |
a1bb33af UH |
509 | } |
510 | ||
6937bb75 | 511 | num_channels = 0; |
43fc7885 UH |
512 | for (i = 0x20; i > 0x02; i /= 2) { |
513 | if ((flag_reg & i) == 0) | |
6937bb75 | 514 | num_channels++; |
43fc7885 | 515 | } |
6937bb75 | 516 | |
43fc7885 UH |
517 | if (revents == G_IO_IN |
518 | && num_transfers / num_channels <= limit_samples) { | |
2119ab03 | 519 | if (serial_read(fd, &byte, 1) != 1) |
a1bb33af UH |
520 | return FALSE; |
521 | ||
522 | sample[num_bytes++] = byte; | |
e6ac9ac8 | 523 | g_debug("ols: received byte 0x%.2x", byte); |
43fc7885 | 524 | if (num_bytes == num_channels) { |
e6ac9ac8 | 525 | g_debug("ols: received sample 0x%.*x", num_bytes * 2, (int) *sample); |
43fc7885 UH |
526 | /* Got a full sample. */ |
527 | if (flag_reg & FLAG_RLE) { | |
528 | /* | |
529 | * In RLE mode -1 should never come in as a | |
530 | * sample, because bit 31 is the "count" flag. | |
531 | * TODO: Endianness may be wrong here, could be | |
532 | * sample[3]. | |
533 | */ | |
534 | if (sample[0] & 0x80 | |
535 | && !(last_sample[0] & 0x80)) { | |
536 | count = (int)(*sample) & 0x7fffffff; | |
a1bb33af UH |
537 | buffer = g_malloc(count); |
538 | buflen = 0; | |
43fc7885 | 539 | for (i = 0; i < count; i++) { |
a803c0db | 540 | memcpy(buffer + buflen, last_sample, 4); |
a1bb33af UH |
541 | buflen += 4; |
542 | } | |
43fc7885 UH |
543 | } else { |
544 | /* | |
545 | * Just a single sample, next sample | |
546 | * will probably be a count referring | |
547 | * to this -- but this one is still a | |
548 | * part of the stream. | |
a1bb33af UH |
549 | */ |
550 | buffer = sample; | |
551 | buflen = 4; | |
552 | } | |
43fc7885 UH |
553 | } else { |
554 | /* No compression. */ | |
a1bb33af UH |
555 | buffer = sample; |
556 | buflen = 4; | |
557 | } | |
558 | ||
43fc7885 UH |
559 | if (num_channels < 4) { |
560 | /* | |
561 | * Some channel groups may have been turned | |
562 | * off, to speed up transfer between the | |
563 | * hardware and the PC. Expand that here before | |
564 | * submitting it over the session bus -- | |
565 | * whatever is listening on the bus will be | |
566 | * expecting a full 32-bit sample, based on | |
567 | * the number of probes. | |
6937bb75 BV |
568 | */ |
569 | j = 0; | |
570 | memset(tmp_sample, 0, 4); | |
43fc7885 | 571 | for (i = 0; i < 4; i++) { |
a803c0db | 572 | if (((flag_reg >> 2) & (1 << i)) == 0) { |
43fc7885 UH |
573 | /* |
574 | * This channel group was | |
575 | * enabled, copy from received | |
576 | * sample. | |
577 | */ | |
6937bb75 BV |
578 | tmp_sample[i] = sample[j++]; |
579 | } | |
580 | } | |
581 | memcpy(sample, tmp_sample, 4); | |
e6ac9ac8 | 582 | g_debug("ols: full sample 0x%.8x", (int) *sample); |
6937bb75 BV |
583 | } |
584 | ||
a803c0db BV |
585 | /* the OLS sends its sample buffer backwards. |
586 | * store it in reverse order here, so we can dump | |
587 | * this on the session bus later. | |
588 | */ | |
f0d1b53e | 589 | offset = (limit_samples - num_transfers / num_channels) * 4; |
a803c0db BV |
590 | memcpy(raw_sample_buf + offset, sample, 4); |
591 | ||
43fc7885 | 592 | if (buffer == sample) |
6937bb75 | 593 | memcpy(last_sample, buffer, num_channels); |
a1bb33af UH |
594 | else |
595 | g_free(buffer); | |
596 | ||
6937bb75 | 597 | memset(sample, 0, 4); |
a1bb33af UH |
598 | num_bytes = 0; |
599 | } | |
43fc7885 UH |
600 | } else { |
601 | /* | |
602 | * This is the main loop telling us a timeout was reached, or | |
603 | * we've acquired all the samples we asked for -- we're done. | |
a803c0db | 604 | * Send the (properly-ordered) buffer to the frontend. |
43fc7885 | 605 | */ |
a803c0db BV |
606 | if (trigger_at != -1) { |
607 | /* a trigger was set up, so we need to tell the frontend | |
608 | * about it. | |
609 | */ | |
610 | if (trigger_at > 0) { | |
611 | /* there are pre-trigger samples, send those first */ | |
4c046c6b | 612 | packet.type = DF_LOGIC; |
a803c0db | 613 | packet.length = trigger_at * 4; |
4c046c6b | 614 | packet.unitsize = 4; |
a803c0db BV |
615 | packet.payload = raw_sample_buf; |
616 | session_bus(user_data, &packet); | |
617 | } | |
618 | ||
619 | packet.type = DF_TRIGGER; | |
620 | packet.length = 0; | |
621 | session_bus(user_data, &packet); | |
622 | ||
4c046c6b | 623 | packet.type = DF_LOGIC; |
a803c0db | 624 | packet.length = (limit_samples * 4) - (trigger_at * 4); |
4c046c6b | 625 | packet.unitsize = 4; |
a803c0db BV |
626 | packet.payload = raw_sample_buf + trigger_at * 4; |
627 | session_bus(user_data, &packet); | |
628 | } else { | |
4c046c6b | 629 | packet.type = DF_LOGIC; |
a803c0db | 630 | packet.length = limit_samples * 4; |
4c046c6b | 631 | packet.unitsize = 4; |
a803c0db BV |
632 | packet.payload = raw_sample_buf; |
633 | session_bus(user_data, &packet); | |
634 | } | |
635 | free(raw_sample_buf); | |
636 | ||
06d64eb8 | 637 | serial_flush(fd); |
d02a535e | 638 | serial_close(fd); |
a1bb33af UH |
639 | packet.type = DF_END; |
640 | packet.length = 0; | |
641 | session_bus(user_data, &packet); | |
642 | } | |
643 | ||
644 | return TRUE; | |
645 | } | |
646 | ||
a1bb33af UH |
647 | static int hw_start_acquisition(int device_index, gpointer session_device_id) |
648 | { | |
43fc7885 | 649 | int i; |
a1bb33af UH |
650 | struct datafeed_packet *packet; |
651 | struct datafeed_header *header; | |
652 | struct sigrok_device_instance *sdi; | |
a803c0db | 653 | uint32_t trigger_config[4]; |
a1bb33af | 654 | uint32_t data; |
6937bb75 BV |
655 | uint16_t readcount, delaycount; |
656 | uint8_t changrp_mask; | |
a1bb33af | 657 | |
43fc7885 | 658 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) |
e31b636d | 659 | return SIGROK_ERR; |
a1bb33af | 660 | |
43fc7885 | 661 | if (sdi->status != ST_ACTIVE) |
e31b636d | 662 | return SIGROK_ERR; |
a1bb33af | 663 | |
a803c0db BV |
664 | readcount = limit_samples / 4; |
665 | ||
666 | memset(trigger_config, 0, 16); | |
667 | trigger_config[num_stages-1] |= 0x08; | |
43fc7885 | 668 | if (trigger_mask[0]) { |
a803c0db BV |
669 | delaycount = readcount * (1 - capture_ratio / 100.0); |
670 | trigger_at = (readcount - delaycount) * 4 - num_stages; | |
a803c0db | 671 | |
43fc7885 | 672 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_0, |
a803c0db | 673 | reverse32(trigger_mask[0])) != SIGROK_OK) |
54dc4bc7 | 674 | return SIGROK_ERR; |
a803c0db BV |
675 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_0, |
676 | reverse32(trigger_value[0])) != SIGROK_OK) | |
54dc4bc7 | 677 | return SIGROK_ERR; |
a803c0db BV |
678 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_0, |
679 | trigger_config[0]) != SIGROK_OK) | |
54dc4bc7 | 680 | return SIGROK_ERR; |
6937bb75 | 681 | |
a803c0db BV |
682 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_1, |
683 | reverse32(trigger_mask[1])) != SIGROK_OK) | |
54dc4bc7 | 684 | return SIGROK_ERR; |
43fc7885 | 685 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_1, |
a803c0db | 686 | reverse32(trigger_value[1])) != SIGROK_OK) |
54dc4bc7 | 687 | return SIGROK_ERR; |
a803c0db BV |
688 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_1, |
689 | trigger_config[1]) != SIGROK_OK) | |
54dc4bc7 | 690 | return SIGROK_ERR; |
6937bb75 | 691 | |
a803c0db BV |
692 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_2, |
693 | reverse32(trigger_mask[2])) != SIGROK_OK) | |
54dc4bc7 | 694 | return SIGROK_ERR; |
a803c0db BV |
695 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_2, |
696 | reverse32(trigger_value[2])) != SIGROK_OK) | |
54dc4bc7 | 697 | return SIGROK_ERR; |
43fc7885 | 698 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_2, |
a803c0db BV |
699 | trigger_config[2]) != SIGROK_OK) |
700 | return SIGROK_ERR; | |
701 | ||
702 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_3, | |
703 | reverse32(trigger_mask[3])) != SIGROK_OK) | |
704 | return SIGROK_ERR; | |
705 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_3, | |
706 | reverse32(trigger_value[3])) != SIGROK_OK) | |
54dc4bc7 | 707 | return SIGROK_ERR; |
43fc7885 | 708 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_3, |
a803c0db | 709 | trigger_config[3]) != SIGROK_OK) |
54dc4bc7 | 710 | return SIGROK_ERR; |
6937bb75 | 711 | } else { |
43fc7885 UH |
712 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_MASK_0, |
713 | trigger_mask[0]) != SIGROK_OK) | |
54dc4bc7 | 714 | return SIGROK_ERR; |
43fc7885 UH |
715 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_VALUE_0, |
716 | trigger_value[0]) != SIGROK_OK) | |
54dc4bc7 | 717 | return SIGROK_ERR; |
43fc7885 UH |
718 | if (send_longcommand(sdi->serial->fd, CMD_SET_TRIGGER_CONFIG_0, |
719 | 0x00000008) != SIGROK_OK) | |
54dc4bc7 | 720 | return SIGROK_ERR; |
a803c0db | 721 | delaycount = readcount; |
6937bb75 | 722 | } |
a1bb33af | 723 | |
6937bb75 | 724 | set_configuration_samplerate(sdi, cur_samplerate); |
a1bb33af | 725 | |
43fc7885 | 726 | /* Send sample limit and pre/post-trigger capture ratio. */ |
a803c0db BV |
727 | data = ((readcount - 1) & 0xffff) << 16; |
728 | data |= (delaycount - 1) & 0xffff; | |
729 | if (send_longcommand(sdi->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SIGROK_OK) | |
e31b636d | 730 | return SIGROK_ERR; |
a1bb33af | 731 | |
43fc7885 UH |
732 | /* |
733 | * Enable/disable channel groups in the flag register according to the | |
a803c0db | 734 | * probe mask. |
6937bb75 BV |
735 | */ |
736 | changrp_mask = 0; | |
43fc7885 UH |
737 | for (i = 0; i < 4; i++) { |
738 | if (probe_mask & (0xff << (i * 8))) | |
a803c0db | 739 | changrp_mask |= (1 << i); |
6937bb75 | 740 | } |
43fc7885 UH |
741 | |
742 | /* The flag register wants them here, and 1 means "disable channel". */ | |
6937bb75 | 743 | flag_reg |= ~(changrp_mask << 2) & 0x3c; |
a803c0db | 744 | flag_reg |= FLAG_FILTER; |
6937bb75 | 745 | data = flag_reg << 24; |
43fc7885 | 746 | if (send_longcommand(sdi->serial->fd, CMD_SET_FLAGS, data) != SIGROK_OK) |
54dc4bc7 | 747 | return SIGROK_ERR; |
a1bb33af | 748 | |
43fc7885 UH |
749 | /* Start acquisition on the device. */ |
750 | if (send_shortcommand(sdi->serial->fd, CMD_RUN) != SIGROK_OK) | |
e31b636d | 751 | return SIGROK_ERR; |
a1bb33af | 752 | |
43fc7885 UH |
753 | source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, |
754 | session_device_id); | |
a1bb33af | 755 | |
43fc7885 | 756 | /* Send header packet to the session bus. */ |
a1bb33af UH |
757 | packet = g_malloc(sizeof(struct datafeed_packet)); |
758 | header = g_malloc(sizeof(struct datafeed_header)); | |
43fc7885 | 759 | if (!packet || !header) |
e31b636d | 760 | return SIGROK_ERR; |
a1bb33af UH |
761 | packet->type = DF_HEADER; |
762 | packet->length = sizeof(struct datafeed_header); | |
43fc7885 | 763 | packet->payload = (unsigned char *)header; |
a1bb33af UH |
764 | header->feed_version = 1; |
765 | gettimeofday(&header->starttime, NULL); | |
4c100f32 | 766 | header->samplerate = cur_samplerate; |
a1bb33af | 767 | header->protocol_id = PROTO_RAW; |
c2616fb9 DR |
768 | header->num_logic_probes = NUM_PROBES; |
769 | header->num_analog_probes = 0; | |
a1bb33af UH |
770 | session_bus(session_device_id, packet); |
771 | g_free(header); | |
772 | g_free(packet); | |
773 | ||
774 | return SIGROK_OK; | |
775 | } | |
776 | ||
a1bb33af UH |
777 | static void hw_stop_acquisition(int device_index, gpointer session_device_id) |
778 | { | |
779 | struct datafeed_packet packet; | |
780 | ||
17e1afcb | 781 | /* Avoid compiler warnings. */ |
afc8e4de UH |
782 | device_index = device_index; |
783 | ||
a1bb33af UH |
784 | packet.type = DF_END; |
785 | packet.length = 0; | |
786 | session_bus(session_device_id, &packet); | |
a1bb33af UH |
787 | } |
788 | ||
a1bb33af | 789 | struct device_plugin ols_plugin_info = { |
e6ac9ac8 | 790 | "ols", |
a1bb33af UH |
791 | 1, |
792 | hw_init, | |
793 | hw_cleanup, | |
a1bb33af UH |
794 | hw_opendev, |
795 | hw_closedev, | |
796 | hw_get_device_info, | |
797 | hw_get_status, | |
798 | hw_get_capabilities, | |
799 | hw_set_configuration, | |
800 | hw_start_acquisition, | |
43fc7885 | 801 | hw_stop_acquisition, |
a1bb33af | 802 | }; |