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3b533202 BV |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <stdio.h> | |
21 | #include <stdint.h> | |
22 | #include <stdlib.h> | |
23 | #include <sys/types.h> | |
24 | #include <sys/stat.h> | |
25 | #include <fcntl.h> | |
26 | #include <unistd.h> | |
27 | #include <string.h> | |
28 | #include <sys/time.h> | |
29 | #include <inttypes.h> | |
3b533202 BV |
30 | #include <glib.h> |
31 | #include <libusb.h> | |
45c59c8b BV |
32 | #include "libsigrok.h" |
33 | #include "libsigrok-internal.h" | |
3b533202 BV |
34 | #include "dso.h" |
35 | ||
fc8fe3e3 BV |
36 | /* Max time in ms before we want to check on USB events */ |
37 | /* TODO tune this properly */ | |
e98b7f1b | 38 | #define TICK 1 |
3b533202 | 39 | |
62bb8840 | 40 | static const int hwcaps[] = { |
3b533202 | 41 | SR_HWCAP_OSCILLOSCOPE, |
ae88b97b | 42 | SR_HWCAP_LIMIT_SAMPLES, |
3b533202 | 43 | SR_HWCAP_CONTINUOUS, |
a370ef19 BV |
44 | SR_HWCAP_TIMEBASE, |
45 | SR_HWCAP_BUFFERSIZE, | |
46 | SR_HWCAP_TRIGGER_SOURCE, | |
47 | SR_HWCAP_TRIGGER_SLOPE, | |
48 | SR_HWCAP_HORIZ_TRIGGERPOS, | |
ebb781a6 | 49 | SR_HWCAP_FILTER, |
313deed2 | 50 | SR_HWCAP_VDIV, |
4a090d72 | 51 | SR_HWCAP_COUPLING, |
3b533202 BV |
52 | 0, |
53 | }; | |
54 | ||
55 | static const char *probe_names[] = { | |
78693401 | 56 | "CH1", "CH2", |
3b533202 BV |
57 | NULL, |
58 | }; | |
59 | ||
62bb8840 | 60 | static const struct dso_profile dev_profiles[] = { |
88a13f30 | 61 | { 0x04b4, 0x2090, 0x04b5, 0x2090, |
3b533202 | 62 | "Hantek", "DSO-2090", |
88a13f30 BV |
63 | FIRMWARE_DIR "/hantek-dso-2xxx.fw" }, |
64 | { 0x04b4, 0x2150, 0x04b5, 0x2150, | |
65 | "Hantek", "DSO-2150", | |
66 | FIRMWARE_DIR "/hantek-dso-2xxx.fw" }, | |
67 | { 0x04b4, 0x2250, 0x04b5, 0x2250, | |
68 | "Hantek", "DSO-2250", | |
69 | FIRMWARE_DIR "/hantek-dso-2xxx.fw" }, | |
70 | { 0x04b4, 0x5200, 0x04b5, 0x5200, | |
71 | "Hantek", "DSO-5200", | |
72 | FIRMWARE_DIR "/hantek-dso-5xxx.fw" }, | |
73 | { 0x04b4, 0x520a, 0x04b5, 0x520a, | |
74 | "Hantek", "DSO-5200A", | |
75 | FIRMWARE_DIR "/hantek-dso-5xxx.fw" }, | |
76 | { 0, 0, 0, 0, 0, 0, 0 }, | |
3b533202 BV |
77 | }; |
78 | ||
62bb8840 | 79 | static const uint64_t buffersizes[] = { |
a370ef19 BV |
80 | 10240, |
81 | 32768, | |
82 | /* TODO: 65535 */ | |
62bb8840 | 83 | 0, |
a370ef19 BV |
84 | }; |
85 | ||
62bb8840 | 86 | static const struct sr_rational timebases[] = { |
a370ef19 BV |
87 | /* microseconds */ |
88 | { 10, 1000000 }, | |
89 | { 20, 1000000 }, | |
90 | { 40, 1000000 }, | |
91 | { 100, 1000000 }, | |
92 | { 200, 1000000 }, | |
93 | { 400, 1000000 }, | |
94 | /* milliseconds */ | |
95 | { 1, 1000 }, | |
96 | { 2, 1000 }, | |
97 | { 4, 1000 }, | |
98 | { 10, 1000 }, | |
99 | { 20, 1000 }, | |
100 | { 40, 1000 }, | |
101 | { 100, 1000 }, | |
102 | { 200, 1000 }, | |
103 | { 400, 1000 }, | |
62bb8840 | 104 | { 0, 0}, |
a370ef19 BV |
105 | }; |
106 | ||
62bb8840 | 107 | static const struct sr_rational vdivs[] = { |
313deed2 BV |
108 | /* millivolts */ |
109 | { 10, 1000 }, | |
110 | { 20, 1000 }, | |
111 | { 50, 1000 }, | |
112 | { 100, 1000 }, | |
113 | { 200, 1000 }, | |
114 | { 500, 1000 }, | |
115 | /* volts */ | |
116 | { 1, 1 }, | |
117 | { 2, 1 }, | |
118 | { 5, 1 }, | |
62bb8840 | 119 | { 0, 0 }, |
313deed2 BV |
120 | }; |
121 | ||
62bb8840 | 122 | static const char *trigger_sources[] = { |
a370ef19 BV |
123 | "CH1", |
124 | "CH2", | |
125 | "EXT", | |
88a13f30 | 126 | /* TODO: forced */ |
62bb8840 | 127 | NULL, |
a370ef19 | 128 | }; |
3b533202 | 129 | |
62bb8840 | 130 | static const char *filter_targets[] = { |
ebb781a6 BV |
131 | "CH1", |
132 | "CH2", | |
133 | /* TODO: "TRIGGER", */ | |
62bb8840 | 134 | NULL, |
ebb781a6 BV |
135 | }; |
136 | ||
62bb8840 | 137 | static const char *coupling[] = { |
b58fbd99 BV |
138 | "AC", |
139 | "DC", | |
140 | "GND", | |
62bb8840 | 141 | NULL, |
b58fbd99 BV |
142 | }; |
143 | ||
982947f7 | 144 | SR_PRIV struct sr_dev_driver hantek_dso_driver_info; |
a873c594 | 145 | static struct sr_dev_driver *di = &hantek_dso_driver_info; |
e98b7f1b | 146 | |
69b07d14 | 147 | static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data); |
3b533202 | 148 | |
62bb8840 | 149 | static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof) |
3b533202 BV |
150 | { |
151 | struct sr_dev_inst *sdi; | |
87ca93c5 | 152 | struct sr_probe *probe; |
269971dd BV |
153 | struct drv_context *drvc; |
154 | struct dev_context *devc; | |
87ca93c5 | 155 | int i; |
3b533202 BV |
156 | |
157 | sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING, | |
88a13f30 | 158 | prof->vendor, prof->model, NULL); |
3b533202 BV |
159 | if (!sdi) |
160 | return NULL; | |
a873c594 | 161 | sdi->driver = di; |
3b533202 | 162 | |
e98b7f1b UH |
163 | /* |
164 | * Add only the real probes -- EXT isn't a source of data, only | |
87ca93c5 BV |
165 | * a trigger source internal to the device. |
166 | */ | |
167 | for (i = 0; probe_names[i]; i++) { | |
168 | if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, | |
169 | probe_names[i]))) | |
170 | return NULL; | |
171 | sdi->probes = g_slist_append(sdi->probes, probe); | |
172 | } | |
173 | ||
269971dd | 174 | if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) { |
e98b7f1b | 175 | sr_err("Device context malloc failed."); |
3b533202 BV |
176 | return NULL; |
177 | } | |
e98b7f1b | 178 | |
269971dd BV |
179 | devc->profile = prof; |
180 | devc->dev_state = IDLE; | |
181 | devc->timebase = DEFAULT_TIMEBASE; | |
182 | devc->ch1_enabled = TRUE; | |
183 | devc->ch2_enabled = TRUE; | |
184 | devc->voltage_ch1 = DEFAULT_VOLTAGE; | |
185 | devc->voltage_ch2 = DEFAULT_VOLTAGE; | |
186 | devc->coupling_ch1 = DEFAULT_COUPLING; | |
187 | devc->coupling_ch2 = DEFAULT_COUPLING; | |
188 | devc->voffset_ch1 = DEFAULT_VERT_OFFSET; | |
189 | devc->voffset_ch2 = DEFAULT_VERT_OFFSET; | |
190 | devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS; | |
191 | devc->framesize = DEFAULT_FRAMESIZE; | |
192 | devc->triggerslope = SLOPE_POSITIVE; | |
193 | devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE); | |
194 | devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS; | |
195 | sdi->priv = devc; | |
a873c594 | 196 | drvc = di->priv; |
269971dd | 197 | drvc->instances = g_slist_append(drvc->instances, sdi); |
3b533202 BV |
198 | |
199 | return sdi; | |
200 | } | |
201 | ||
014359e3 | 202 | static int configure_probes(const struct sr_dev_inst *sdi) |
3b533202 | 203 | { |
014359e3 | 204 | struct dev_context *devc; |
62bb8840 UH |
205 | const struct sr_probe *probe; |
206 | const GSList *l; | |
3b533202 | 207 | |
014359e3 BV |
208 | devc = sdi->priv; |
209 | ||
269971dd | 210 | devc->ch1_enabled = devc->ch2_enabled = FALSE; |
014359e3 | 211 | for (l = sdi->probes; l; l = l->next) { |
3b533202 | 212 | probe = (struct sr_probe *)l->data; |
b35c8293 | 213 | if (probe->index == 0) |
269971dd | 214 | devc->ch1_enabled = probe->enabled; |
b35c8293 | 215 | else if (probe->index == 1) |
269971dd | 216 | devc->ch2_enabled = probe->enabled; |
3b533202 BV |
217 | } |
218 | ||
219 | return SR_OK; | |
220 | } | |
221 | ||
39cfdd75 | 222 | /* Properly close and free all devices. */ |
811deee4 | 223 | static int clear_instances(void) |
39cfdd75 BV |
224 | { |
225 | struct sr_dev_inst *sdi; | |
269971dd BV |
226 | struct drv_context *drvc; |
227 | struct dev_context *devc; | |
39cfdd75 BV |
228 | GSList *l; |
229 | ||
a873c594 | 230 | drvc = di->priv; |
269971dd | 231 | for (l = drvc->instances; l; l = l->next) { |
39cfdd75 BV |
232 | if (!(sdi = l->data)) { |
233 | /* Log error, but continue cleaning up the rest. */ | |
e98b7f1b | 234 | sr_err("%s: sdi was NULL, continuing", __func__); |
39cfdd75 BV |
235 | continue; |
236 | } | |
269971dd | 237 | if (!(devc = sdi->priv)) { |
39cfdd75 | 238 | /* Log error, but continue cleaning up the rest. */ |
e98b7f1b | 239 | sr_err("%s: sdi->priv was NULL, continuing", __func__); |
39cfdd75 BV |
240 | continue; |
241 | } | |
242 | dso_close(sdi); | |
269971dd BV |
243 | sr_usb_dev_inst_free(devc->usb); |
244 | g_free(devc->triggersource); | |
39cfdd75 BV |
245 | |
246 | sr_dev_inst_free(sdi); | |
247 | } | |
248 | ||
269971dd BV |
249 | g_slist_free(drvc->instances); |
250 | drvc->instances = NULL; | |
39cfdd75 | 251 | |
811deee4 | 252 | return SR_OK; |
39cfdd75 BV |
253 | } |
254 | ||
34f06b90 | 255 | static int hw_init(struct sr_context *sr_ctx) |
61136ea6 | 256 | { |
269971dd BV |
257 | struct drv_context *drvc; |
258 | ||
259 | if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) { | |
e98b7f1b | 260 | sr_err("Driver context malloc failed."); |
886a52b6 | 261 | return SR_ERR_MALLOC; |
269971dd | 262 | } |
61136ea6 | 263 | |
1ebe4b4e | 264 | drvc->sr_ctx = sr_ctx; |
a873c594 | 265 | di->priv = drvc; |
269971dd | 266 | |
61136ea6 BV |
267 | return SR_OK; |
268 | } | |
269 | ||
39cfdd75 | 270 | static GSList *hw_scan(GSList *options) |
3b533202 BV |
271 | { |
272 | struct sr_dev_inst *sdi; | |
62bb8840 | 273 | const struct dso_profile *prof; |
269971dd BV |
274 | struct drv_context *drvc; |
275 | struct dev_context *devc; | |
39cfdd75 BV |
276 | GSList *devices; |
277 | struct libusb_device_descriptor des; | |
3b533202 | 278 | libusb_device **devlist; |
61136ea6 | 279 | int devcnt, ret, i, j; |
3b533202 | 280 | |
39cfdd75 | 281 | (void)options; |
e98b7f1b | 282 | |
3b533202 | 283 | devcnt = 0; |
39cfdd75 | 284 | devices = 0; |
a873c594 | 285 | drvc = di->priv; |
269971dd | 286 | drvc->instances = NULL; |
39cfdd75 BV |
287 | |
288 | clear_instances(); | |
289 | ||
290 | /* Find all Hantek DSO devices and upload firmware to all of them. */ | |
d4abb463 | 291 | libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist); |
3b533202 | 292 | for (i = 0; devlist[i]; i++) { |
61136ea6 | 293 | if ((ret = libusb_get_device_descriptor(devlist[i], &des))) { |
d4928d71 PS |
294 | sr_err("Failed to get device descriptor: %s.", |
295 | libusb_error_name(ret)); | |
3b533202 BV |
296 | continue; |
297 | } | |
298 | ||
299 | prof = NULL; | |
300 | for (j = 0; dev_profiles[j].orig_vid; j++) { | |
301 | if (des.idVendor == dev_profiles[j].orig_vid | |
302 | && des.idProduct == dev_profiles[j].orig_pid) { | |
303 | /* Device matches the pre-firmware profile. */ | |
304 | prof = &dev_profiles[j]; | |
e98b7f1b | 305 | sr_dbg("Found a %s %s.", prof->vendor, prof->model); |
3b533202 | 306 | sdi = dso_dev_new(devcnt, prof); |
39cfdd75 | 307 | devices = g_slist_append(devices, sdi); |
269971dd | 308 | devc = sdi->priv; |
3b533202 BV |
309 | if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION, |
310 | prof->firmware) == SR_OK) | |
311 | /* Remember when the firmware on this device was updated */ | |
269971dd | 312 | devc->fw_updated = g_get_monotonic_time(); |
3b533202 | 313 | else |
e98b7f1b UH |
314 | sr_err("Firmware upload failed for " |
315 | "device %d.", devcnt); | |
3b533202 | 316 | /* Dummy USB address of 0xff will get overwritten later. */ |
269971dd | 317 | devc->usb = sr_usb_dev_inst_new( |
3b533202 BV |
318 | libusb_get_bus_number(devlist[i]), 0xff, NULL); |
319 | devcnt++; | |
320 | break; | |
321 | } else if (des.idVendor == dev_profiles[j].fw_vid | |
322 | && des.idProduct == dev_profiles[j].fw_pid) { | |
323 | /* Device matches the post-firmware profile. */ | |
324 | prof = &dev_profiles[j]; | |
e98b7f1b | 325 | sr_dbg("Found a %s %s.", prof->vendor, prof->model); |
3b533202 BV |
326 | sdi = dso_dev_new(devcnt, prof); |
327 | sdi->status = SR_ST_INACTIVE; | |
39cfdd75 | 328 | devices = g_slist_append(devices, sdi); |
269971dd BV |
329 | devc = sdi->priv; |
330 | devc->usb = sr_usb_dev_inst_new( | |
3b533202 BV |
331 | libusb_get_bus_number(devlist[i]), |
332 | libusb_get_device_address(devlist[i]), NULL); | |
333 | devcnt++; | |
334 | break; | |
335 | } | |
336 | } | |
337 | if (!prof) | |
338 | /* not a supported VID/PID */ | |
339 | continue; | |
340 | } | |
341 | libusb_free_device_list(devlist, 1); | |
342 | ||
39cfdd75 | 343 | return devices; |
3b533202 BV |
344 | } |
345 | ||
811deee4 BV |
346 | static GSList *hw_dev_list(void) |
347 | { | |
348 | struct drv_context *drvc; | |
349 | ||
a873c594 | 350 | drvc = di->priv; |
811deee4 BV |
351 | |
352 | return drvc->instances; | |
353 | } | |
354 | ||
25a0f108 | 355 | static int hw_dev_open(struct sr_dev_inst *sdi) |
3b533202 | 356 | { |
269971dd | 357 | struct dev_context *devc; |
fc8fe3e3 BV |
358 | int64_t timediff_us, timediff_ms; |
359 | int err; | |
3b533202 | 360 | |
269971dd | 361 | devc = sdi->priv; |
3b533202 BV |
362 | |
363 | /* | |
e98b7f1b UH |
364 | * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS |
365 | * for the FX2 to renumerate. | |
3b533202 | 366 | */ |
fc8fe3e3 | 367 | err = SR_ERR; |
269971dd | 368 | if (devc->fw_updated > 0) { |
e98b7f1b UH |
369 | sr_info("Waiting for device to reset."); |
370 | /* Takes >= 300ms for the FX2 to be gone from the USB bus. */ | |
3b533202 | 371 | g_usleep(300 * 1000); |
fc8fe3e3 BV |
372 | timediff_ms = 0; |
373 | while (timediff_ms < MAX_RENUM_DELAY_MS) { | |
25a0f108 | 374 | if ((err = dso_open(sdi)) == SR_OK) |
3b533202 BV |
375 | break; |
376 | g_usleep(100 * 1000); | |
269971dd | 377 | timediff_us = g_get_monotonic_time() - devc->fw_updated; |
fc8fe3e3 | 378 | timediff_ms = timediff_us / 1000; |
e98b7f1b | 379 | sr_spew("Waited %" PRIi64 " ms.", timediff_ms); |
3b533202 | 380 | } |
e98b7f1b | 381 | sr_info("Device came back after %d ms.", timediff_ms); |
3b533202 | 382 | } else { |
25a0f108 | 383 | err = dso_open(sdi); |
3b533202 BV |
384 | } |
385 | ||
386 | if (err != SR_OK) { | |
e98b7f1b | 387 | sr_err("Unable to open device."); |
3b533202 BV |
388 | return SR_ERR; |
389 | } | |
390 | ||
269971dd | 391 | err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE); |
3b533202 | 392 | if (err != 0) { |
d4928d71 PS |
393 | sr_err("Unable to claim interface: %s.", |
394 | libusb_error_name(err)); | |
3b533202 BV |
395 | return SR_ERR; |
396 | } | |
397 | ||
398 | return SR_OK; | |
399 | } | |
400 | ||
25a0f108 | 401 | static int hw_dev_close(struct sr_dev_inst *sdi) |
3b533202 | 402 | { |
3b533202 BV |
403 | dso_close(sdi); |
404 | ||
405 | return SR_OK; | |
406 | } | |
407 | ||
408 | static int hw_cleanup(void) | |
409 | { | |
269971dd BV |
410 | struct drv_context *drvc; |
411 | ||
a873c594 | 412 | if (!(drvc = di->priv)) |
269971dd | 413 | return SR_OK; |
3b533202 | 414 | |
39cfdd75 | 415 | clear_instances(); |
3b533202 | 416 | |
3b533202 BV |
417 | return SR_OK; |
418 | } | |
419 | ||
0b79bcbb | 420 | static int hw_info_get(int info_id, const void **data, |
e98b7f1b | 421 | const struct sr_dev_inst *sdi) |
3b533202 | 422 | { |
3b533202 BV |
423 | uint64_t tmp; |
424 | ||
6f57fd96 BV |
425 | (void)sdi; |
426 | ||
0b79bcbb | 427 | switch (info_id) { |
2ce9f046 BV |
428 | case SR_DI_HWCAPS: |
429 | *data = hwcaps; | |
430 | break; | |
a370ef19 | 431 | case SR_DI_BUFFERSIZES: |
0b79bcbb | 432 | *data = buffersizes; |
a370ef19 BV |
433 | break; |
434 | case SR_DI_TIMEBASES: | |
0b79bcbb | 435 | *data = timebases; |
a370ef19 BV |
436 | break; |
437 | case SR_DI_TRIGGER_SOURCES: | |
0b79bcbb | 438 | *data = trigger_sources; |
a370ef19 | 439 | break; |
ebb781a6 | 440 | case SR_DI_FILTERS: |
0b79bcbb | 441 | *data = filter_targets; |
ebb781a6 | 442 | break; |
313deed2 | 443 | case SR_DI_VDIVS: |
0b79bcbb | 444 | *data = vdivs; |
313deed2 | 445 | break; |
4a090d72 | 446 | case SR_DI_COUPLING: |
0b79bcbb | 447 | *data = coupling; |
4a090d72 | 448 | break; |
3b533202 BV |
449 | /* TODO remove this */ |
450 | case SR_DI_CUR_SAMPLERATE: | |
0b79bcbb | 451 | *data = &tmp; |
3b533202 | 452 | break; |
b0c8d7ac BV |
453 | default: |
454 | return SR_ERR_ARG; | |
3b533202 BV |
455 | } |
456 | ||
0b79bcbb | 457 | return SR_OK; |
3b533202 BV |
458 | } |
459 | ||
6f4b1868 | 460 | static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap, |
e98b7f1b | 461 | const void *value) |
3b533202 | 462 | { |
269971dd | 463 | struct dev_context *devc; |
a370ef19 BV |
464 | struct sr_rational tmp_rat; |
465 | float tmp_float; | |
466 | uint64_t tmp_u64; | |
467 | int ret, i; | |
4a090d72 | 468 | char **targets; |
3b533202 | 469 | |
3b533202 BV |
470 | if (sdi->status != SR_ST_ACTIVE) |
471 | return SR_ERR; | |
472 | ||
a370ef19 | 473 | ret = SR_OK; |
269971dd | 474 | devc = sdi->priv; |
3b533202 | 475 | switch (hwcap) { |
ae88b97b | 476 | case SR_HWCAP_LIMIT_FRAMES: |
269971dd | 477 | devc->limit_frames = *(const uint64_t *)value; |
ae88b97b | 478 | break; |
a370ef19 | 479 | case SR_HWCAP_TRIGGER_SLOPE: |
62bb8840 | 480 | tmp_u64 = *(const int *)value; |
a370ef19 BV |
481 | if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE) |
482 | ret = SR_ERR_ARG; | |
269971dd | 483 | devc->triggerslope = tmp_u64; |
a370ef19 BV |
484 | break; |
485 | case SR_HWCAP_HORIZ_TRIGGERPOS: | |
62bb8840 | 486 | tmp_float = *(const float *)value; |
a370ef19 | 487 | if (tmp_float < 0.0 || tmp_float > 1.0) { |
e98b7f1b | 488 | sr_err("Trigger position should be between 0.0 and 1.0."); |
3b533202 | 489 | ret = SR_ERR_ARG; |
a370ef19 | 490 | } else |
269971dd | 491 | devc->triggerposition = tmp_float; |
a370ef19 BV |
492 | break; |
493 | case SR_HWCAP_BUFFERSIZE: | |
62bb8840 | 494 | tmp_u64 = *(const int *)value; |
a370ef19 BV |
495 | for (i = 0; buffersizes[i]; i++) { |
496 | if (buffersizes[i] == tmp_u64) { | |
269971dd | 497 | devc->framesize = tmp_u64; |
a370ef19 BV |
498 | break; |
499 | } | |
500 | } | |
501 | if (buffersizes[i] == 0) | |
502 | ret = SR_ERR_ARG; | |
503 | break; | |
504 | case SR_HWCAP_TIMEBASE: | |
62bb8840 | 505 | tmp_rat = *(const struct sr_rational *)value; |
a370ef19 BV |
506 | for (i = 0; timebases[i].p && timebases[i].q; i++) { |
507 | if (timebases[i].p == tmp_rat.p | |
508 | && timebases[i].q == tmp_rat.q) { | |
269971dd | 509 | devc->timebase = i; |
a370ef19 BV |
510 | break; |
511 | } | |
512 | } | |
513 | if (timebases[i].p == 0 && timebases[i].q == 0) | |
514 | ret = SR_ERR_ARG; | |
515 | break; | |
516 | case SR_HWCAP_TRIGGER_SOURCE: | |
a370ef19 | 517 | for (i = 0; trigger_sources[i]; i++) { |
4a090d72 | 518 | if (!strcmp(value, trigger_sources[i])) { |
269971dd | 519 | devc->triggersource = g_strdup(value); |
a370ef19 BV |
520 | break; |
521 | } | |
522 | } | |
523 | if (trigger_sources[i] == 0) | |
524 | ret = SR_ERR_ARG; | |
525 | break; | |
ebb781a6 | 526 | case SR_HWCAP_FILTER: |
269971dd | 527 | devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0; |
ebb781a6 BV |
528 | targets = g_strsplit(value, ",", 0); |
529 | for (i = 0; targets[i]; i++) { | |
530 | if (targets[i] == '\0') | |
531 | /* Empty filter string can be used to clear them all. */ | |
532 | ; | |
533 | else if (!strcmp(targets[i], "CH1")) | |
269971dd | 534 | devc->filter_ch1 = TRUE; |
ebb781a6 | 535 | else if (!strcmp(targets[i], "CH2")) |
269971dd | 536 | devc->filter_ch2 = TRUE; |
ebb781a6 | 537 | else if (!strcmp(targets[i], "TRIGGER")) |
269971dd | 538 | devc->filter_trigger = TRUE; |
ebb781a6 | 539 | else { |
e98b7f1b | 540 | sr_err("Invalid filter target %s.", targets[i]); |
ebb781a6 BV |
541 | ret = SR_ERR_ARG; |
542 | } | |
543 | } | |
544 | g_strfreev(targets); | |
545 | break; | |
313deed2 | 546 | case SR_HWCAP_VDIV: |
e98b7f1b | 547 | /* TODO: Not supporting vdiv per channel yet. */ |
62bb8840 | 548 | tmp_rat = *(const struct sr_rational *)value; |
313deed2 BV |
549 | for (i = 0; vdivs[i].p && vdivs[i].q; i++) { |
550 | if (vdivs[i].p == tmp_rat.p | |
551 | && vdivs[i].q == tmp_rat.q) { | |
269971dd BV |
552 | devc->voltage_ch1 = i; |
553 | devc->voltage_ch2 = i; | |
313deed2 BV |
554 | break; |
555 | } | |
556 | } | |
557 | if (vdivs[i].p == 0 && vdivs[i].q == 0) | |
558 | ret = SR_ERR_ARG; | |
559 | break; | |
b58fbd99 | 560 | case SR_HWCAP_COUPLING: |
e98b7f1b | 561 | /* TODO: Not supporting coupling per channel yet. */ |
b58fbd99 | 562 | for (i = 0; coupling[i]; i++) { |
4a090d72 | 563 | if (!strcmp(value, coupling[i])) { |
269971dd BV |
564 | devc->coupling_ch1 = i; |
565 | devc->coupling_ch2 = i; | |
b58fbd99 BV |
566 | break; |
567 | } | |
568 | } | |
569 | if (coupling[i] == 0) | |
570 | ret = SR_ERR_ARG; | |
571 | break; | |
3b533202 BV |
572 | default: |
573 | ret = SR_ERR_ARG; | |
e98b7f1b | 574 | break; |
3b533202 BV |
575 | } |
576 | ||
577 | return ret; | |
578 | } | |
579 | ||
269971dd | 580 | static void send_chunk(struct dev_context *devc, unsigned char *buf, |
e749a8cb | 581 | int num_samples) |
3b533202 BV |
582 | { |
583 | struct sr_datafeed_packet packet; | |
584 | struct sr_datafeed_analog analog; | |
c5841b28 | 585 | float ch1, ch2, range; |
6e71ef3b | 586 | int num_probes, data_offset, i; |
3b533202 | 587 | |
269971dd | 588 | num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1; |
3b533202 BV |
589 | packet.type = SR_DF_ANALOG; |
590 | packet.payload = &analog; | |
6e71ef3b | 591 | /* TODO: support for 5xxx series 9-bit samples */ |
e749a8cb | 592 | analog.num_samples = num_samples; |
9956f285 UH |
593 | analog.mq = SR_MQ_VOLTAGE; |
594 | analog.unit = SR_UNIT_VOLT; | |
886a52b6 | 595 | /* TODO: Check malloc return value. */ |
6e71ef3b BV |
596 | analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes); |
597 | data_offset = 0; | |
3b533202 | 598 | for (i = 0; i < analog.num_samples; i++) { |
e98b7f1b UH |
599 | /* |
600 | * The device always sends data for both channels. If a channel | |
6e71ef3b | 601 | * is disabled, it contains a copy of the enabled channel's |
e98b7f1b UH |
602 | * data. However, we only send the requested channels to |
603 | * the bus. | |
c5841b28 | 604 | * |
e98b7f1b UH |
605 | * Voltage values are encoded as a value 0-255 (0-512 on the |
606 | * DSO-5200*), where the value is a point in the range | |
607 | * represented by the vdiv setting. There are 8 vertical divs, | |
608 | * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V | |
609 | * and 255 = +2V. | |
6e71ef3b | 610 | */ |
e98b7f1b | 611 | /* TODO: Support for DSO-5xxx series 9-bit samples. */ |
269971dd BV |
612 | if (devc->ch1_enabled) { |
613 | range = ((float)vdivs[devc->voltage_ch1].p / vdivs[devc->voltage_ch1].q) * 8; | |
e749a8cb | 614 | ch1 = range / 255 * *(buf + i * 2 + 1); |
c5841b28 BV |
615 | /* Value is centered around 0V. */ |
616 | ch1 -= range / 2; | |
6e71ef3b BV |
617 | analog.data[data_offset++] = ch1; |
618 | } | |
269971dd BV |
619 | if (devc->ch2_enabled) { |
620 | range = ((float)vdivs[devc->voltage_ch2].p / vdivs[devc->voltage_ch2].q) * 8; | |
e749a8cb | 621 | ch2 = range / 255 * *(buf + i * 2); |
c5841b28 | 622 | ch2 -= range / 2; |
6e71ef3b BV |
623 | analog.data[data_offset++] = ch2; |
624 | } | |
3b533202 | 625 | } |
269971dd | 626 | sr_session_send(devc->cb_data, &packet); |
e749a8cb BV |
627 | } |
628 | ||
e98b7f1b UH |
629 | /* |
630 | * Called by libusb (as triggered by handle_event()) when a transfer comes in. | |
e749a8cb | 631 | * Only channel data comes in asynchronously, and all transfers for this are |
e98b7f1b | 632 | * queued up beforehand, so this just needs to chuck the incoming data onto |
e749a8cb BV |
633 | * the libsigrok session bus. |
634 | */ | |
635 | static void receive_transfer(struct libusb_transfer *transfer) | |
636 | { | |
637 | struct sr_datafeed_packet packet; | |
269971dd | 638 | struct dev_context *devc; |
e749a8cb BV |
639 | int num_samples, pre; |
640 | ||
269971dd | 641 | devc = transfer->user_data; |
e98b7f1b UH |
642 | sr_dbg("receive_transfer(): status %d received %d bytes.", |
643 | transfer->status, transfer->actual_length); | |
e749a8cb BV |
644 | |
645 | if (transfer->actual_length == 0) | |
646 | /* Nothing to send to the bus. */ | |
647 | return; | |
648 | ||
649 | num_samples = transfer->actual_length / 2; | |
650 | ||
e98b7f1b UH |
651 | sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1, |
652 | devc->samp_received + num_samples, devc->framesize); | |
e749a8cb | 653 | |
e98b7f1b UH |
654 | /* |
655 | * The device always sends a full frame, but the beginning of the frame | |
e749a8cb BV |
656 | * doesn't represent the trigger point. The offset at which the trigger |
657 | * happened came in with the capture state, so we need to start sending | |
e98b7f1b UH |
658 | * from there up the session bus. The samples in the frame buffer |
659 | * before that trigger point came after the end of the device's frame | |
660 | * buffer was reached, and it wrapped around to overwrite up until the | |
661 | * trigger point. | |
e749a8cb | 662 | */ |
269971dd | 663 | if (devc->samp_received < devc->trigger_offset) { |
e749a8cb | 664 | /* Trigger point not yet reached. */ |
269971dd | 665 | if (devc->samp_received + num_samples < devc->trigger_offset) { |
e749a8cb | 666 | /* The entire chunk is before the trigger point. */ |
269971dd | 667 | memcpy(devc->framebuf + devc->samp_buffered * 2, |
e749a8cb | 668 | transfer->buffer, num_samples * 2); |
269971dd | 669 | devc->samp_buffered += num_samples; |
e749a8cb | 670 | } else { |
e98b7f1b UH |
671 | /* |
672 | * This chunk hits or overruns the trigger point. | |
e749a8cb | 673 | * Store the part before the trigger fired, and |
e98b7f1b UH |
674 | * send the rest up to the session bus. |
675 | */ | |
269971dd BV |
676 | pre = devc->trigger_offset - devc->samp_received; |
677 | memcpy(devc->framebuf + devc->samp_buffered * 2, | |
e749a8cb | 678 | transfer->buffer, pre * 2); |
269971dd | 679 | devc->samp_buffered += pre; |
e749a8cb BV |
680 | |
681 | /* The rest of this chunk starts with the trigger point. */ | |
e98b7f1b UH |
682 | sr_dbg("Reached trigger point, %d samples buffered.", |
683 | devc->samp_buffered); | |
e749a8cb BV |
684 | |
685 | /* Avoid the corner case where the chunk ended at | |
686 | * exactly the trigger point. */ | |
687 | if (num_samples > pre) | |
269971dd | 688 | send_chunk(devc, transfer->buffer + pre * 2, |
e749a8cb BV |
689 | num_samples - pre); |
690 | } | |
691 | } else { | |
692 | /* Already past the trigger point, just send it all out. */ | |
269971dd | 693 | send_chunk(devc, transfer->buffer, |
e749a8cb BV |
694 | num_samples); |
695 | } | |
696 | ||
269971dd | 697 | devc->samp_received += num_samples; |
e749a8cb BV |
698 | |
699 | /* Everything in this transfer was either copied to the buffer or | |
700 | * sent to the session bus. */ | |
3b533202 BV |
701 | g_free(transfer->buffer); |
702 | libusb_free_transfer(transfer); | |
3b533202 | 703 | |
269971dd | 704 | if (devc->samp_received >= devc->framesize) { |
e749a8cb BV |
705 | /* That was the last chunk in this frame. Send the buffered |
706 | * pre-trigger samples out now, in one big chunk. */ | |
e98b7f1b UH |
707 | sr_dbg("End of frame, sending %d pre-trigger buffered samples.", |
708 | devc->samp_buffered); | |
269971dd | 709 | send_chunk(devc, devc->framebuf, devc->samp_buffered); |
e749a8cb BV |
710 | |
711 | /* Mark the end of this frame. */ | |
ae88b97b | 712 | packet.type = SR_DF_FRAME_END; |
269971dd | 713 | sr_session_send(devc->cb_data, &packet); |
ae88b97b | 714 | |
269971dd | 715 | if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) { |
ae88b97b | 716 | /* Terminate session */ |
a3508e33 | 717 | devc->dev_state = STOPPING; |
ae88b97b | 718 | } else { |
269971dd | 719 | devc->dev_state = NEW_CAPTURE; |
ae88b97b BV |
720 | } |
721 | } | |
3b533202 BV |
722 | } |
723 | ||
724 | static int handle_event(int fd, int revents, void *cb_data) | |
725 | { | |
a3508e33 | 726 | const struct sr_dev_inst *sdi; |
ae88b97b | 727 | struct sr_datafeed_packet packet; |
3b533202 | 728 | struct timeval tv; |
269971dd | 729 | struct dev_context *devc; |
a873c594 | 730 | struct drv_context *drvc = di->priv; |
a3508e33 BV |
731 | const struct libusb_pollfd **lupfd; |
732 | int num_probes, i; | |
6e6eeff4 BV |
733 | uint32_t trigger_offset; |
734 | uint8_t capturestate; | |
3b533202 | 735 | |
3b533202 BV |
736 | (void)fd; |
737 | (void)revents; | |
738 | ||
269971dd BV |
739 | sdi = cb_data; |
740 | devc = sdi->priv; | |
a3508e33 BV |
741 | if (devc->dev_state == STOPPING) { |
742 | /* We've been told to wind up the acquisition. */ | |
e98b7f1b UH |
743 | sr_dbg("Stopping acquisition."); |
744 | /* | |
745 | * TODO: Doesn't really cancel pending transfers so they might | |
746 | * come in after SR_DF_END is sent. | |
747 | */ | |
d4abb463 | 748 | lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx); |
a3508e33 BV |
749 | for (i = 0; lupfd[i]; i++) |
750 | sr_source_remove(lupfd[i]->fd); | |
751 | free(lupfd); | |
752 | ||
753 | packet.type = SR_DF_END; | |
754 | sr_session_send(sdi, &packet); | |
755 | ||
756 | devc->dev_state = IDLE; | |
757 | ||
758 | return TRUE; | |
759 | } | |
760 | ||
3b533202 BV |
761 | /* Always handle pending libusb events. */ |
762 | tv.tv_sec = tv.tv_usec = 0; | |
d4abb463 | 763 | libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv); |
3b533202 | 764 | |
3b533202 | 765 | /* TODO: ugh */ |
269971dd BV |
766 | if (devc->dev_state == NEW_CAPTURE) { |
767 | if (dso_capture_start(devc) != SR_OK) | |
3b533202 | 768 | return TRUE; |
269971dd | 769 | if (dso_enable_trigger(devc) != SR_OK) |
3b533202 | 770 | return TRUE; |
269971dd | 771 | // if (dso_force_trigger(devc) != SR_OK) |
a370ef19 | 772 | // return TRUE; |
e98b7f1b | 773 | sr_dbg("Successfully requested next chunk."); |
269971dd | 774 | devc->dev_state = CAPTURE; |
3b533202 BV |
775 | return TRUE; |
776 | } | |
269971dd | 777 | if (devc->dev_state != CAPTURE) |
3b533202 BV |
778 | return TRUE; |
779 | ||
269971dd | 780 | if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK) |
3b533202 | 781 | return TRUE; |
3b533202 | 782 | |
e98b7f1b UH |
783 | sr_dbg("Capturestate %d.", capturestate); |
784 | sr_dbg("Trigger offset 0x%.6x.", trigger_offset); | |
3b533202 BV |
785 | switch (capturestate) { |
786 | case CAPTURE_EMPTY: | |
269971dd BV |
787 | if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) { |
788 | devc->capture_empty_count = 0; | |
789 | if (dso_capture_start(devc) != SR_OK) | |
3b533202 | 790 | break; |
269971dd | 791 | if (dso_enable_trigger(devc) != SR_OK) |
3b533202 | 792 | break; |
269971dd | 793 | // if (dso_force_trigger(devc) != SR_OK) |
a370ef19 | 794 | // break; |
e98b7f1b | 795 | sr_dbg("Successfully requested next chunk."); |
3b533202 BV |
796 | } |
797 | break; | |
798 | case CAPTURE_FILLING: | |
e98b7f1b | 799 | /* No data yet. */ |
3b533202 BV |
800 | break; |
801 | case CAPTURE_READY_8BIT: | |
e749a8cb | 802 | /* Remember where in the captured frame the trigger is. */ |
269971dd | 803 | devc->trigger_offset = trigger_offset; |
e749a8cb | 804 | |
269971dd | 805 | num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1; |
886a52b6 | 806 | /* TODO: Check malloc return value. */ |
269971dd BV |
807 | devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2); |
808 | devc->samp_buffered = devc->samp_received = 0; | |
e749a8cb | 809 | |
3b533202 | 810 | /* Tell the scope to send us the first frame. */ |
269971dd | 811 | if (dso_get_channeldata(devc, receive_transfer) != SR_OK) |
3b533202 | 812 | break; |
ae88b97b | 813 | |
e98b7f1b UH |
814 | /* |
815 | * Don't hit the state machine again until we're done fetching | |
ae88b97b BV |
816 | * the data we just told the scope to send. |
817 | */ | |
269971dd | 818 | devc->dev_state = FETCH_DATA; |
ae88b97b BV |
819 | |
820 | /* Tell the frontend a new frame is on the way. */ | |
821 | packet.type = SR_DF_FRAME_BEGIN; | |
269971dd | 822 | sr_session_send(sdi, &packet); |
3b533202 BV |
823 | break; |
824 | case CAPTURE_READY_9BIT: | |
825 | /* TODO */ | |
e98b7f1b | 826 | sr_err("Not yet supported."); |
3b533202 BV |
827 | break; |
828 | case CAPTURE_TIMEOUT: | |
829 | /* Doesn't matter, we'll try again next time. */ | |
830 | break; | |
831 | default: | |
e98b7f1b UH |
832 | sr_dbg("Unknown capture state: %d.", capturestate); |
833 | break; | |
3b533202 BV |
834 | } |
835 | ||
836 | return TRUE; | |
837 | } | |
838 | ||
3ffb6964 | 839 | static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi, |
e98b7f1b | 840 | void *cb_data) |
3b533202 BV |
841 | { |
842 | const struct libusb_pollfd **lupfd; | |
843 | struct sr_datafeed_packet packet; | |
844 | struct sr_datafeed_header header; | |
269971dd | 845 | struct dev_context *devc; |
a873c594 | 846 | struct drv_context *drvc = di->priv; |
3b533202 BV |
847 | int i; |
848 | ||
3b533202 BV |
849 | if (sdi->status != SR_ST_ACTIVE) |
850 | return SR_ERR; | |
851 | ||
269971dd BV |
852 | devc = sdi->priv; |
853 | devc->cb_data = cb_data; | |
3b533202 | 854 | |
014359e3 | 855 | if (configure_probes(sdi) != SR_OK) { |
e98b7f1b | 856 | sr_err("Failed to configure probes."); |
014359e3 BV |
857 | return SR_ERR; |
858 | } | |
859 | ||
269971dd | 860 | if (dso_init(devc) != SR_OK) |
3b533202 BV |
861 | return SR_ERR; |
862 | ||
269971dd | 863 | if (dso_capture_start(devc) != SR_OK) |
3b533202 BV |
864 | return SR_ERR; |
865 | ||
269971dd | 866 | devc->dev_state = CAPTURE; |
d4abb463 | 867 | lupfd = libusb_get_pollfds(drvc->sr_ctx->libusb_ctx); |
3b533202 | 868 | for (i = 0; lupfd[i]; i++) |
e98b7f1b UH |
869 | sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK, |
870 | handle_event, (void *)sdi); | |
3b533202 BV |
871 | free(lupfd); |
872 | ||
873 | /* Send header packet to the session bus. */ | |
874 | packet.type = SR_DF_HEADER; | |
875 | packet.payload = (unsigned char *)&header; | |
876 | header.feed_version = 1; | |
877 | gettimeofday(&header.starttime, NULL); | |
878 | sr_session_send(cb_data, &packet); | |
879 | ||
3b533202 BV |
880 | return SR_OK; |
881 | } | |
882 | ||
69b07d14 | 883 | static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) |
3b533202 | 884 | { |
269971dd BV |
885 | struct dev_context *devc; |
886 | ||
887 | (void)cb_data; | |
3b533202 | 888 | |
3b533202 BV |
889 | if (sdi->status != SR_ST_ACTIVE) |
890 | return SR_ERR; | |
891 | ||
a3508e33 BV |
892 | devc = sdi->priv; |
893 | devc->dev_state = STOPPING; | |
3b533202 BV |
894 | |
895 | return SR_OK; | |
896 | } | |
897 | ||
62bb8840 | 898 | SR_PRIV struct sr_dev_driver hantek_dso_driver_info = { |
3b533202 BV |
899 | .name = "hantek-dso", |
900 | .longname = "Hantek DSO", | |
901 | .api_version = 1, | |
902 | .init = hw_init, | |
903 | .cleanup = hw_cleanup, | |
61136ea6 | 904 | .scan = hw_scan, |
811deee4 BV |
905 | .dev_list = hw_dev_list, |
906 | .dev_clear = clear_instances, | |
3b533202 BV |
907 | .dev_open = hw_dev_open, |
908 | .dev_close = hw_dev_close, | |
0b79bcbb | 909 | .info_get = hw_info_get, |
3b533202 | 910 | .dev_config_set = hw_dev_config_set, |
62bb8840 UH |
911 | .dev_acquisition_start = hw_dev_acquisition_start, |
912 | .dev_acquisition_stop = hw_dev_acquisition_stop, | |
269971dd | 913 | .priv = NULL, |
3b533202 | 914 | }; |