]> sigrok.org Git - libsigrok.git/blame - hardware/hantek-dso/api.c
Add a struct sr_context * parameter to hw_init()
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
62bb8840 40static const int hwcaps[] = {
3b533202 41 SR_HWCAP_OSCILLOSCOPE,
ae88b97b 42 SR_HWCAP_LIMIT_SAMPLES,
3b533202 43 SR_HWCAP_CONTINUOUS,
a370ef19
BV
44 SR_HWCAP_TIMEBASE,
45 SR_HWCAP_BUFFERSIZE,
46 SR_HWCAP_TRIGGER_SOURCE,
47 SR_HWCAP_TRIGGER_SLOPE,
48 SR_HWCAP_HORIZ_TRIGGERPOS,
ebb781a6 49 SR_HWCAP_FILTER,
313deed2 50 SR_HWCAP_VDIV,
4a090d72 51 SR_HWCAP_COUPLING,
3b533202
BV
52 0,
53};
54
55static const char *probe_names[] = {
56 "CH1",
57 "CH2",
58 NULL,
59};
60
62bb8840 61static const struct dso_profile dev_profiles[] = {
88a13f30 62 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 63 "Hantek", "DSO-2090",
88a13f30
BV
64 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
65 { 0x04b4, 0x2150, 0x04b5, 0x2150,
66 "Hantek", "DSO-2150",
67 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
68 { 0x04b4, 0x2250, 0x04b5, 0x2250,
69 "Hantek", "DSO-2250",
70 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
71 { 0x04b4, 0x5200, 0x04b5, 0x5200,
72 "Hantek", "DSO-5200",
73 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
74 { 0x04b4, 0x520a, 0x04b5, 0x520a,
75 "Hantek", "DSO-5200A",
76 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
77 { 0, 0, 0, 0, 0, 0, 0 },
3b533202
BV
78};
79
62bb8840 80static const uint64_t buffersizes[] = {
a370ef19
BV
81 10240,
82 32768,
83 /* TODO: 65535 */
62bb8840 84 0,
a370ef19
BV
85};
86
62bb8840 87static const struct sr_rational timebases[] = {
a370ef19
BV
88 /* microseconds */
89 { 10, 1000000 },
90 { 20, 1000000 },
91 { 40, 1000000 },
92 { 100, 1000000 },
93 { 200, 1000000 },
94 { 400, 1000000 },
95 /* milliseconds */
96 { 1, 1000 },
97 { 2, 1000 },
98 { 4, 1000 },
99 { 10, 1000 },
100 { 20, 1000 },
101 { 40, 1000 },
102 { 100, 1000 },
103 { 200, 1000 },
104 { 400, 1000 },
62bb8840 105 { 0, 0},
a370ef19
BV
106};
107
62bb8840 108static const struct sr_rational vdivs[] = {
313deed2
BV
109 /* millivolts */
110 { 10, 1000 },
111 { 20, 1000 },
112 { 50, 1000 },
113 { 100, 1000 },
114 { 200, 1000 },
115 { 500, 1000 },
116 /* volts */
117 { 1, 1 },
118 { 2, 1 },
119 { 5, 1 },
62bb8840 120 { 0, 0 },
313deed2
BV
121};
122
62bb8840 123static const char *trigger_sources[] = {
a370ef19
BV
124 "CH1",
125 "CH2",
126 "EXT",
88a13f30 127 /* TODO: forced */
62bb8840 128 NULL,
a370ef19 129};
3b533202 130
62bb8840 131static const char *filter_targets[] = {
ebb781a6
BV
132 "CH1",
133 "CH2",
134 /* TODO: "TRIGGER", */
62bb8840 135 NULL,
ebb781a6
BV
136};
137
62bb8840 138static const char *coupling[] = {
b58fbd99
BV
139 "AC",
140 "DC",
141 "GND",
62bb8840 142 NULL,
b58fbd99
BV
143};
144
982947f7
BV
145SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
146static struct sr_dev_driver *hdi = &hantek_dso_driver_info;
e98b7f1b 147
69b07d14 148static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 149
62bb8840 150static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
151{
152 struct sr_dev_inst *sdi;
87ca93c5 153 struct sr_probe *probe;
269971dd
BV
154 struct drv_context *drvc;
155 struct dev_context *devc;
87ca93c5 156 int i;
3b533202
BV
157
158 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 159 prof->vendor, prof->model, NULL);
3b533202
BV
160 if (!sdi)
161 return NULL;
b0c8d7ac 162 sdi->driver = hdi;
3b533202 163
e98b7f1b
UH
164 /*
165 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
166 * a trigger source internal to the device.
167 */
168 for (i = 0; probe_names[i]; i++) {
169 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
170 probe_names[i])))
171 return NULL;
172 sdi->probes = g_slist_append(sdi->probes, probe);
173 }
174
269971dd 175 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 176 sr_err("Device context malloc failed.");
3b533202
BV
177 return NULL;
178 }
e98b7f1b 179
269971dd
BV
180 devc->profile = prof;
181 devc->dev_state = IDLE;
182 devc->timebase = DEFAULT_TIMEBASE;
183 devc->ch1_enabled = TRUE;
184 devc->ch2_enabled = TRUE;
185 devc->voltage_ch1 = DEFAULT_VOLTAGE;
186 devc->voltage_ch2 = DEFAULT_VOLTAGE;
187 devc->coupling_ch1 = DEFAULT_COUPLING;
188 devc->coupling_ch2 = DEFAULT_COUPLING;
189 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
190 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
191 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
192 devc->framesize = DEFAULT_FRAMESIZE;
193 devc->triggerslope = SLOPE_POSITIVE;
194 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
195 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
196 sdi->priv = devc;
197 drvc = hdi->priv;
198 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
199
200 return sdi;
201}
202
014359e3 203static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 204{
014359e3 205 struct dev_context *devc;
62bb8840
UH
206 const struct sr_probe *probe;
207 const GSList *l;
3b533202 208
014359e3
BV
209 devc = sdi->priv;
210
269971dd 211 devc->ch1_enabled = devc->ch2_enabled = FALSE;
014359e3 212 for (l = sdi->probes; l; l = l->next) {
3b533202 213 probe = (struct sr_probe *)l->data;
b35c8293 214 if (probe->index == 0)
269971dd 215 devc->ch1_enabled = probe->enabled;
b35c8293 216 else if (probe->index == 1)
269971dd 217 devc->ch2_enabled = probe->enabled;
3b533202
BV
218 }
219
220 return SR_OK;
221}
222
39cfdd75 223/* Properly close and free all devices. */
811deee4 224static int clear_instances(void)
39cfdd75
BV
225{
226 struct sr_dev_inst *sdi;
269971dd
BV
227 struct drv_context *drvc;
228 struct dev_context *devc;
39cfdd75
BV
229 GSList *l;
230
269971dd
BV
231 drvc = hdi->priv;
232 for (l = drvc->instances; l; l = l->next) {
39cfdd75
BV
233 if (!(sdi = l->data)) {
234 /* Log error, but continue cleaning up the rest. */
e98b7f1b 235 sr_err("%s: sdi was NULL, continuing", __func__);
39cfdd75
BV
236 continue;
237 }
269971dd 238 if (!(devc = sdi->priv)) {
39cfdd75 239 /* Log error, but continue cleaning up the rest. */
e98b7f1b 240 sr_err("%s: sdi->priv was NULL, continuing", __func__);
39cfdd75
BV
241 continue;
242 }
243 dso_close(sdi);
269971dd
BV
244 sr_usb_dev_inst_free(devc->usb);
245 g_free(devc->triggersource);
39cfdd75
BV
246
247 sr_dev_inst_free(sdi);
248 }
249
269971dd
BV
250 g_slist_free(drvc->instances);
251 drvc->instances = NULL;
39cfdd75 252
811deee4 253 return SR_OK;
39cfdd75
BV
254}
255
34f06b90 256static int hw_init(struct sr_context *sr_ctx)
61136ea6 257{
269971dd
BV
258 struct drv_context *drvc;
259
260 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
e98b7f1b 261 sr_err("Driver context malloc failed.");
886a52b6 262 return SR_ERR_MALLOC;
269971dd 263 }
61136ea6 264
19b0cce3 265 if (libusb_init(NULL) != 0) {
269971dd 266 g_free(drvc);
e98b7f1b 267 sr_err("Failed to initialize USB.");
61136ea6
BV
268 return SR_ERR;
269 }
270
269971dd
BV
271 hdi->priv = drvc;
272
61136ea6
BV
273 return SR_OK;
274}
275
39cfdd75 276static GSList *hw_scan(GSList *options)
3b533202
BV
277{
278 struct sr_dev_inst *sdi;
62bb8840 279 const struct dso_profile *prof;
269971dd
BV
280 struct drv_context *drvc;
281 struct dev_context *devc;
39cfdd75
BV
282 GSList *devices;
283 struct libusb_device_descriptor des;
3b533202 284 libusb_device **devlist;
61136ea6 285 int devcnt, ret, i, j;
3b533202 286
39cfdd75 287 (void)options;
e98b7f1b 288
3b533202 289 devcnt = 0;
39cfdd75 290 devices = 0;
269971dd
BV
291 drvc = hdi->priv;
292 drvc->instances = NULL;
39cfdd75
BV
293
294 clear_instances();
295
296 /* Find all Hantek DSO devices and upload firmware to all of them. */
19b0cce3 297 libusb_get_device_list(NULL, &devlist);
3b533202 298 for (i = 0; devlist[i]; i++) {
61136ea6 299 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
e98b7f1b 300 sr_err("Failed to get device descriptor: %d.", ret);
3b533202
BV
301 continue;
302 }
303
304 prof = NULL;
305 for (j = 0; dev_profiles[j].orig_vid; j++) {
306 if (des.idVendor == dev_profiles[j].orig_vid
307 && des.idProduct == dev_profiles[j].orig_pid) {
308 /* Device matches the pre-firmware profile. */
309 prof = &dev_profiles[j];
e98b7f1b 310 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 311 sdi = dso_dev_new(devcnt, prof);
39cfdd75 312 devices = g_slist_append(devices, sdi);
269971dd 313 devc = sdi->priv;
3b533202
BV
314 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
315 prof->firmware) == SR_OK)
316 /* Remember when the firmware on this device was updated */
269971dd 317 devc->fw_updated = g_get_monotonic_time();
3b533202 318 else
e98b7f1b
UH
319 sr_err("Firmware upload failed for "
320 "device %d.", devcnt);
3b533202 321 /* Dummy USB address of 0xff will get overwritten later. */
269971dd 322 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
323 libusb_get_bus_number(devlist[i]), 0xff, NULL);
324 devcnt++;
325 break;
326 } else if (des.idVendor == dev_profiles[j].fw_vid
327 && des.idProduct == dev_profiles[j].fw_pid) {
328 /* Device matches the post-firmware profile. */
329 prof = &dev_profiles[j];
e98b7f1b 330 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
331 sdi = dso_dev_new(devcnt, prof);
332 sdi->status = SR_ST_INACTIVE;
39cfdd75 333 devices = g_slist_append(devices, sdi);
269971dd
BV
334 devc = sdi->priv;
335 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
336 libusb_get_bus_number(devlist[i]),
337 libusb_get_device_address(devlist[i]), NULL);
338 devcnt++;
339 break;
340 }
341 }
342 if (!prof)
343 /* not a supported VID/PID */
344 continue;
345 }
346 libusb_free_device_list(devlist, 1);
347
39cfdd75 348 return devices;
3b533202
BV
349}
350
811deee4
BV
351static GSList *hw_dev_list(void)
352{
353 struct drv_context *drvc;
354
355 drvc = hdi->priv;
356
357 return drvc->instances;
358}
359
25a0f108 360static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 361{
269971dd 362 struct dev_context *devc;
fc8fe3e3
BV
363 int64_t timediff_us, timediff_ms;
364 int err;
3b533202 365
269971dd 366 devc = sdi->priv;
3b533202
BV
367
368 /*
e98b7f1b
UH
369 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
370 * for the FX2 to renumerate.
3b533202 371 */
fc8fe3e3 372 err = SR_ERR;
269971dd 373 if (devc->fw_updated > 0) {
e98b7f1b
UH
374 sr_info("Waiting for device to reset.");
375 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 376 g_usleep(300 * 1000);
fc8fe3e3
BV
377 timediff_ms = 0;
378 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 379 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
380 break;
381 g_usleep(100 * 1000);
269971dd 382 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 383 timediff_ms = timediff_us / 1000;
e98b7f1b 384 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 385 }
e98b7f1b 386 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 387 } else {
25a0f108 388 err = dso_open(sdi);
3b533202
BV
389 }
390
391 if (err != SR_OK) {
e98b7f1b 392 sr_err("Unable to open device.");
3b533202
BV
393 return SR_ERR;
394 }
395
269971dd 396 err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE);
3b533202 397 if (err != 0) {
e98b7f1b 398 sr_err("Unable to claim interface: %d.", err);
3b533202
BV
399 return SR_ERR;
400 }
401
402 return SR_OK;
403}
404
25a0f108 405static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 406{
3b533202
BV
407 dso_close(sdi);
408
409 return SR_OK;
410}
411
412static int hw_cleanup(void)
413{
269971dd
BV
414 struct drv_context *drvc;
415
416 if (!(drvc = hdi->priv))
417 return SR_OK;
3b533202 418
39cfdd75 419 clear_instances();
3b533202 420
19b0cce3 421 libusb_exit(NULL);
3b533202
BV
422
423 return SR_OK;
424}
425
0b79bcbb 426static int hw_info_get(int info_id, const void **data,
e98b7f1b 427 const struct sr_dev_inst *sdi)
3b533202 428{
3b533202
BV
429 uint64_t tmp;
430
6f57fd96
BV
431 (void)sdi;
432
0b79bcbb 433 switch (info_id) {
2ce9f046
BV
434 case SR_DI_HWCAPS:
435 *data = hwcaps;
436 break;
3b533202 437 case SR_DI_NUM_PROBES:
0b79bcbb 438 *data = GINT_TO_POINTER(NUM_PROBES);
3b533202
BV
439 break;
440 case SR_DI_PROBE_NAMES:
0b79bcbb 441 *data = probe_names;
3b533202 442 break;
a370ef19 443 case SR_DI_BUFFERSIZES:
0b79bcbb 444 *data = buffersizes;
a370ef19
BV
445 break;
446 case SR_DI_TIMEBASES:
0b79bcbb 447 *data = timebases;
a370ef19
BV
448 break;
449 case SR_DI_TRIGGER_SOURCES:
0b79bcbb 450 *data = trigger_sources;
a370ef19 451 break;
ebb781a6 452 case SR_DI_FILTERS:
0b79bcbb 453 *data = filter_targets;
ebb781a6 454 break;
313deed2 455 case SR_DI_VDIVS:
0b79bcbb 456 *data = vdivs;
313deed2 457 break;
4a090d72 458 case SR_DI_COUPLING:
0b79bcbb 459 *data = coupling;
4a090d72 460 break;
3b533202
BV
461 /* TODO remove this */
462 case SR_DI_CUR_SAMPLERATE:
0b79bcbb 463 *data = &tmp;
3b533202 464 break;
b0c8d7ac
BV
465 default:
466 return SR_ERR_ARG;
3b533202
BV
467 }
468
0b79bcbb 469 return SR_OK;
3b533202
BV
470}
471
6f4b1868 472static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
e98b7f1b 473 const void *value)
3b533202 474{
269971dd 475 struct dev_context *devc;
a370ef19
BV
476 struct sr_rational tmp_rat;
477 float tmp_float;
478 uint64_t tmp_u64;
479 int ret, i;
4a090d72 480 char **targets;
3b533202 481
3b533202
BV
482 if (sdi->status != SR_ST_ACTIVE)
483 return SR_ERR;
484
a370ef19 485 ret = SR_OK;
269971dd 486 devc = sdi->priv;
3b533202 487 switch (hwcap) {
ae88b97b 488 case SR_HWCAP_LIMIT_FRAMES:
269971dd 489 devc->limit_frames = *(const uint64_t *)value;
ae88b97b 490 break;
a370ef19 491 case SR_HWCAP_TRIGGER_SLOPE:
62bb8840 492 tmp_u64 = *(const int *)value;
a370ef19
BV
493 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
494 ret = SR_ERR_ARG;
269971dd 495 devc->triggerslope = tmp_u64;
a370ef19
BV
496 break;
497 case SR_HWCAP_HORIZ_TRIGGERPOS:
62bb8840 498 tmp_float = *(const float *)value;
a370ef19 499 if (tmp_float < 0.0 || tmp_float > 1.0) {
e98b7f1b 500 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 501 ret = SR_ERR_ARG;
a370ef19 502 } else
269971dd 503 devc->triggerposition = tmp_float;
a370ef19
BV
504 break;
505 case SR_HWCAP_BUFFERSIZE:
62bb8840 506 tmp_u64 = *(const int *)value;
a370ef19
BV
507 for (i = 0; buffersizes[i]; i++) {
508 if (buffersizes[i] == tmp_u64) {
269971dd 509 devc->framesize = tmp_u64;
a370ef19
BV
510 break;
511 }
512 }
513 if (buffersizes[i] == 0)
514 ret = SR_ERR_ARG;
515 break;
516 case SR_HWCAP_TIMEBASE:
62bb8840 517 tmp_rat = *(const struct sr_rational *)value;
a370ef19
BV
518 for (i = 0; timebases[i].p && timebases[i].q; i++) {
519 if (timebases[i].p == tmp_rat.p
520 && timebases[i].q == tmp_rat.q) {
269971dd 521 devc->timebase = i;
a370ef19
BV
522 break;
523 }
524 }
525 if (timebases[i].p == 0 && timebases[i].q == 0)
526 ret = SR_ERR_ARG;
527 break;
528 case SR_HWCAP_TRIGGER_SOURCE:
a370ef19 529 for (i = 0; trigger_sources[i]; i++) {
4a090d72 530 if (!strcmp(value, trigger_sources[i])) {
269971dd 531 devc->triggersource = g_strdup(value);
a370ef19
BV
532 break;
533 }
534 }
535 if (trigger_sources[i] == 0)
536 ret = SR_ERR_ARG;
537 break;
ebb781a6 538 case SR_HWCAP_FILTER:
269971dd 539 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
ebb781a6
BV
540 targets = g_strsplit(value, ",", 0);
541 for (i = 0; targets[i]; i++) {
542 if (targets[i] == '\0')
543 /* Empty filter string can be used to clear them all. */
544 ;
545 else if (!strcmp(targets[i], "CH1"))
269971dd 546 devc->filter_ch1 = TRUE;
ebb781a6 547 else if (!strcmp(targets[i], "CH2"))
269971dd 548 devc->filter_ch2 = TRUE;
ebb781a6 549 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 550 devc->filter_trigger = TRUE;
ebb781a6 551 else {
e98b7f1b 552 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
553 ret = SR_ERR_ARG;
554 }
555 }
556 g_strfreev(targets);
557 break;
313deed2 558 case SR_HWCAP_VDIV:
e98b7f1b 559 /* TODO: Not supporting vdiv per channel yet. */
62bb8840 560 tmp_rat = *(const struct sr_rational *)value;
313deed2
BV
561 for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
562 if (vdivs[i].p == tmp_rat.p
563 && vdivs[i].q == tmp_rat.q) {
269971dd
BV
564 devc->voltage_ch1 = i;
565 devc->voltage_ch2 = i;
313deed2
BV
566 break;
567 }
568 }
569 if (vdivs[i].p == 0 && vdivs[i].q == 0)
570 ret = SR_ERR_ARG;
571 break;
b58fbd99 572 case SR_HWCAP_COUPLING:
e98b7f1b 573 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 574 for (i = 0; coupling[i]; i++) {
4a090d72 575 if (!strcmp(value, coupling[i])) {
269971dd
BV
576 devc->coupling_ch1 = i;
577 devc->coupling_ch2 = i;
b58fbd99
BV
578 break;
579 }
580 }
581 if (coupling[i] == 0)
582 ret = SR_ERR_ARG;
583 break;
3b533202
BV
584 default:
585 ret = SR_ERR_ARG;
e98b7f1b 586 break;
3b533202
BV
587 }
588
589 return ret;
590}
591
269971dd 592static void send_chunk(struct dev_context *devc, unsigned char *buf,
e749a8cb 593 int num_samples)
3b533202
BV
594{
595 struct sr_datafeed_packet packet;
596 struct sr_datafeed_analog analog;
c5841b28 597 float ch1, ch2, range;
6e71ef3b 598 int num_probes, data_offset, i;
3b533202 599
269971dd 600 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
601 packet.type = SR_DF_ANALOG;
602 packet.payload = &analog;
6e71ef3b 603 /* TODO: support for 5xxx series 9-bit samples */
e749a8cb 604 analog.num_samples = num_samples;
9956f285
UH
605 analog.mq = SR_MQ_VOLTAGE;
606 analog.unit = SR_UNIT_VOLT;
886a52b6 607 /* TODO: Check malloc return value. */
6e71ef3b
BV
608 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
609 data_offset = 0;
3b533202 610 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
611 /*
612 * The device always sends data for both channels. If a channel
6e71ef3b 613 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
614 * data. However, we only send the requested channels to
615 * the bus.
c5841b28 616 *
e98b7f1b
UH
617 * Voltage values are encoded as a value 0-255 (0-512 on the
618 * DSO-5200*), where the value is a point in the range
619 * represented by the vdiv setting. There are 8 vertical divs,
620 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
621 * and 255 = +2V.
6e71ef3b 622 */
e98b7f1b 623 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd
BV
624 if (devc->ch1_enabled) {
625 range = ((float)vdivs[devc->voltage_ch1].p / vdivs[devc->voltage_ch1].q) * 8;
e749a8cb 626 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
627 /* Value is centered around 0V. */
628 ch1 -= range / 2;
6e71ef3b
BV
629 analog.data[data_offset++] = ch1;
630 }
269971dd
BV
631 if (devc->ch2_enabled) {
632 range = ((float)vdivs[devc->voltage_ch2].p / vdivs[devc->voltage_ch2].q) * 8;
e749a8cb 633 ch2 = range / 255 * *(buf + i * 2);
c5841b28 634 ch2 -= range / 2;
6e71ef3b
BV
635 analog.data[data_offset++] = ch2;
636 }
3b533202 637 }
269971dd 638 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
639}
640
e98b7f1b
UH
641/*
642 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 643 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 644 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
645 * the libsigrok session bus.
646 */
647static void receive_transfer(struct libusb_transfer *transfer)
648{
649 struct sr_datafeed_packet packet;
269971dd 650 struct dev_context *devc;
e749a8cb
BV
651 int num_samples, pre;
652
269971dd 653 devc = transfer->user_data;
e98b7f1b
UH
654 sr_dbg("receive_transfer(): status %d received %d bytes.",
655 transfer->status, transfer->actual_length);
e749a8cb
BV
656
657 if (transfer->actual_length == 0)
658 /* Nothing to send to the bus. */
659 return;
660
661 num_samples = transfer->actual_length / 2;
662
e98b7f1b
UH
663 sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
664 devc->samp_received + num_samples, devc->framesize);
e749a8cb 665
e98b7f1b
UH
666 /*
667 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
668 * doesn't represent the trigger point. The offset at which the trigger
669 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
670 * from there up the session bus. The samples in the frame buffer
671 * before that trigger point came after the end of the device's frame
672 * buffer was reached, and it wrapped around to overwrite up until the
673 * trigger point.
e749a8cb 674 */
269971dd 675 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 676 /* Trigger point not yet reached. */
269971dd 677 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 678 /* The entire chunk is before the trigger point. */
269971dd 679 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 680 transfer->buffer, num_samples * 2);
269971dd 681 devc->samp_buffered += num_samples;
e749a8cb 682 } else {
e98b7f1b
UH
683 /*
684 * This chunk hits or overruns the trigger point.
e749a8cb 685 * Store the part before the trigger fired, and
e98b7f1b
UH
686 * send the rest up to the session bus.
687 */
269971dd
BV
688 pre = devc->trigger_offset - devc->samp_received;
689 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 690 transfer->buffer, pre * 2);
269971dd 691 devc->samp_buffered += pre;
e749a8cb
BV
692
693 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
694 sr_dbg("Reached trigger point, %d samples buffered.",
695 devc->samp_buffered);
e749a8cb
BV
696
697 /* Avoid the corner case where the chunk ended at
698 * exactly the trigger point. */
699 if (num_samples > pre)
269971dd 700 send_chunk(devc, transfer->buffer + pre * 2,
e749a8cb
BV
701 num_samples - pre);
702 }
703 } else {
704 /* Already past the trigger point, just send it all out. */
269971dd 705 send_chunk(devc, transfer->buffer,
e749a8cb
BV
706 num_samples);
707 }
708
269971dd 709 devc->samp_received += num_samples;
e749a8cb
BV
710
711 /* Everything in this transfer was either copied to the buffer or
712 * sent to the session bus. */
3b533202
BV
713 g_free(transfer->buffer);
714 libusb_free_transfer(transfer);
3b533202 715
269971dd 716 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
717 /* That was the last chunk in this frame. Send the buffered
718 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
719 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
720 devc->samp_buffered);
269971dd 721 send_chunk(devc, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
722
723 /* Mark the end of this frame. */
ae88b97b 724 packet.type = SR_DF_FRAME_END;
269971dd 725 sr_session_send(devc->cb_data, &packet);
ae88b97b 726
269971dd 727 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 728 /* Terminate session */
a3508e33 729 devc->dev_state = STOPPING;
ae88b97b 730 } else {
269971dd 731 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
732 }
733 }
3b533202
BV
734}
735
736static int handle_event(int fd, int revents, void *cb_data)
737{
a3508e33 738 const struct sr_dev_inst *sdi;
ae88b97b 739 struct sr_datafeed_packet packet;
3b533202 740 struct timeval tv;
269971dd 741 struct dev_context *devc;
a3508e33
BV
742 const struct libusb_pollfd **lupfd;
743 int num_probes, i;
6e6eeff4
BV
744 uint32_t trigger_offset;
745 uint8_t capturestate;
3b533202 746
3b533202
BV
747 (void)fd;
748 (void)revents;
749
269971dd
BV
750 sdi = cb_data;
751 devc = sdi->priv;
a3508e33
BV
752 if (devc->dev_state == STOPPING) {
753 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
754 sr_dbg("Stopping acquisition.");
755 /*
756 * TODO: Doesn't really cancel pending transfers so they might
757 * come in after SR_DF_END is sent.
758 */
19b0cce3 759 lupfd = libusb_get_pollfds(NULL);
a3508e33
BV
760 for (i = 0; lupfd[i]; i++)
761 sr_source_remove(lupfd[i]->fd);
762 free(lupfd);
763
764 packet.type = SR_DF_END;
765 sr_session_send(sdi, &packet);
766
767 devc->dev_state = IDLE;
768
769 return TRUE;
770 }
771
3b533202
BV
772 /* Always handle pending libusb events. */
773 tv.tv_sec = tv.tv_usec = 0;
19b0cce3 774 libusb_handle_events_timeout(NULL, &tv);
3b533202 775
3b533202 776 /* TODO: ugh */
269971dd
BV
777 if (devc->dev_state == NEW_CAPTURE) {
778 if (dso_capture_start(devc) != SR_OK)
3b533202 779 return TRUE;
269971dd 780 if (dso_enable_trigger(devc) != SR_OK)
3b533202 781 return TRUE;
269971dd 782// if (dso_force_trigger(devc) != SR_OK)
a370ef19 783// return TRUE;
e98b7f1b 784 sr_dbg("Successfully requested next chunk.");
269971dd 785 devc->dev_state = CAPTURE;
3b533202
BV
786 return TRUE;
787 }
269971dd 788 if (devc->dev_state != CAPTURE)
3b533202
BV
789 return TRUE;
790
269971dd 791 if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK)
3b533202 792 return TRUE;
3b533202 793
e98b7f1b
UH
794 sr_dbg("Capturestate %d.", capturestate);
795 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
796 switch (capturestate) {
797 case CAPTURE_EMPTY:
269971dd
BV
798 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
799 devc->capture_empty_count = 0;
800 if (dso_capture_start(devc) != SR_OK)
3b533202 801 break;
269971dd 802 if (dso_enable_trigger(devc) != SR_OK)
3b533202 803 break;
269971dd 804// if (dso_force_trigger(devc) != SR_OK)
a370ef19 805// break;
e98b7f1b 806 sr_dbg("Successfully requested next chunk.");
3b533202
BV
807 }
808 break;
809 case CAPTURE_FILLING:
e98b7f1b 810 /* No data yet. */
3b533202
BV
811 break;
812 case CAPTURE_READY_8BIT:
e749a8cb 813 /* Remember where in the captured frame the trigger is. */
269971dd 814 devc->trigger_offset = trigger_offset;
e749a8cb 815
269971dd 816 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 817 /* TODO: Check malloc return value. */
269971dd
BV
818 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
819 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 820
3b533202 821 /* Tell the scope to send us the first frame. */
269971dd 822 if (dso_get_channeldata(devc, receive_transfer) != SR_OK)
3b533202 823 break;
ae88b97b 824
e98b7f1b
UH
825 /*
826 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
827 * the data we just told the scope to send.
828 */
269971dd 829 devc->dev_state = FETCH_DATA;
ae88b97b
BV
830
831 /* Tell the frontend a new frame is on the way. */
832 packet.type = SR_DF_FRAME_BEGIN;
269971dd 833 sr_session_send(sdi, &packet);
3b533202
BV
834 break;
835 case CAPTURE_READY_9BIT:
836 /* TODO */
e98b7f1b 837 sr_err("Not yet supported.");
3b533202
BV
838 break;
839 case CAPTURE_TIMEOUT:
840 /* Doesn't matter, we'll try again next time. */
841 break;
842 default:
e98b7f1b
UH
843 sr_dbg("Unknown capture state: %d.", capturestate);
844 break;
3b533202
BV
845 }
846
847 return TRUE;
848}
849
3ffb6964 850static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 851 void *cb_data)
3b533202
BV
852{
853 const struct libusb_pollfd **lupfd;
854 struct sr_datafeed_packet packet;
855 struct sr_datafeed_header header;
856 struct sr_datafeed_meta_analog meta;
269971dd 857 struct dev_context *devc;
3b533202
BV
858 int i;
859
3b533202
BV
860 if (sdi->status != SR_ST_ACTIVE)
861 return SR_ERR;
862
269971dd
BV
863 devc = sdi->priv;
864 devc->cb_data = cb_data;
3b533202 865
014359e3 866 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 867 sr_err("Failed to configure probes.");
014359e3
BV
868 return SR_ERR;
869 }
870
269971dd 871 if (dso_init(devc) != SR_OK)
3b533202
BV
872 return SR_ERR;
873
269971dd 874 if (dso_capture_start(devc) != SR_OK)
3b533202
BV
875 return SR_ERR;
876
269971dd 877 devc->dev_state = CAPTURE;
19b0cce3 878 lupfd = libusb_get_pollfds(NULL);
3b533202 879 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
880 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
881 handle_event, (void *)sdi);
3b533202
BV
882 free(lupfd);
883
884 /* Send header packet to the session bus. */
885 packet.type = SR_DF_HEADER;
886 packet.payload = (unsigned char *)&header;
887 header.feed_version = 1;
888 gettimeofday(&header.starttime, NULL);
889 sr_session_send(cb_data, &packet);
890
891 /* Send metadata about the SR_DF_ANALOG packets to come. */
892 packet.type = SR_DF_META_ANALOG;
893 packet.payload = &meta;
88a13f30 894 meta.num_probes = NUM_PROBES;
3b533202
BV
895 sr_session_send(cb_data, &packet);
896
897 return SR_OK;
898}
899
69b07d14 900static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 901{
269971dd
BV
902 struct dev_context *devc;
903
904 (void)cb_data;
3b533202 905
3b533202
BV
906 if (sdi->status != SR_ST_ACTIVE)
907 return SR_ERR;
908
a3508e33
BV
909 devc = sdi->priv;
910 devc->dev_state = STOPPING;
3b533202
BV
911
912 return SR_OK;
913}
914
62bb8840 915SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
916 .name = "hantek-dso",
917 .longname = "Hantek DSO",
918 .api_version = 1,
919 .init = hw_init,
920 .cleanup = hw_cleanup,
61136ea6 921 .scan = hw_scan,
811deee4
BV
922 .dev_list = hw_dev_list,
923 .dev_clear = clear_instances,
3b533202
BV
924 .dev_open = hw_dev_open,
925 .dev_close = hw_dev_close,
0b79bcbb 926 .info_get = hw_info_get,
3b533202 927 .dev_config_set = hw_dev_config_set,
62bb8840
UH
928 .dev_acquisition_start = hw_dev_acquisition_start,
929 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 930 .priv = NULL,
3b533202 931};