ZEROPLUS Logic Cube LAP-C series

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ZEROPLUS Logic Cube LAP-C series
Zeroplus Logic Cube.png
Status supported
Source code zeroplus-logic-cube
Channels 16/32
Samplerate max. 200MHz
Samplerate (state) max. 100MHz
Triggers pattern, edge
Min/max voltage -6V — +6V
Memory max. 2Mbits/channel
Compression yes
Website zeroplus.com.tw

The ZEROPLUS Logic Cube LAP-C series are USB-based, 16/32-channel logic analyzers with up to 200MHz sampling rate.

Devices

Model USB VID USB PID Channels Samplerate Memory
ZEROPLUS LAP-32128U 0x0c12 0x7000 32
ZEROPLUS LAP-16128U 0x0c12 0x7002 16 200MHz 4Mbits
ZEROPLUS LAP-321000U 0x0c12 0x7003 32
ZEROPLUS LAP-16064U 0x0c12 0x7004 16
ZEROPLUS LAP-32064U 0x0c12 0x7005 32
ZEROPLUS LAP-322000U 0x0c12 0x7006 32
ZEROPLUS LAP-16032U 0x0c12 0x7007 16
ZEROPLUS LAP-32128U 0x0c12 0x7008 32
ZEROPLUS LAP-C(16064) 0x0c12 0x7009 16 100MHz 1Mbits
ZEROPLUS LAP-C(16128) 0x0c12 0x700a 16 200MHz 4Mbits
ZEROPLUS LAP-C(32128) 0x0c12 0x700b 32 200MHz 4MBits
ZEROPLUS LAP-C(321000) 0x0c12 0x700c 32 200MHz 32Mbits
ZEROPLUS LAP-C(322000) 0x0c12 0x700d 32 200MHz 64Mbits
ZEROPLUS LAP-C(16032) 0x0c12 0x700e 16 100MHz 512Kbits
ZEROPLUS LAP-B(70256) 0x0c12 0x7010 70
ZEROPLUS LAP-B(702000) 0x0c12 0x7011 70
ZEROPLUS LAP-B(54256U) 0x0c12 0x7012 54
ZEROPLUS LAP-B(542000U) 0x0c12 0x7013 54
ZEROPLUS LAP-B(70256L) 0x0c12 0x7014 70
ZEROPLUS LAP-B(702000L) 0x0c12 0x7015 70
ZEROPLUS LAP-C(162000) 0x0c12 0x7016 16 200MHz 64Mbits
ZEROPLUS LAP-D(32512) 0x0c12 0x7020 32
ZEROPLUS LAP-B(702000+) 0x0c12 0x7040 70
ZEROPLUS LAP-B(702000X) 0x0c12 0x7041 70
Prist AKIP-9101 0x0c12 0x7100 16 200MHz 4Mbits

See also Hack a Day comments or the libsigrok source code.

Hardware

Hardware between the LAP-C series devices is very similar and includes:

  • ZEROPLUS ZP-322MB-5 or ZP-322MC-5 (probably a custom ZEROPLUS ASIC)
  • Genesys Logic GL660USB (USB2.0 to IEEE-1284 / DMA bridge)
  • Cypress pipelined sync SRAM, varies by model:
    • CY7C1347G-250AXC 4Mbit, 250MHz (eg, 16032)
    • CY7C1480V33-200AXC 72Mbit, 200MHz (eg, 322000)
  • National LM2596 (SIMPLE SWITCHER power converter 150 kHz 3A step-down voltage regulator)
  • Microchip 93LC46B (1K EEPROM)
  • DV4128B (probably also a custom ZEROPLUS chip)
  • Pericom PI74FCT245TSE (fast CMOS octal bidirectional transceivers)
  • 1-2 Texas Instruments SN74LVT16245B (3.3V ABT 16bit bus transceivers with 3-state outputs)
  • National LM348M (quad 741 op-amp)

GL660USB GPIOs

GPIO Connection
GPIO1 EEPROM CS
GPIO2 EEPROM CLK
GPIO3 EEPROM DI
GPIO4 EEPROM DO
GPIO5 IOA
GPIO6 IOB
GPIO7 IOC

Protocol

The USB protocol of the ZEROPLUS Logic Cube LAP-C series devices will eventually be documented here. For the time being, please check the libsigrok source code instead.

Resources

  • zerominus (source code to talk to the Logic Cube LAP-C series devices, now merged into libsigrok)
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