Difference between revisions of "Logic Shrimp"

From sigrok
Jump to navigation Jump to search
Line 13: Line 13:


The PIC uses the sump protocol, as used by the [[Openbench Logic Sniffer]] driver. It is thus supported in sigrok out of the box. However, the current firmware in the Logic Shrimp does not properly publish metadata according to its capabilities. In order to get valid data from it, make sure to always restrict the probes sampled to 1-4.
The PIC uses the sump protocol, as used by the [[Openbench Logic Sniffer]] driver. It is thus supported in sigrok out of the box. However, the current firmware in the Logic Shrimp does not properly publish metadata according to its capabilities. In order to get valid data from it, make sure to always restrict the probes sampled to 1-4.
[[Category:Device]]
[[Category:Logic Analyzer]]
[[Category:Supported]]

Revision as of 11:29, 11 November 2012

Logic Shrimp
Back of PCB

The Logic Shrimp is a USB-based logic analyzer created by Dangerous Prototypes. The design is available under a Creative Commons (CC-BY-SA) license.

See Logic Shrimp/Info for more details (such as lsusb -vvv output) about the device.

Hardware

The device essentially consists of a PIC microchip running at 20MHz, sampling each of its 4 probes into its own 256K SRAM chip. A buffer chip makes the design 5V tolerant.

Driver

The PIC uses the sump protocol, as used by the Openbench Logic Sniffer driver. It is thus supported in sigrok out of the box. However, the current firmware in the Logic Shrimp does not properly publish metadata according to its capabilities. In order to get valid data from it, make sure to always restrict the probes sampled to 1-4.