Difference between revisions of "ZEROPLUS LAP-16128U"
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[[File:Zeroplus_lap-16128u.png| | {{Infobox logic analyzer | ||
| image = [[File:Zeroplus_lap-16128u.png|180px]] | |||
| name = ZEROPLUS LAP-16128U | |||
| status = supported | |||
| source_code_dir = zeroplus-logic-cube | |||
| channels = 16 | |||
| samplerate = 200MHz | |||
| samplerate_state = 100MHz | |||
| triggers = pattern, edge | |||
| voltages = -6V — +6V | |||
| memory = 128Kbits/channel | |||
| compression = yes ("max 32Mbits") | |||
| website = [http://www.zeroplus.com.tw/logic-analyzer_en/products.php?pdn=1&product_id=19 zeroplus.com.tw] | |||
}} | |||
The | The '''ZEROPLUS LAP-16128U''' is a USB-based, 16-channel logic analyzer with up to 200MHz sampling rate. | ||
See [[ZEROPLUS LAP-16128U/Info]] for more details (such as '''lsusb - | See [[ZEROPLUS LAP-16128U/Info]] for more details (such as '''lsusb -v''' output) about the device. | ||
See [[ZEROPLUS Logic Cube LAP-C series]] for information common to all devices in this series. | |||
== Hardware == | == Hardware == | ||
* Cypress CY7C1347G-250AXC (4Mbit pipelined sync SRAM, 250MHz) | |||
See [[ZEROPLUS_Logic_Cube_LAP-C_series#Hardware]] for the hardware parts that are common to all devices in this series. | |||
== Photos == | == Photos == | ||
| Line 13: | Line 30: | ||
<gallery> | <gallery> | ||
File:Zeroplus lap-16128u front.jpg|<small>Device, front</small> | File:Zeroplus lap-16128u front.jpg|<small>Device, front</small> | ||
File:Zeroplus lap16128u device back.jpg|<small>Device, back</small> | |||
File:Zeroplus lap16128u device side.jpg|<small>Device, side</small> | |||
File:Zeroplus lap16128u device connector.jpg|<small>Device, connector</small> | |||
File:Zeroplus lap16128u device bottom.jpg|<small>Device, bottom</small> | |||
File:Zeroplus lap16128u device open1.jpg|<small>Device, open 1</small> | |||
File:Zeroplus lap16128u device open2.jpg|<small>Device, open 2</small> | |||
File:Zeroplus lap16128u pcb top.jpg|<small>PCB, top</small> | |||
File:Zeroplus lap16128u pcb bottom.jpg|<small>PCB, bottom</small> | |||
File:Zeroplus lap16128u pcb markings.jpg|<small>PCB markings</small> | |||
File:Zeroplus lap16128u zeroplus tp322mb-5.jpg|<small>ZEROPLUS ZP322MB-5</small> | |||
File:Zeroplus lap16128u zeroplus dv4128b.jpg|<small>ZEROPLUS DV4128B</small> | |||
File:Zeroplus lap16128u genesys gl660usb.jpg|<small>Genesys GL660USB</small> | |||
File:Zeroplus lap16128u cypress cy7c1347g 250axc.jpg|<small>Cypress CY7C1347G-250AXC</small> | |||
File:Zeroplus lap16128u microchip 93lc46b.jpg|<small>Microchip 93LC46B</small> | |||
File:Zeroplus lap16128u ti lvt16245b.jpg|<small>TI LVT16245B</small> | |||
File:Zeroplus lap16128u pi74fct.jpg|<small>PI74FCT</small> | |||
File:Zeroplus lap16128u national lm2596s.jpg|<small>National LM2596S</small> | |||
File:Zeroplus lap16128u national lm348m.jpg|<small>National LM348M</small> | |||
File:Zeroplus lap16128u input protection.jpg|<small>Input protection</small> | |||
File:Zeroplus lap16128u 34053a.jpg|<small>34053A</small> | |||
File:Zeroplus lap16128u 12mhz crystal.jpg|<small>12MHz chrystal</small> | |||
</gallery> | </gallery> | ||
== Protocol == | == Protocol == | ||
See [[ZEROPLUS_Logic_Cube_LAP-C_series#Protocol]]. | |||
== Resources == | == Resources == | ||
* [http://www.zeroplus.com.tw/software_download/LAP_A%20spec_en20071011.pdf Datasheet] | |||
* [http://www.zeroplus.com.tw/software_download/lac_manual_Standard_V31202_en.zip Manual] | |||
* [http://www.zeroplus.com.tw/logic-analyzer_en/technical_support_search.php?model=LAP-16128U&class1=1 Vendor software] | |||
[[Category:Device]] | [[Category:Device]] | ||
[[Category:Logic analyzer]] | [[Category:Logic analyzer]] | ||
[[Category: | [[Category:Supported]] | ||
Latest revision as of 00:17, 30 October 2014
 | |
| Status | supported |
|---|---|
| Source code | zeroplus-logic-cube |
| Channels | 16 |
| Samplerate | 200MHz |
| Samplerate (state) | 100MHz |
| Triggers | pattern, edge |
| Min/max voltage | -6V — +6V |
| Memory | 128Kbits/channel |
| Compression | yes ("max 32Mbits") |
| Website | zeroplus.com.tw |
The ZEROPLUS LAP-16128U is a USB-based, 16-channel logic analyzer with up to 200MHz sampling rate.
See ZEROPLUS LAP-16128U/Info for more details (such as lsusb -v output) about the device.
See ZEROPLUS Logic Cube LAP-C series for information common to all devices in this series.
Hardware
- Cypress CY7C1347G-250AXC (4Mbit pipelined sync SRAM, 250MHz)
See ZEROPLUS_Logic_Cube_LAP-C_series#Hardware for the hardware parts that are common to all devices in this series.
Photos
Device, front
Device, back
Device, side
Device, connector
Device, bottom
Device, open 1
Device, open 2
PCB, top
PCB, bottom
PCB markings
ZEROPLUS ZP322MB-5
ZEROPLUS DV4128B
Genesys GL660USB
Cypress CY7C1347G-250AXC
Microchip 93LC46B
TI LVT16245B
PI74FCT
National LM2596S
National LM348M
Input protection
34053A
12MHz chrystal
Protocol
See ZEROPLUS_Logic_Cube_LAP-C_series#Protocol.