Difference between revisions of "Lcsoft Mini Board"

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[[File:lcsoft-miniboard-front.png|thumb|right|Lcsoft CY7C68013A Mini Board]]
{{Infobox logic analyzer
[[File:lcsoft-miniboard-back.png|thumb|right|Back of PCB]]
| image            = [[File:lcsoft-miniboard-front.png|180px]]
| name            = Lcsoft Mini Board
| status          = supported
| source_code_dir  = fx2lafw
| channels        = 8/16
| samplerate      = 24MHz
| samplerate_state = —
| triggers        = none (SW-only)
| voltages        = -0.5V — 5.25V
| threshold        = Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V
| memory          = none
| compression      = none
| website          = [http://www.lctech-inc.com/Hardware/Detail.aspx?id=7cadef7b-359a-4e3d-b980-76ffa15171e0 lctech-inc.com], [http://www.geeetech.com/wiki/index.php/CY7C68013 geeetech.com]
}}


This is a barebones development board for the Cypress FX2 chip, as used in the [[Saleae Logic]] and other boards. It is available on Ebay for less than €15, or Taobao for even less.
The '''Lcsoft CY7C68013A Mini Board''' is a Cypress FX2(LP) eval board, which can be used as USB-based, 16-channel logic analyzer with up to 24MHz sampling rate.
 
It is a clone of the [[Saleae Logic]].
 
In sigrok, we use the open-source [[fx2lafw]] firmware for this logic analyzer.
 
See [[Lcsoft Mini Board/Info]] for some more details (such as '''lsusb -v''' output) on the device.
 
There is a very similar board made by Geeetech, it has near-identical components but a slightly different layout.


== Hardware ==
== Hardware ==


All the pins on the FX2 are broken out to 40 header pins. There's an on/off toggle switch, a reset button, and a jumper that lets you select whether the FX2 gets its configuration from a small EEPROM, or boots into the default mode. The EEPROM's default settings make it come up with the same VID:PID as a Saleae board.
* '''Main chip''': Cypress CY7C68013A-56PVXC (FX2LP)
* '''3.3V voltage regulator''': Advanced Monolithic Systems AMS1117-3.3
* '''16kB I2C EEPROM''': Atmel AT24C128A
* '''24MHz crystal''': JY24.0000601
 
All the pins on the FX2(LP) are broken out to 40 header pins. There's an on/off toggle switch, a reset button, and a jumper that lets you select whether the FX2LP gets its configuration from a small EEPROM, or boots into the default mode. The EEPROM is usually provided programmed such that it enumerates with the same VID:PID as a [[Saleae Logic]].
 
By default the chip will boot in some internal bootloader which allows loading (and executing) from USB to the internal RAM. Sigrok will typically use the [[fx2lafw]] firmware for this (aka "load-on-probe").
 
The EEPROM can be programmed with a firmware. The jumper allows to select whether the chip will boot on the EEPROM or the usual load-on-probe. This can be used for example to switch easily between a 16-channel (PB0-PB7, PD0-PD7) firmware and a 8-channel (PB0-PB7) one.
 
The Cypress has no DAC and can't by itself have any analog output. Other Cypress-based board have an external DAC, typically connected to 8 pins of the FX2, but this very one doesn't have any DAC.
 
 
== Photos ==
 
<gallery>
File:lcsoft-miniboard-front.png|<small>PCB, front</small>
File:lcsoft-fx2-pcb-top.png|<small>PCB, front</small>
File:lcsoft-miniboard-back.png|<small>PCB, back</small>
File:Lcsoft mini board ams1117.jpg|<small>A.M.S. AMS1117</small>
File:Lcsoft mini board at24c128a.jpg|<small>Atmel AT24C128A</small>
File:Lcsoft mini board crystal.jpg|<small>24MHz crystal</small>
File:Lcsoft mini board fx2.jpg|<small>Cypress FX2LP</small>
</gallery>
 
'''Geeetech version''':
 
[http://www.geeetech.com/wiki/index.php/CY7C68013 Geeetech product page]
 
<gallery>
File:Geeetech_CY7C68013.jpg|<small>Geeetech CY7C68013, front</small>
File:Geeetech_CY7C68013_back.jpg|<small>Geeetech CY7C68013, back</small>
</gallery>
 
Differences from the LCSoft board:
* two LEDs, on pins PA0 and PA1
* two jumpers: J1 connects/disconnects the LEDs from Vcc, J2 sets the EEPROM address bit A0
* construction quality is higher
 
The Geeetech board's J2 is logically opposite to the LCSoft board's jumper: pin A0 is tied HIGH via a 10kOhm resistor, inserting J2 pulls it LOW. i.e. inserting J2 on the Geeetech is functionally the same as removing the jumper on the LCSoft board.


== Driver ==
== Protocol ==


The board is fully supported by sigrok, using the Saleae driver.
Since we use the open-source [[fx2lafw]] firmware for this device, we don't need to know the protocol.


== Required Testing Hardware Extensions ==
== Possible issues ==
 
* With some kernel versions, and if the onboard EEPROM is disconnected (the jumper not connected) the kernel will automatically claim the device with a '''usbtest''' kernel module, seen in dmesg like '''usbtest 2-2:1.0: FX2 device''' &mdash; if this happens, sigrok will be unable to claim the device. Remove the '''usbtest''' kernel module as root to be able to use it:
 
$ '''sudo rmmod usbtest'''
 
You can add the '''usbtest''' module to a module blacklist permanently, at least in Debian-based distributions found in '''/etc/modprobe.d/blacklist.conf''':
 
$ '''sudo sh -c "echo 'blacklist usbtest' >> /etc/modprobe.d/blacklist.conf"'''
 
== Required testing hardware extensions ==


'''Do not directly hook the board pins to another circuit, if you don't know what you are doing! This could damage the board!'''
'''Do not directly hook the board pins to another circuit, if you don't know what you are doing! This could damage the board!'''


The simplest circuit would be adding at least resistors in between your circuit-in-test and the LCSoft board, but be aware here that this cypress chip can only tolerate a maximum of 5V I/O. Better would be to use a clamp circuit like shown at [http://sunbizhosting.co.uk/~spiral/blog/?p=117 Spiralbrain's Blog]. A buffer circuit using a 74HC241 IC for protection is also possible. Check on the [[fx2lafw]] page to see which protection circuits are used on other logic analyzer boards.
The simplest circuit would be adding at least resistors in between your circuit-in-test and the Lcsoft board, but be aware here that the Cypress FX2(LP) chip can only tolerate a maximum of 5V I/O. Better would be to use a clamp circuit like shown at [http://web.archive.org/web/20140604115345/http://sunbizhosting.co.uk/~spiral/blog/?p=117 Spiralbrain's Blog] (but you do not need to add another EEPROM for sigrok with [[fx2lafw]]!) (and this clamp circuit does not protect the chip from voltages < -0.5 V). A buffer circuit using a 74HC241 IC¹ for protection is also possible. Check the [[fx2lafw]] page to see which protection circuits are used on other logic analyzer boards.
 
More information can be found in [[Circuits for barebone boards]].
 
== Resources ==
 
* [http://web.archive.org/web/20140604115345/http://sunbizhosting.co.uk/~spiral/blog/?p=117 Spiralbrain's blog: So your Saleae clone isn’t working with the new software?]
* [http://hanixdiy.blogspot.de/2011/03/cy7c68013a-usb-logic-analyzer.html hAnix-diy: CY7C68013A USB Logic Analyzer]
* [http://www.triplespark.net/elec/periph/USB-FX2/eeprom/ Instructions for flashing the EEPROM on FX2 devices]
* [http://www.triplespark.net/elec/periph/USB-FX2/eeprom/fxload-full-2008_10_13-ww3.tar.gz Second stage bootloader, Vend_Ax.hex]
 
¹) with Vcc=2.8 V you get approx. VIL<=0.77 V and VIH>=2.03 V; with Vcc=5.0 V you get approx. VIL<=1.5 V and VIH>=3.5 V (interpolated from datasheet)
 
[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Supported]]

Latest revision as of 22:55, 26 January 2019

Lcsoft Mini Board
Lcsoft-miniboard-front.png
Status supported
Source code fx2lafw
Channels 8/16
Samplerate 24MHz
Samplerate (state) —
Triggers none (SW-only)
Min/max voltage -0.5V — 5.25V
Threshold voltage Fixed: VIH=2.0V—5.25V, VIL=-0.5V—0.8V
Memory none
Compression none
Website lctech-inc.com, geeetech.com

The Lcsoft CY7C68013A Mini Board is a Cypress FX2(LP) eval board, which can be used as USB-based, 16-channel logic analyzer with up to 24MHz sampling rate.

It is a clone of the Saleae Logic.

In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.

See Lcsoft Mini Board/Info for some more details (such as lsusb -v output) on the device.

There is a very similar board made by Geeetech, it has near-identical components but a slightly different layout.

Hardware

  • Main chip: Cypress CY7C68013A-56PVXC (FX2LP)
  • 3.3V voltage regulator: Advanced Monolithic Systems AMS1117-3.3
  • 16kB I2C EEPROM: Atmel AT24C128A
  • 24MHz crystal: JY24.0000601

All the pins on the FX2(LP) are broken out to 40 header pins. There's an on/off toggle switch, a reset button, and a jumper that lets you select whether the FX2LP gets its configuration from a small EEPROM, or boots into the default mode. The EEPROM is usually provided programmed such that it enumerates with the same VID:PID as a Saleae Logic.

By default the chip will boot in some internal bootloader which allows loading (and executing) from USB to the internal RAM. Sigrok will typically use the fx2lafw firmware for this (aka "load-on-probe").

The EEPROM can be programmed with a firmware. The jumper allows to select whether the chip will boot on the EEPROM or the usual load-on-probe. This can be used for example to switch easily between a 16-channel (PB0-PB7, PD0-PD7) firmware and a 8-channel (PB0-PB7) one.

The Cypress has no DAC and can't by itself have any analog output. Other Cypress-based board have an external DAC, typically connected to 8 pins of the FX2, but this very one doesn't have any DAC.


Photos

  • PCB, front

  • PCB, front

  • PCB, back

  • A.M.S. AMS1117

  • Atmel AT24C128A

  • 24MHz crystal

  • Cypress FX2LP

Geeetech version:

Geeetech product page

  • Geeetech CY7C68013, front

  • Geeetech CY7C68013, back

Differences from the LCSoft board:

  • two LEDs, on pins PA0 and PA1
  • two jumpers: J1 connects/disconnects the LEDs from Vcc, J2 sets the EEPROM address bit A0
  • construction quality is higher

The Geeetech board's J2 is logically opposite to the LCSoft board's jumper: pin A0 is tied HIGH via a 10kOhm resistor, inserting J2 pulls it LOW. i.e. inserting J2 on the Geeetech is functionally the same as removing the jumper on the LCSoft board.

Protocol

Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.

Possible issues

  • With some kernel versions, and if the onboard EEPROM is disconnected (the jumper not connected) the kernel will automatically claim the device with a usbtest kernel module, seen in dmesg like usbtest 2-2:1.0: FX2 device — if this happens, sigrok will be unable to claim the device. Remove the usbtest kernel module as root to be able to use it:
$ sudo rmmod usbtest

You can add the usbtest module to a module blacklist permanently, at least in Debian-based distributions found in /etc/modprobe.d/blacklist.conf: 

$ sudo sh -c "echo 'blacklist usbtest' >> /etc/modprobe.d/blacklist.conf"

Required testing hardware extensions

Do not directly hook the board pins to another circuit, if you don't know what you are doing! This could damage the board!

The simplest circuit would be adding at least resistors in between your circuit-in-test and the Lcsoft board, but be aware here that the Cypress FX2(LP) chip can only tolerate a maximum of 5V I/O. Better would be to use a clamp circuit like shown at Spiralbrain's Blog (but you do not need to add another EEPROM for sigrok with fx2lafw!) (and this clamp circuit does not protect the chip from voltages < -0.5 V). A buffer circuit using a 74HC241 IC¹ for protection is also possible. Check the fx2lafw page to see which protection circuits are used on other logic analyzer boards.

More information can be found in Circuits for barebone boards.

Resources

¹) with Vcc=2.8 V you get approx. VIL<=0.77 V and VIH>=2.03 V; with Vcc=5.0 V you get approx. VIL<=1.5 V and VIH>=3.5 V (interpolated from datasheet)

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