uart: Add test-cases for rx_packet_delimiter/rx_packet_len et al.

[sigrok-test.git] / decoder / test / uart / uart_count_19200_6n1_dec.output

diff --git a/decoder/test/uart/uart_count_19200_6n1_dec.output b/decoder/test/uart/uart_count_19200_6n1_dec.output
index fb1ccbcb2258c2427e912bc2f846ea7c8c5e0000..12d371a554daec83f61bf75ed918127cb5c71ce2 100644 (file)
--- a/decoder/test/uart/uart_count_19200_6n1_dec.output
+++ b/decoder/test/uart/uart_count_19200_6n1_dec.output
@@ -141,6 +141,7 @@
 7241-7268 uart: tx-data-bits: "0"
 7267-7294 uart: tx-data-bits: "0"
 7137-7294 uart: tx-data: "11"
+170-7294 uart: tx-packet: "60 61 62 63 0 1 2 3 4 5 6 7 8 9 10 11"
 7293-7320 uart: tx-parity-ok: "Stop bit" "Stop" "T"
 7578-7605 uart: tx-start: "Start bit" "Start" "S"
 7604-7631 uart: tx-data-bits: "0"
@@ -285,6 +286,7 @@
 14699-14726 uart: tx-data-bits: "1"
 14725-14752 uart: tx-data-bits: "0"
 14595-14752 uart: tx-data: "27"
+7604-14752 uart: tx-packet: "12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27"
 14751-14778 uart: tx-parity-ok: "Stop bit" "Stop" "T"
 15036-15063 uart: tx-start: "Start bit" "Start" "S"
 15062-15089 uart: tx-data-bits: "0"
@@ -429,6 +431,7 @@
 22141-22168 uart: tx-data-bits: "0"
 22167-22194 uart: tx-data-bits: "1"
 22037-22194 uart: tx-data: "43"
+15062-22194 uart: tx-packet: "28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43"
 22193-22220 uart: tx-parity-ok: "Stop bit" "Stop" "T"
 22478-22505 uart: tx-start: "Start bit" "Start" "S"
 22504-22531 uart: tx-data-bits: "0"
@@ -573,6 +576,7 @@
 29577-29604 uart: tx-data-bits: "1"
 29603-29630 uart: tx-data-bits: "1"
 29473-29630 uart: tx-data: "59"
+22504-29630 uart: tx-packet: "44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59"
 29629-29656 uart: tx-parity-ok: "Stop bit" "Stop" "T"
 29911-29938 uart: tx-start: "Start bit" "Start" "S"
 29937-29964 uart: tx-data-bits: "0"