ds1307: Updates after annotation class PD fixes.

[sigrok-test.git] / decoder / test / uart / uart_count_19200_5n1.python

117-144 uart: ['STARTBIT', 1, 0]
143-274 uart: ['DATA', 1, (31, [[1, 143, 169], [1, 169, 195], [1, 195, 221], [1, 221, 247], [1, 247, 273]])]
273-300 uart: ['STOPBIT', 1, 1]
117-300 uart: ['FRAME', 1, (31, True)]
300-483 uart: ['IDLE', 1, 0]
554-581 uart: ['STARTBIT', 1, 0]
580-711 uart: ['DATA', 1, (0, [[0, 580, 606], [0, 606, 632], [0, 632, 658], [0, 658, 684], [0, 684, 710]])]
710-737 uart: ['STOPBIT', 1, 1]
554-737 uart: ['FRAME', 1, (0, True)]
737-920 uart: ['IDLE', 1, 0]
990-1017 uart: ['STARTBIT', 1, 0]
1016-1147 uart: ['DATA', 1, (1, [[1, 1016, 1042], [0, 1042, 1068], [0, 1068, 1094], [0, 1094, 1120], [0, 1120, 1146]])]
1146-1173 uart: ['STOPBIT', 1, 1]
990-1173 uart: ['FRAME', 1, (1, True)]
1173-1356 uart: ['IDLE', 1, 0]
1429-1456 uart: ['STARTBIT', 1, 0]
1455-1586 uart: ['DATA', 1, (2, [[0, 1455, 1481], [1, 1481, 1507], [0, 1507, 1533], [0, 1533, 1559], [0, 1559, 1585]])]
1585-1612 uart: ['STOPBIT', 1, 1]
1429-1612 uart: ['FRAME', 1, (2, True)]
1612-1795 uart: ['IDLE', 1, 0]
1868-1895 uart: ['STARTBIT', 1, 0]
1894-2025 uart: ['DATA', 1, (3, [[1, 1894, 1920], [1, 1920, 1946], [0, 1946, 1972], [0, 1972, 1998], [0, 1998, 2024]])]
2024-2051 uart: ['STOPBIT', 1, 1]
1868-2051 uart: ['FRAME', 1, (3, True)]
2051-2234 uart: ['IDLE', 1, 0]
2306-2333 uart: ['STARTBIT', 1, 0]
2332-2463 uart: ['DATA', 1, (4, [[0, 2332, 2358], [0, 2358, 2384], [1, 2384, 2410], [0, 2410, 2436], [0, 2436, 2462]])]
2462-2489 uart: ['STOPBIT', 1, 1]
2306-2489 uart: ['FRAME', 1, (4, True)]
2489-2672 uart: ['IDLE', 1, 0]
2745-2772 uart: ['STARTBIT', 1, 0]
2771-2902 uart: ['DATA', 1, (5, [[1, 2771, 2797], [0, 2797, 2823], [1, 2823, 2849], [0, 2849, 2875], [0, 2875, 2901]])]
2901-2928 uart: ['STOPBIT', 1, 1]
2745-2928 uart: ['FRAME', 1, (5, True)]
2928-3111 uart: ['IDLE', 1, 0]
3186-3213 uart: ['STARTBIT', 1, 0]
3212-3343 uart: ['DATA', 1, (6, [[0, 3212, 3238], [1, 3238, 3264], [1, 3264, 3290], [0, 3290, 3316], [0, 3316, 3342]])]
3342-3369 uart: ['STOPBIT', 1, 1]
3186-3369 uart: ['FRAME', 1, (6, True)]
3369-3552 uart: ['IDLE', 1, 0]
3624-3651 uart: ['STARTBIT', 1, 0]
3650-3781 uart: ['DATA', 1, (7, [[1, 3650, 3676], [1, 3676, 3702], [1, 3702, 3728], [0, 3728, 3754], [0, 3754, 3780]])]
3780-3807 uart: ['STOPBIT', 1, 1]
3624-3807 uart: ['FRAME', 1, (7, True)]
3807-3990 uart: ['IDLE', 1, 0]
4063-4090 uart: ['STARTBIT', 1, 0]
4089-4220 uart: ['DATA', 1, (8, [[0, 4089, 4115], [0, 4115, 4141], [0, 4141, 4167], [1, 4167, 4193], [0, 4193, 4219]])]
4219-4246 uart: ['STOPBIT', 1, 1]
4063-4246 uart: ['FRAME', 1, (8, True)]
4246-4429 uart: ['IDLE', 1, 0]
4501-4528 uart: ['STARTBIT', 1, 0]
4527-4658 uart: ['DATA', 1, (9, [[1, 4527, 4553], [0, 4553, 4579], [0, 4579, 4605], [1, 4605, 4631], [0, 4631, 4657]])]
4657-4684 uart: ['STOPBIT', 1, 1]
4501-4684 uart: ['FRAME', 1, (9, True)]
4684-4867 uart: ['IDLE', 1, 0]
4942-4969 uart: ['STARTBIT', 1, 0]
4968-5099 uart: ['DATA', 1, (10, [[0, 4968, 4994], [1, 4994, 5020], [0, 5020, 5046], [1, 5046, 5072], [0, 5072, 5098]])]
5098-5125 uart: ['STOPBIT', 1, 1]
4942-5125 uart: ['FRAME', 1, (10, True)]
5125-5308 uart: ['IDLE', 1, 0]
5383-5410 uart: ['STARTBIT', 1, 0]
5409-5540 uart: ['DATA', 1, (11, [[1, 5409, 5435], [1, 5435, 5461], [0, 5461, 5487], [1, 5487, 5513], [0, 5513, 5539]])]
5539-5566 uart: ['STOPBIT', 1, 1]
5383-5566 uart: ['FRAME', 1, (11, True)]
5566-5749 uart: ['IDLE', 1, 0]
5823-5850 uart: ['STARTBIT', 1, 0]
5849-5980 uart: ['DATA', 1, (12, [[0, 5849, 5875], [0, 5875, 5901], [1, 5901, 5927], [1, 5927, 5953], [0, 5953, 5979]])]
5979-6006 uart: ['STOPBIT', 1, 1]
5823-6006 uart: ['FRAME', 1, (12, True)]
6006-6189 uart: ['IDLE', 1, 0]
6262-6289 uart: ['STARTBIT', 1, 0]
6288-6419 uart: ['DATA', 1, (13, [[1, 6288, 6314], [0, 6314, 6340], [1, 6340, 6366], [1, 6366, 6392], [0, 6392, 6418]])]
6418-6445 uart: ['STOPBIT', 1, 1]
6262-6445 uart: ['FRAME', 1, (13, True)]
6445-6628 uart: ['IDLE', 1, 0]
6703-6730 uart: ['STARTBIT', 1, 0]
6729-6860 uart: ['DATA', 1, (14, [[0, 6729, 6755], [1, 6755, 6781], [1, 6781, 6807], [1, 6807, 6833], [0, 6833, 6859]])]
6859-6886 uart: ['STOPBIT', 1, 1]
6703-6886 uart: ['FRAME', 1, (14, True)]
6886-7069 uart: ['IDLE', 1, 0]
7141-7168 uart: ['STARTBIT', 1, 0]
7167-7298 uart: ['DATA', 1, (15, [[1, 7167, 7193], [1, 7193, 7219], [1, 7219, 7245], [1, 7245, 7271], [0, 7271, 7297]])]
7297-7324 uart: ['STOPBIT', 1, 1]
7141-7324 uart: ['FRAME', 1, (15, True)]
7324-7507 uart: ['IDLE', 1, 0]
7580-7607 uart: ['STARTBIT', 1, 0]
7606-7737 uart: ['DATA', 1, (16, [[0, 7606, 7632], [0, 7632, 7658], [0, 7658, 7684], [0, 7684, 7710], [1, 7710, 7736]])]
7736-7763 uart: ['STOPBIT', 1, 1]
7580-7763 uart: ['FRAME', 1, (16, True)]
7763-7946 uart: ['IDLE', 1, 0]
8016-8043 uart: ['STARTBIT', 1, 0]
8042-8173 uart: ['DATA', 1, (17, [[1, 8042, 8068], [0, 8068, 8094], [0, 8094, 8120], [0, 8120, 8146], [1, 8146, 8172]])]
8172-8199 uart: ['STOPBIT', 1, 1]
8016-8199 uart: ['FRAME', 1, (17, True)]
8199-8382 uart: ['IDLE', 1, 0]
8455-8482 uart: ['STARTBIT', 1, 0]
8481-8612 uart: ['DATA', 1, (18, [[0, 8481, 8507], [1, 8507, 8533], [0, 8533, 8559], [0, 8559, 8585], [1, 8585, 8611]])]
8611-8638 uart: ['STOPBIT', 1, 1]
8455-8638 uart: ['FRAME', 1, (18, True)]
8638-8821 uart: ['IDLE', 1, 0]
8894-8921 uart: ['STARTBIT', 1, 0]
8920-9051 uart: ['DATA', 1, (19, [[1, 8920, 8946], [1, 8946, 8972], [0, 8972, 8998], [0, 8998, 9024], [1, 9024, 9050]])]
9050-9077 uart: ['STOPBIT', 1, 1]
8894-9077 uart: ['FRAME', 1, (19, True)]
9077-9260 uart: ['IDLE', 1, 0]
9332-9359 uart: ['STARTBIT', 1, 0]
9358-9489 uart: ['DATA', 1, (20, [[0, 9358, 9384], [0, 9384, 9410], [1, 9410, 9436], [0, 9436, 9462], [1, 9462, 9488]])]
9488-9515 uart: ['STOPBIT', 1, 1]
9332-9515 uart: ['FRAME', 1, (20, True)]
9515-9698 uart: ['IDLE', 1, 0]
9771-9798 uart: ['STARTBIT', 1, 0]
9797-9928 uart: ['DATA', 1, (21, [[1, 9797, 9823], [0, 9823, 9849], [1, 9849, 9875], [0, 9875, 9901], [1, 9901, 9927]])]
9927-9954 uart: ['STOPBIT', 1, 1]
9771-9954 uart: ['FRAME', 1, (21, True)]
9954-10137 uart: ['IDLE', 1, 0]
10212-10239 uart: ['STARTBIT', 1, 0]
10238-10369 uart: ['DATA', 1, (22, [[0, 10238, 10264], [1, 10264, 10290], [1, 10290, 10316], [0, 10316, 10342], [1, 10342, 10368]])]
10368-10395 uart: ['STOPBIT', 1, 1]
10212-10395 uart: ['FRAME', 1, (22, True)]
10395-10578 uart: ['IDLE', 1, 0]
10650-10677 uart: ['STARTBIT', 1, 0]
10676-10807 uart: ['DATA', 1, (23, [[1, 10676, 10702], [1, 10702, 10728], [1, 10728, 10754], [0, 10754, 10780], [1, 10780, 10806]])]
10806-10833 uart: ['STOPBIT', 1, 1]
10650-10833 uart: ['FRAME', 1, (23, True)]
10833-11016 uart: ['IDLE', 1, 0]
11089-11116 uart: ['STARTBIT', 1, 0]
11115-11246 uart: ['DATA', 1, (24, [[0, 11115, 11141], [0, 11141, 11167], [0, 11167, 11193], [1, 11193, 11219], [1, 11219, 11245]])]
11245-11272 uart: ['STOPBIT', 1, 1]
11089-11272 uart: ['FRAME', 1, (24, True)]
11272-11455 uart: ['IDLE', 1, 0]
11525-11552 uart: ['STARTBIT', 1, 0]
11551-11682 uart: ['DATA', 1, (25, [[1, 11551, 11577], [0, 11577, 11603], [0, 11603, 11629], [1, 11629, 11655], [1, 11655, 11681]])]
11681-11708 uart: ['STOPBIT', 1, 1]
11525-11708 uart: ['FRAME', 1, (25, True)]
11708-11891 uart: ['IDLE', 1, 0]
11964-11991 uart: ['STARTBIT', 1, 0]
11990-12121 uart: ['DATA', 1, (26, [[0, 11990, 12016], [1, 12016, 12042], [0, 12042, 12068], [1, 12068, 12094], [1, 12094, 12120]])]
12120-12147 uart: ['STOPBIT', 1, 1]
11964-12147 uart: ['FRAME', 1, (26, True)]
12147-12330 uart: ['IDLE', 1, 0]
12403-12430 uart: ['STARTBIT', 1, 0]
12429-12560 uart: ['DATA', 1, (27, [[1, 12429, 12455], [1, 12455, 12481], [0, 12481, 12507], [1, 12507, 12533], [1, 12533, 12559]])]
12559-12586 uart: ['STOPBIT', 1, 1]
12403-12586 uart: ['FRAME', 1, (27, True)]
12586-12769 uart: ['IDLE', 1, 0]
12841-12868 uart: ['STARTBIT', 1, 0]
12867-12998 uart: ['DATA', 1, (28, [[0, 12867, 12893], [0, 12893, 12919], [1, 12919, 12945], [1, 12945, 12971], [1, 12971, 12997]])]
12997-13024 uart: ['STOPBIT', 1, 1]
12841-13024 uart: ['FRAME', 1, (28, True)]
13024-13207 uart: ['IDLE', 1, 0]
13278-13305 uart: ['STARTBIT', 1, 0]
13304-13435 uart: ['DATA', 1, (29, [[1, 13304, 13330], [0, 13330, 13356], [1, 13356, 13382], [1, 13382, 13408], [1, 13408, 13434]])]
13434-13461 uart: ['STOPBIT', 1, 1]
13278-13461 uart: ['FRAME', 1, (29, True)]
13461-13644 uart: ['IDLE', 1, 0]
13717-13744 uart: ['STARTBIT', 1, 0]
13743-13874 uart: ['DATA', 1, (30, [[0, 13743, 13769], [1, 13769, 13795], [1, 13795, 13821], [1, 13821, 13847], [1, 13847, 13873]])]
13873-13900 uart: ['STOPBIT', 1, 1]
13717-13900 uart: ['FRAME', 1, (30, True)]
13900-14083 uart: ['IDLE', 1, 0]
14153-14180 uart: ['STARTBIT', 1, 0]
14179-14310 uart: ['DATA', 1, (31, [[1, 14179, 14205], [1, 14205, 14231], [1, 14231, 14257], [1, 14257, 14283], [1, 14283, 14309]])]
14309-14336 uart: ['STOPBIT', 1, 1]
14153-14336 uart: ['FRAME', 1, (31, True)]
14336-14519 uart: ['IDLE', 1, 0]
14590-14617 uart: ['STARTBIT', 1, 0]
14616-14747 uart: ['DATA', 1, (0, [[0, 14616, 14642], [0, 14642, 14668], [0, 14668, 14694], [0, 14694, 14720], [0, 14720, 14746]])]
14746-14773 uart: ['STOPBIT', 1, 1]
14590-14773 uart: ['FRAME', 1, (0, True)]
14773-14956 uart: ['IDLE', 1, 0]
15027-15054 uart: ['STARTBIT', 1, 0]
15053-15184 uart: ['DATA', 1, (1, [[1, 15053, 15079], [0, 15079, 15105], [0, 15105, 15131], [0, 15131, 15157], [0, 15157, 15183]])]
15183-15210 uart: ['STOPBIT', 1, 1]
15027-15210 uart: ['FRAME', 1, (1, True)]
15210-15393 uart: ['IDLE', 1, 0]
15465-15492 uart: ['STARTBIT', 1, 0]
15491-15622 uart: ['DATA', 1, (2, [[0, 15491, 15517], [1, 15517, 15543], [0, 15543, 15569], [0, 15569, 15595], [0, 15595, 15621]])]
15621-15648 uart: ['STOPBIT', 1, 1]
15465-15648 uart: ['FRAME', 1, (2, True)]
15648-15831 uart: ['IDLE', 1, 0]
15904-15931 uart: ['STARTBIT', 1, 0]
15930-16061 uart: ['DATA', 1, (3, [[1, 15930, 15956], [1, 15956, 15982], [0, 15982, 16008], [0, 16008, 16034], [0, 16034, 16060]])]
16060-16087 uart: ['STOPBIT', 1, 1]
15904-16087 uart: ['FRAME', 1, (3, True)]
16087-16270 uart: ['IDLE', 1, 0]
16342-16369 uart: ['STARTBIT', 1, 0]
16368-16499 uart: ['DATA', 1, (4, [[0, 16368, 16394], [0, 16394, 16420], [1, 16420, 16446], [0, 16446, 16472], [0, 16472, 16498]])]
16498-16525 uart: ['STOPBIT', 1, 1]
16342-16525 uart: ['FRAME', 1, (4, True)]
16525-16708 uart: ['IDLE', 1, 0]
16781-16808 uart: ['STARTBIT', 1, 0]
16807-16938 uart: ['DATA', 1, (5, [[1, 16807, 16833], [0, 16833, 16859], [1, 16859, 16885], [0, 16885, 16911], [0, 16911, 16937]])]
16937-16964 uart: ['STOPBIT', 1, 1]
16781-16964 uart: ['FRAME', 1, (5, True)]
16964-17147 uart: ['IDLE', 1, 0]
17222-17249 uart: ['STARTBIT', 1, 0]
17248-17379 uart: ['DATA', 1, (6, [[0, 17248, 17274], [1, 17274, 17300], [1, 17300, 17326], [0, 17326, 17352], [0, 17352, 17378]])]
17378-17405 uart: ['STOPBIT', 1, 1]
17222-17405 uart: ['FRAME', 1, (6, True)]
17405-17588 uart: ['IDLE', 1, 0]
17660-17687 uart: ['STARTBIT', 1, 0]
17686-17817 uart: ['DATA', 1, (7, [[1, 17686, 17712], [1, 17712, 17738], [1, 17738, 17764], [0, 17764, 17790], [0, 17790, 17816]])]
17816-17843 uart: ['STOPBIT', 1, 1]
17660-17843 uart: ['FRAME', 1, (7, True)]
17843-18026 uart: ['IDLE', 1, 0]
18099-18126 uart: ['STARTBIT', 1, 0]
18125-18256 uart: ['DATA', 1, (8, [[0, 18125, 18151], [0, 18151, 18177], [0, 18177, 18203], [1, 18203, 18229], [0, 18229, 18255]])]
18255-18282 uart: ['STOPBIT', 1, 1]
18099-18282 uart: ['FRAME', 1, (8, True)]
18282-18465 uart: ['IDLE', 1, 0]
18538-18565 uart: ['STARTBIT', 1, 0]
18564-18695 uart: ['DATA', 1, (9, [[1, 18564, 18590], [0, 18590, 18616], [0, 18616, 18642], [1, 18642, 18668], [0, 18668, 18694]])]
18694-18721 uart: ['STOPBIT', 1, 1]
18538-18721 uart: ['FRAME', 1, (9, True)]
18721-18904 uart: ['IDLE', 1, 0]
18978-19005 uart: ['STARTBIT', 1, 0]
19004-19135 uart: ['DATA', 1, (10, [[0, 19004, 19030], [1, 19030, 19056], [0, 19056, 19082], [1, 19082, 19108], [0, 19108, 19134]])]
19134-19161 uart: ['STOPBIT', 1, 1]
18978-19161 uart: ['FRAME', 1, (10, True)]
19161-19344 uart: ['IDLE', 1, 0]
19419-19446 uart: ['STARTBIT', 1, 0]
19445-19576 uart: ['DATA', 1, (11, [[1, 19445, 19471], [1, 19471, 19497], [0, 19497, 19523], [1, 19523, 19549], [0, 19549, 19575]])]
19575-19602 uart: ['STOPBIT', 1, 1]
19419-19602 uart: ['FRAME', 1, (11, True)]
19602-19785 uart: ['IDLE', 1, 0]
19859-19886 uart: ['STARTBIT', 1, 0]
19885-20016 uart: ['DATA', 1, (12, [[0, 19885, 19911], [0, 19911, 19937], [1, 19937, 19963], [1, 19963, 19989], [0, 19989, 20015]])]
20015-20042 uart: ['STOPBIT', 1, 1]
19859-20042 uart: ['FRAME', 1, (12, True)]
20042-20225 uart: ['IDLE', 1, 0]
20298-20325 uart: ['STARTBIT', 1, 0]
20324-20455 uart: ['DATA', 1, (13, [[1, 20324, 20350], [0, 20350, 20376], [1, 20376, 20402], [1, 20402, 20428], [0, 20428, 20454]])]
20454-20481 uart: ['STOPBIT', 1, 1]
20298-20481 uart: ['FRAME', 1, (13, True)]
20481-20664 uart: ['IDLE', 1, 0]
20739-20766 uart: ['STARTBIT', 1, 0]
20765-20896 uart: ['DATA', 1, (14, [[0, 20765, 20791], [1, 20791, 20817], [1, 20817, 20843], [1, 20843, 20869], [0, 20869, 20895]])]
20895-20922 uart: ['STOPBIT', 1, 1]
20739-20922 uart: ['FRAME', 1, (14, True)]
20922-21105 uart: ['IDLE', 1, 0]
21177-21204 uart: ['STARTBIT', 1, 0]
21203-21334 uart: ['DATA', 1, (15, [[1, 21203, 21229], [1, 21229, 21255], [1, 21255, 21281], [1, 21281, 21307], [0, 21307, 21333]])]
21333-21360 uart: ['STOPBIT', 1, 1]
21177-21360 uart: ['FRAME', 1, (15, True)]
21360-21543 uart: ['IDLE', 1, 0]
21616-21643 uart: ['STARTBIT', 1, 0]
21642-21773 uart: ['DATA', 1, (16, [[0, 21642, 21668], [0, 21668, 21694], [0, 21694, 21720], [0, 21720, 21746], [1, 21746, 21772]])]
21772-21799 uart: ['STOPBIT', 1, 1]
21616-21799 uart: ['FRAME', 1, (16, True)]
21799-21982 uart: ['IDLE', 1, 0]
22053-22080 uart: ['STARTBIT', 1, 0]
22079-22210 uart: ['DATA', 1, (17, [[1, 22079, 22105], [0, 22105, 22131], [0, 22131, 22157], [0, 22157, 22183], [1, 22183, 22209]])]
22209-22236 uart: ['STOPBIT', 1, 1]
22053-22236 uart: ['FRAME', 1, (17, True)]
22236-22419 uart: ['IDLE', 1, 0]
22491-22518 uart: ['STARTBIT', 1, 0]
22517-22648 uart: ['DATA', 1, (18, [[0, 22517, 22543], [1, 22543, 22569], [0, 22569, 22595], [0, 22595, 22621], [1, 22621, 22647]])]
22647-22674 uart: ['STOPBIT', 1, 1]
22491-22674 uart: ['FRAME', 1, (18, True)]
22674-22857 uart: ['IDLE', 1, 0]
22930-22957 uart: ['STARTBIT', 1, 0]
22956-23087 uart: ['DATA', 1, (19, [[1, 22956, 22982], [1, 22982, 23008], [0, 23008, 23034], [0, 23034, 23060], [1, 23060, 23086]])]
23086-23113 uart: ['STOPBIT', 1, 1]
22930-23113 uart: ['FRAME', 1, (19, True)]
23113-23296 uart: ['IDLE', 1, 0]
23368-23395 uart: ['STARTBIT', 1, 0]
23394-23525 uart: ['DATA', 1, (20, [[0, 23394, 23420], [0, 23420, 23446], [1, 23446, 23472], [0, 23472, 23498], [1, 23498, 23524]])]
23524-23551 uart: ['STOPBIT', 1, 1]
23368-23551 uart: ['FRAME', 1, (20, True)]
23551-23734 uart: ['IDLE', 1, 0]
23807-23834 uart: ['STARTBIT', 1, 0]
23833-23964 uart: ['DATA', 1, (21, [[1, 23833, 23859], [0, 23859, 23885], [1, 23885, 23911], [0, 23911, 23937], [1, 23937, 23963]])]
23963-23990 uart: ['STOPBIT', 1, 1]
23807-23990 uart: ['FRAME', 1, (21, True)]
23990-24173 uart: ['IDLE', 1, 0]
24248-24275 uart: ['STARTBIT', 1, 0]
24274-24405 uart: ['DATA', 1, (22, [[0, 24274, 24300], [1, 24300, 24326], [1, 24326, 24352], [0, 24352, 24378], [1, 24378, 24404]])]
24404-24431 uart: ['STOPBIT', 1, 1]
24248-24431 uart: ['FRAME', 1, (22, True)]
24431-24614 uart: ['IDLE', 1, 0]
24686-24713 uart: ['STARTBIT', 1, 0]
24712-24843 uart: ['DATA', 1, (23, [[1, 24712, 24738], [1, 24738, 24764], [1, 24764, 24790], [0, 24790, 24816], [1, 24816, 24842]])]
24842-24869 uart: ['STOPBIT', 1, 1]
24686-24869 uart: ['FRAME', 1, (23, True)]
24869-25052 uart: ['IDLE', 1, 0]
25125-25152 uart: ['STARTBIT', 1, 0]
25151-25282 uart: ['DATA', 1, (24, [[0, 25151, 25177], [0, 25177, 25203], [0, 25203, 25229], [1, 25229, 25255], [1, 25255, 25281]])]
25281-25308 uart: ['STOPBIT', 1, 1]
25125-25308 uart: ['FRAME', 1, (24, True)]
25308-25491 uart: ['IDLE', 1, 0]
25562-25589 uart: ['STARTBIT', 1, 0]
25588-25719 uart: ['DATA', 1, (25, [[1, 25588, 25614], [0, 25614, 25640], [0, 25640, 25666], [1, 25666, 25692], [1, 25692, 25718]])]
25718-25745 uart: ['STOPBIT', 1, 1]
25562-25745 uart: ['FRAME', 1, (25, True)]
25745-25928 uart: ['IDLE', 1, 0]
26000-26027 uart: ['STARTBIT', 1, 0]
26026-26157 uart: ['DATA', 1, (26, [[0, 26026, 26052], [1, 26052, 26078], [0, 26078, 26104], [1, 26104, 26130], [1, 26130, 26156]])]
26156-26183 uart: ['STOPBIT', 1, 1]
26000-26183 uart: ['FRAME', 1, (26, True)]
26183-26366 uart: ['IDLE', 1, 0]
26439-26466 uart: ['STARTBIT', 1, 0]
26465-26596 uart: ['DATA', 1, (27, [[1, 26465, 26491], [1, 26491, 26517], [0, 26517, 26543], [1, 26543, 26569], [1, 26569, 26595]])]
26595-26622 uart: ['STOPBIT', 1, 1]
26439-26622 uart: ['FRAME', 1, (27, True)]
26622-26805 uart: ['IDLE', 1, 0]
26878-26905 uart: ['STARTBIT', 1, 0]
26904-27035 uart: ['DATA', 1, (28, [[0, 26904, 26930], [0, 26930, 26956], [1, 26956, 26982], [1, 26982, 27008], [1, 27008, 27034]])]
27034-27061 uart: ['STOPBIT', 1, 1]
26878-27061 uart: ['FRAME', 1, (28, True)]
27061-27244 uart: ['IDLE', 1, 0]
27314-27341 uart: ['STARTBIT', 1, 0]
27340-27471 uart: ['DATA', 1, (29, [[1, 27340, 27366], [0, 27366, 27392], [1, 27392, 27418], [1, 27418, 27444], [1, 27444, 27470]])]
27470-27497 uart: ['STOPBIT', 1, 1]
27314-27497 uart: ['FRAME', 1, (29, True)]
27497-27680 uart: ['IDLE', 1, 0]
27753-27780 uart: ['STARTBIT', 1, 0]
27779-27910 uart: ['DATA', 1, (30, [[0, 27779, 27805], [1, 27805, 27831], [1, 27831, 27857], [1, 27857, 27883], [1, 27883, 27909]])]
27909-27936 uart: ['STOPBIT', 1, 1]
27753-27936 uart: ['FRAME', 1, (30, True)]
27936-28119 uart: ['IDLE', 1, 0]
28189-28216 uart: ['STARTBIT', 1, 0]
28215-28346 uart: ['DATA', 1, (31, [[1, 28215, 28241], [1, 28241, 28267], [1, 28267, 28293], [1, 28293, 28319], [1, 28319, 28345]])]
28345-28372 uart: ['STOPBIT', 1, 1]
28189-28372 uart: ['FRAME', 1, (31, True)]
28372-28555 uart: ['IDLE', 1, 0]
28626-28653 uart: ['STARTBIT', 1, 0]
28652-28783 uart: ['DATA', 1, (0, [[0, 28652, 28678], [0, 28678, 28704], [0, 28704, 28730], [0, 28730, 28756], [0, 28756, 28782]])]
28782-28809 uart: ['STOPBIT', 1, 1]
28626-28809 uart: ['FRAME', 1, (0, True)]
28809-28992 uart: ['IDLE', 1, 0]
29063-29090 uart: ['STARTBIT', 1, 0]
29089-29220 uart: ['DATA', 1, (1, [[1, 29089, 29115], [0, 29115, 29141], [0, 29141, 29167], [0, 29167, 29193], [0, 29193, 29219]])]
29219-29246 uart: ['STOPBIT', 1, 1]
29063-29246 uart: ['FRAME', 1, (1, True)]
29246-29429 uart: ['IDLE', 1, 0]
29501-29528 uart: ['STARTBIT', 1, 0]
29527-29658 uart: ['DATA', 1, (2, [[0, 29527, 29553], [1, 29553, 29579], [0, 29579, 29605], [0, 29605, 29631], [0, 29631, 29657]])]
29657-29684 uart: ['STOPBIT', 1, 1]
29501-29684 uart: ['FRAME', 1, (2, True)]