i2s/2ch-16bit-16khz: Drop trailing whitespace.

diff --git a/i2s/2ch-16bit-16khz/README b/i2s/2ch-16bit-16khz/README
index 2c24397ce912c1ff24c9c8701c71d587fa1b7b4b..5403a16286166684201a9ceb40eaac084e71ea78 100644 (file)
--- a/i2s/2ch-16bit-16khz/README
+++ b/i2s/2ch-16bit-16khz/README
@@ -8,7 +8,7 @@ shipping forecast through one channel, and the other channel disconnected.
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a EE Electronics ESLA201A at a 
+The logic analyzer used for capturing was a EE Electronics ESLA201A at a
 sample rate of 16MHz. The logic analyzer probes were connected to the I2S
 pins like this:
 
@@ -17,3 +17,4 @@ pins like this:
   0           Clock
   1           Frame Select
   2           Data
+