1 -------------------------------------------------------------------------------
3 -------------------------------------------------------------------------------
5 This is a capture of data output to a Maxim MAX6921 high voltage shift
6 register that was outputting data for a VFD clock.
8 The signals were grabbed on a 28-pin PLCC chip (MAX6921) which outputs 20-bits
9 that is crafted as a design for VFD applications.
12 - BeagleBoard.org vendor tree: https://github.com/beagleboard/kernel
13 - Beagle Nixie GitHub: https://github.com/mranostay/beagle-nixie/
14 - MAX6921 datasheet: http://datasheets.maximintegrated.com/en/ds/MAX6921-MAX6931.pdf
20 The logic analyzer used was Open Bench Logic Sniffer (at 10MHz):
23 --------------------------
27 3 BLANK (PWM Brightness Control)
33 The data contain various values for the VFD being driven, as reference at the
34 prototype Nixie Cape for the Beaglebone.
37 -----------------------
50 -----------------------
60 The sigrok command line used was:
62 sigrok-cli --driver=ols:conn=/dev/ttyACM0 -d samplerate=10mhz \
63 --samples=24576 -p 0=LOAD,1=DATA,2=CLK,3=BLANK -o <filename>