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Commit | Line | Data |
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047542b9 KP |
1 | 50MHz capture of an ADE7758 SPI communications. |
2 | Note that Chip Select is _optional_ on this device, provided that you are | |
3 | careful to only use valid, full length spi read/write requests. | |
4 | ||
5 | In this case, the chip is configured to provide interrupts on voltage zero | |
6 | crossings, and the host MCU is reading the status register, and then the | |
7 | appropriate (phase B) voltage/current registers. | |
8 | ||
9 | It is largely an example of SPI without CS, in spi mode 0,1. | |
10 | ||
11 | Two captures are provided. | |
12 | ade7758-phaseB-zx-irq-context.sr: trigger with precapture on the IRQ pin falling edge. | |
13 | ade7758-phaseB-zx-irq-nocontext.sr: trigger on spi CLK rising edge. | |
14 | ||
15 | Correct decodings with the ADE7758 decoder should show | |
16 | RSTATUS: 0x400 | |
17 | FREQ: 0x0 (frequency is from phase A, not connected on this device) | |
18 | BVRMS: 0x10cd0c (context) or 0x10ccfa (nocontext) | |
19 | BIRMS: 0x2ac (context) or 0x2a8 (nocontext) | |
20 | ||
21 | Anything else has gotten the SPI decoding wrong due to the lack of chip select. |