[sigrok-dumps.git] / sle44xx / README

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Siemens SLE44xx Chip Card Protocol
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SLE 4418/4428/4432/4442 memory cards implement a 2-wire protocol for data
communication (signals CLK and I/O). A RST signal can be used to terminate
currently pending long memory reads, and resets the card's address counter
when combined with CLK. The next response data then is the Answer to Reset
(ATR) which identifies the chip's capabilities, and allows to adjust for
subsequent communication of more requests.

See the Siemens document for details:

  ICs for Chip Cards
  Intelligent 256-Byte EEPROM
  SLE 4432/SLE 4442
  Data Sheet 07.95


Logic analyzer setup
--------------------

  Probe    SLE44xx
  ----------------
  0        I/O
  1        CLK
  2        RST

See subdirectories for chip specific example files.
Commit	Line	Data
f114ba0b GS	1	------------------------------------------------------------------------
	2	Siemens SLE44xx Chip Card Protocol
	3	------------------------------------------------------------------------
	4
	5	SLE 4418/4428/4432/4442 memory cards implement a 2-wire protocol for data
	6	communication (signals CLK and I/O). A RST signal can be used to terminate
	7	currently pending long memory reads, and resets the card's address counter
	8	when combined with CLK. The next response data then is the Answer to Reset
	9	(ATR) which identifies the chip's capabilities, and allows to adjust for
	10	subsequent communication of more requests.
	11
	12	See the Siemens document for details:
	13
	14	ICs for Chip Cards
	15	Intelligent 256-Byte EEPROM
	16	SLE 4432/SLE 4442
	17	Data Sheet 07.95
	18
	19
	20	Logic analyzer setup
	21	--------------------
	22
	23	Probe SLE44xx
	24	----------------
	25	0 I/O
	26	1 CLK
	27	2 RST
	28
	29	See subdirectories for chip specific example files.