[sigrok-dumps.git] / misc / square_wave_analog / README

-------------------------------------------------------------------------------
Analog clock signal
-------------------------------------------------------------------------------

This is a set of example captures of a clock signal (rectangle signal)
generated using a function generator, sampled using an LA/MSO.


Logic analyzer setup
--------------------

The logic analyzer used was a Noname LHT00SU1 (at 12MHz):

  Probe       Signal
  -------------------------------
  1DCH        100kHz clock signal
  2DCH        same 100kHz clock signal
  1ACH        same 100kHz clock signal
Commit	Line	Data
f711de81 UH	1	-------------------------------------------------------------------------------
	2	Analog clock signal
	3	-------------------------------------------------------------------------------
	4
	5	This is a set of example captures of a clock signal (rectangle signal)
	6	generated using a function generator, sampled using an LA/MSO.
	7
	8
	9	Logic analyzer setup
	10	--------------------
	11
	12	The logic analyzer used was a Noname LHT00SU1 (at 12MHz):
	13
	14	Probe Signal
	15	-------------------------------
	16	1DCH 100kHz clock signal
	17	2DCH same 100kHz clock signal
	18	1ACH same 100kHz clock signal
	19