[sigrok-dumps.git] / lpc / h55 / README

-------------------------------------------------------------------------------
Intel H55 LPC (low pin count) traffic
-------------------------------------------------------------------------------

This capture is an LPC (low pin count) I/O read transaction from an Intel H55
chipset on a Foxconn H55MXV motherboard.

Details:
http://en.wikipedia.org/wiki/Low_Pin_Count


Hardware setup
--------------

The capture was taken with an FPGA sampling at 200 MHz and imported into sigrok
as 8bit binary data.

  Probe  LPC
  ----------
  2      LCLK
  3      LFRAME#
  4      LAD0
  5      LAD1
  6      LAD2
  7      LAD3


h55_lpc_io_write.sr
---------------
An I/O write to 0x2e (super IO index register) of 0x55.
Commit	Line	Data
8c42ec4c AB	1	-------------------------------------------------------------------------------
	2	Intel H55 LPC (low pin count) traffic
	3	-------------------------------------------------------------------------------
	4
	5	This capture is an LPC (low pin count) I/O read transaction from an Intel H55
	6	chipset on a Foxconn H55MXV motherboard.
	7
	8	Details:
	9	http://en.wikipedia.org/wiki/Low_Pin_Count
	10
	11
	12	Hardware setup
	13	--------------
	14
	15	The capture was taken with an FPGA sampling at 200 MHz and imported into sigrok
	16	as 8bit binary data.
	17
	18	Probe LPC
	19	----------
	20	2 LCLK
	21	3 LFRAME#
	22	4 LAD0
	23	5 LAD1
	24	6 LAD2
	25	7 LAD3
	26
	27
	28	h55_lpc_io_write.sr
	29	---------------
	30	An I/O write to 0x2e (super IO index register) of 0x55.