[sigrok-dumps.git] / led / ws2801 / README

-------------------------------------------------------------------------------
WS2801 LED strip
-------------------------------------------------------------------------------

This is a capture of data output to a LED universe of 50 RGB LEDs.

Every universe at full capacity has a frame size of 768 bytes and can clock
out at roughly 100 frames per second.

Details:
 - Koen Kooi's evil vendor tree: https://github.com/koenkooi/kernel
 - PRU WS28xx firmware: https://github.com/mranostay/ws28xx-lighting-pru
 - WS2801 datasheet: http://www.adafruit.com/datasheets/WS2801.pdf


WS2801 protocol overview
------------------------

Each LED receives and then stores the first 24-bits of RGB ordered data then
passes any more out the Data Output pin to the next LED in the chain.

There is no CS line but latching is done when CLK is held low for >500 uS.

This functions as a "reverse" shift register and allows the strip length not
to be defined in the protocol.


Logic analyzer setup
--------------------

The logic analyzer used was a Saleae Logic16 (at 5MHz):

  Probe       WS2801 LED strip
  ----------------------------
  1 (black)   Universe #1
  2 (brown)   Clock


Data
----

The data contains various RGB values and frames.

The sigrok command line used was:

  sigrok-cli --driver saleae-logic16 --samples 10M --config samplerate=5mhz \
             -p 0=UNI1,1=CLK -o ws2801_2ch_5mhz.sr
Commit	Line	Data
13f998d4 MR	1	-------------------------------------------------------------------------------
	2	WS2801 LED strip
	3	-------------------------------------------------------------------------------
	4
bd6d6407	5	This is a capture of data output to a LED universe of 50 RGB LEDs.
13f998d4	6
bd6d6407	7	Every universe at full capacity has a frame size of 768 bytes and can clock
13f998d4 MR	8	out at roughly 100 frames per second.
	9
	10	Details:
	11	- Koen Kooi's evil vendor tree: https://github.com/koenkooi/kernel
bd6d6407	12	- PRU WS28xx firmware: https://github.com/mranostay/ws28xx-lighting-pru
13f998d4 MR	13	- WS2801 datasheet: http://www.adafruit.com/datasheets/WS2801.pdf
	14
	15
bd6d6407 UH	16	WS2801 protocol overview
bd6d6407 UH	17	------------------------
13f998d4	18
bd6d6407	19	Each LED receives and then stores the first 24-bits of RGB ordered data then
13f998d4 MR	20	passes any more out the Data Output pin to the next LED in the chain.
13f998d4 MR	21
bd6d6407	22	There is no CS line but latching is done when CLK is held low for >500 uS.
13f998d4	23
bd6d6407 UH	24	This functions as a "reverse" shift register and allows the strip length not
bd6d6407 UH	25	to be defined in the protocol.
13f998d4 MR	26
	27
	28	Logic analyzer setup
	29	--------------------
	30
bd6d6407	31	The logic analyzer used was a Saleae Logic16 (at 5MHz):
13f998d4	32
bd6d6407 UH	33	Probe WS2801 LED strip
bd6d6407 UH	34	----------------------------
13f998d4 MR	35	1 (black) Universe #1
	36	2 (brown) Clock
	37
bd6d6407	38
13f998d4 MR	39	Data
	40	----
	41
	42	The data contains various RGB values and frames.
	43
	44	The sigrok command line used was:
	45
	46	sigrok-cli --driver saleae-logic16 --samples 10M --config samplerate=5mhz \
	47	-p 0=UNI1,1=CLK -o ws2801_2ch_5mhz.sr
bd6d6407	48